NEC UPA1720

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1720
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The µ PA1720 is N-Channel MOS Field Effect Transistor designed for DC / DC Converters and power management
application of notebook computers.
FEATURES
• Low On-Resistance
RDS(on)1 = 25.0 mΩ MAX. (VGS = 10 V, ID = 4.0 A)
RDS(on)2 = 33.0 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A)
RDS(on)3 = 38.0 mΩ MAX. (VGS = 4.0 V, ID = 4.0 A)
• Low Ciss : Ciss = 800 pF TYP.
• Built-in G-S Protection Diode
• Small and Surface Mount Package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
µ PA1720G
Power SOP8
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, All terminals are connected.)
Drain to Source Voltage (VGS = 0)
VDSS
30
V
Gate to Source Voltage (VDS = 0)
VGSS
±20
V
Drain Current (DC)
ID(DC)
±8
A
ID(pulse)
±32
A
Drain Current (Pulse)
Note1
Total Power Dissipation (TA = 25 °C)
Note2
PT
2.0
W
Single Avalanche Current
Note3
IAS
8.0
A
Single Avalanche Energy
Note3
EAS
6.4
mJ
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to + 150
°C
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 %
2
2. Mounted on ceramic substrate of 1200 mm x 2.2 mm
3. Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G13888EJ2V0DS00 (2nd edition)
Date Published March 2000 NS CP(K)
Printed in Japan
The mark ★ shows major revised points.
©
1998, 1999
µ PA1720
ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
Drain to Source On-state Resistance
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
RDS(on)1
VGS = 10 V, ID = 4.0 A
20.0
25.0
mΩ
RDS(on)2
VGS = 4.5 V, ID = 4.0 A
25.5
33.0
mΩ
RDS(on)3
VGS = 4.0 V, ID = 4.0 A
29.0
38.0
mΩ
VGS(off)
VDS = 10 V, ID = 1 mA
1.5
2.0
2.5
V
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 4.0 A
3.0
7.0
Drain Leakage Current
IDSS
VDS = 30 V, VGS = 0 V
10
µA
Gate to Source Leakage Current
IGSS
VGS = ±16 V, VDS = 0 V
±10
µA
Input Capacitance
Ciss
VDS = 10 V
800
pF
Output Capacitance
Coss
VGS = 0 V
250
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
96
pF
Turn-on Delay Time
td(on)
ID = 4.0 A
20
ns
VGS(on) = 10 V
80
ns
td(off)
VDD = 15 V
40
ns
tf
RG = 10 Ω
40
ns
Gate to Source Cut-off Voltage
Rise Time
tr
Turn-off Delay Time
Fall Time
S
Total Gate Charge
QG
ID = 8 A
14
nC
Gate to Source Charge
QGS
VDD = 24 V
2.3
nC
Gate to Drain Charge
QGD
VGS = 10 V
3.6
nC
VF(S-D)
IF = 8 A, VGS = 0 V
0.86
V
Reverse Recovery Time
trr
IF = 8 A, VGS = 0 V
30
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/ µs
40
nC
Body Diode Forward Voltage
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
50 Ω
VGS
RL
Wave Form
RG
PG.
VDD
VGS
0
VGS(on)
10 %
90 %
VDD
ID
90 %
90 %
IAS
ID
VGS
0
BVDSS
ID
VDS
ID
τ
VDD
Starting Tch
τ = 1 µs
Duty Cycle ≤ 1 %
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
2
50 Ω
0
10 %
10 %
Wave Form
RL
VDD
Data Sheet G13888EJ2V0DS00
td(on)
tr
ton
td(off)
tf
toff
µ PA1720
TYPICAL CHARACTERISTICS (TA = 25 °C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
2.8
100
80
60
40
20
0
20
40
60
80
Mounted on ceramic
substrate of
1200 mm2 × 2.2 mm
2.4
2.0
1.6
1.2
0.8
0.4
0
100 120 140 160
TA - Ambient Temperature - ˚C
20
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
100
0
µs
1
1200 mm × 2.2 mm
m
2
s
s
m
10
0
rD
m
s
iss
n
io
at
ip
1
Remark Mounted on ceramic substrate of
10
=
we
RD
(V S(on)
GS
L
= imit
10 ed
V)
10
=
=
PW
Po
m
Li
0.1
d
0.1
0.01
ite
TA = 25 ˚C
Single Pulse
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
100
rth(t) - Transient Thermal Resistance - ˚C/W
ID - Drain Current - A
=
PW
ID(DC) = 8 A
PW
10
PW
ID(DC) = 32 A
Rth(ch-A) = 62.5 ˚C/W
10
1
0.1
0.01
0.0001
Mounted on ceramic
substrate of
1200 mm2 x 2.2 mm
Single Pulse
0.001
0.01
0.1
1
10
100
1000
PW - Pulse Width - s
Data Sheet G13888EJ2V0DS00
3
µ PA1720
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
Pulsed
Pulsed
ID - Drain Current - A
ID - Drain Current - A
100
10
TA = 150˚C
75˚C
25˚C
−25˚C
1
VDS = 10 V
0.1
0
1
2
3
4
5
30
VGS = 10 V
4.5 V
4.0 V
20
10
0
0.0
6
100
TA = −25˚C
25˚C
75˚C
150˚C
1
0.1
0.01
VDS =10 V
Pulsed
0.1
1
10
100
RDS(on) - Drain to Source On-state Resistance - mΩ
ID- Drain Current - A
★
Pulsed
80
VGS = 4.0 V
60
4.5 V
10 V
20
0
0.1
1
10
100
1.6
Pulsed
80
ID = 4 A
8A
60
40
20
0
0
5
10
15
VGS - Gate to Source Voltage - V
100
3.0
VDS = 10 V
ID = 1 mA
2.0
1.0
0.0
−50
0
50
100
Tch - Channel Temperature - ˚C
ID - Drain Current - A
4
1.2
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
100
40
0.8
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
VGS(off) - Gate to Source Cut-off Voltage - V
|yfs| - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
RDS(on) - Drain to Source On-State Resistance - mΩ
VGS - Gate to Source Voltage - V
10
0.4
VDS - Drain to Source Voltage - V
Data Sheet G13888EJ2V0DS00
150
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
50
ISD - Diode Forward Current - A
100
40
VGS = 4.0 V
30
4.5 V
10 V
20
10
-50
0
50
100
VGS = 10 V
0V
10
1
0.1
0.0
150
0.5
1.0
1.5
Tch - Channel Temperature - ˚C
VSD - Source to Drain Voltage - V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
10000
Ciss, Coss, Crss - Capacitance - pF
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1000
VGS = 0 V
f = 1 MHz
1000
trr - Reverse Recovery Time - ns
RDS(on) - Drain to Source On-state Resistance - mΩ
µ PA1720
Ciss
Coss
100
Crss
10
0.01
0.1
1
10
100
10
1
0.1
100
di / dt = 100 A /µ s
VGS = 0 V
1
10
100
IF - Drain Current - A
VDS - Drain to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
16
14
30
12
VGS
VDD = 24 V
15 V
6V
20
10
8
6
4
10
2
ID = 8 A
VDS
0
0
5
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
40
0
10
15
20
25
QG - Gate Charge - nC
Data Sheet G13888EJ2V0DS00
5
µ PA1720
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
10
RG = 25 Ω
VDD = 15 V
VGS = 20 V 0 V
Starting Tch = 25˚C
IAS = 8 A
EAS = 6.4 mJ
1
10µ
100µ
1m
L - Inductive Load - H
6
10m
120
Energy Derating Factor - %
IAS - Single Avalanche Current - A
100
SINGLE AVALANCHE ENERGY
DERATING FACTOR
RG = 25 Ω
VDD = 15 V
VGS = 20 V
IAS 8 A
100
0V
80
60
40
20
0
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - ˚C
Data Sheet G13888EJ2V0DS00
µ PA1720
PACKAGE DRAWING (Unit : mm)
Power SOP8
8
EQUIVALENT CIRCUIT
5
1
2, 3
4
5, 6, 7, 8
;
;
;
;
Non Connect
Source
Gate
Drain
Drain
Body
Diode
Gate
6.0 ±0.3
4
4.4
5.37 Max.
0.8
0.15
+0.10
–0.05
1.44
0.05 Min.
1.8 Max.
1
Remark
1.27
0.40
0.78 Max.
+0.10
–0.05
Gate
Protection
Diode
Source
0.5 ±0.2
0.10
0.12 M
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
Exceeding the rated voltage may be applied to this device.
Data Sheet G13888EJ2V0DS00
7
µ PA1720
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
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systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8