POINN TICP206D

TICP206 SERIES
SILICON TRIACS
Copyright © 1997, Power Innovations Limited, UK
MARCH 1988 - REVISED MARCH 1997
●
1.5 A RMS
●
Glass Passivated Wafer
●
400 V to 600 V Off-State Voltage
MT2
●
Max IGT of 10 mA
MT1
●
Package Options
LP PACKAGE
(TOP VIEW)
G
1
2
3
MDC2AA
PACKAGE
PACKING
PART # SUFFIX
LP
Bulk
(None)
LP with fomed leads
Tape and Reel
R
LP PACKAGE
WITH FORMED LEADS
(TOP VIEW)
G
1
2
3
MT2
MT1
MDC2AB
absolute maximum ratings over operating case temperature (unless otherwise noted)
RATING
SYMBOL
TICP206D
Repetitive peak off-state voltage (see Note 1)
TICP206M
VALUE
400
VDRM
UNIT
V
600
IT(RMS)
1.5
A
Peak on-state surge current full-sine-wave (see Note 3)
ITSM
10
A
Peak on-state surge current half-sine-wave (see Note 4)
ITSM
12
A
Peak gate current
IGM
±0.2
A
P G(AV)
0.3
W
Operating case temperature range
TC
-40 to +110
°C
Storage temperature range
Tstg
-40 to +125
°C
TL
230
°C
Full-cycle RMS on-state current at (or below) 85°C case temperature (see Note 2)
Average gate power dissipation at (or below) 85°C case temperature (see Note 5)
Lead temperature 1.6 mm from case for 10 seconds
NOTES: 1. These values apply bidirectionally for any value of resistance between the gate and Main Terminal 1.
2. This value applies for 50-Hz full-sine-wave operation with resistive load. Above 85°C derate linearly to 110°C case temperature at
the rate of 60 mA/°C.
3. This value applies for one 50-Hz full-sine-wave when the device is operating at (or below) the rated value of on-state current.
Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost.
4. This value applies for one 50-Hz half-sine-wave when the device is operating at (or below) the rated value of on-state current.
Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost.
5. This value applies for a maximum averaging time of 20 ms.
electrical characteristics at 25°C case temperature (unless otherwise noted)
PARAMETER
IDRM
IGTM
VGTM
MIN
TEST CONDITIONS
Repetitive peak offstate current
VD = rated VDRM
IG = 0
TYP
MAX
UNIT
±20
µA
Vsupply = +12 V†
RL = 10 Ω
tp(g) > 20 µs
8
Peak gate trigger
V supply = +12 V†
RL = 10 Ω
tp(g) > 20 µs
-8
current
V supply = -12 V†
RL = 10 Ω
tp(g) > 20 µs
-8
V supply = -12 V†
RL = 10 Ω
tp(g) > 20 µs
10
Vsupply = +12 V†
RL = 10 Ω
tp(g) > 20 µs
2.5
Peak gate trigger
V supply = +12 V†
RL = 10 Ω
tp(g) > 20 µs
-2.5
voltage
V supply = -12 V†
RL = 10 Ω
tp(g) > 20 µs
-2.5
V supply = -12 V†
RL = 10 Ω
tp(g) > 20 µs
2.5
mA
V
† All voltages are with respect to Main Terminal 1.
PRODUCT
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TICP206 SERIES
SILICON TRIACS
MARCH 1988 - REVISED MARCH 1997
electrical characteristics at 25°C case temperature (unless otherwise noted) (continued)
PARAMETER
Peak on-state
VTM
MIN
TEST CONDITIONS
ITM = ±1 A
voltage
IH
Holding current
IL
Latching current
IG = 50 mA
TYP
(see Note 6)
MAX
UNIT
±2.2
V
Vsupply = +12 V†
IG = 0
Init’ ITM = 100 mA
30
Vsupply = -12 V†
IG = 0
Init’ ITM = -100 mA
-30
Vsupply = +12 V†
Vsupply = -12 V†
mA
40
(see Note 7)
mA
-40
† All voltages are with respect to Main Terminal 1.
NOTES: 6. This parameter must be measured using pulse techniques, tp = ≤ 1 ms, duty cycle ≤ 2 %. Voltage-sensing contacts separate from
the current carrying contacts are located within 3.2 mm from the device body.
7. The triacs are triggered by a 15-V (open circuit amplitude) pulse supplied by a generator with the following characteristics:
RG = 100 Ω, tp(g) = 20 µs, tr = ≤ 15 ns, f = 1 kHz.
TYPICAL CHARACTERISTICS
GATE TRIGGER VOLTAGE
vs
GATE TRIGGER CURRENT
vs
TEMPERATURE
TEMPERATURE
TC05AA
1000
VAA = ± 12 V
RL = 10 Ω
100
+
+
-
+
+
tp(g) = 20 µs
VGT - Gate Trigger Voltage - V
IGT - Gate Trigger Current - mA
Vsupply IGTM
10
1
0·1
-60
-40
-20
0
20
40
60
80
100
120
TC - Case Temperature - °C
Figure 1.
PRODUCT
2
INFORMATION
TC05AB
10
Vsupply IGTM
VAA = ± 12 V
+
+
-
+
}
}
+
RL = 10 Ω
tp(g) = 20 µs
-40
-20
1
0·1
-60
0
20
40
60
80
TC - Case Temperature - °C
Figure 2.
100
120
TICP206 SERIES
SILICON TRIACS
MARCH 1988 - REVISED MARCH 1997
TYPICAL CHARACTERISTICS
HOLDING CURRENT
vs
GATE FORWARD VOLTAGE
vs
GATE FORWARD CURRENT
CASE TEMPERATURE
TC05AD
100
TC05AC
10
VGF - Gate Forward Voltage - V
IH - Holding Current - mA
VAA = ± 12 V
IG = 0
Initiating ITM = 100 mA
10
1
Vsupply
+
-
0·1
-60
-40
-20
0
20
40
60
80
100
1
IA = 0
0·1
TC = 25 °C
QUADRANT 1
0·01
0·0001
0·001
120
TC - Case Temperature - °C
0·01
0·1
1
IGF - Gate Forward Current - A
Figure 3.
Figure 4.
LATCHING CURRENT
vs
CASE TEMPERATURE
100
VAA = ± 12 V
IL - Latching Current - mA
Vsupply IGTM
+
+
-
TC05AE
+
+
10
1
-60
-40
-20
0
20
40
60
80
100
120
TC - Case Temperature - °C
Figure 5.
PRODUCT
INFORMATION
3
TICP206 SERIES
SILICON TRIACS
MARCH 1988 - REVISED MARCH 1997
MECHANICAL DATA
LP003 (TO-92)
3-pin cylindical plastic package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
LP003 Falls Within JEDEC
TO-226AA Dimensions
LP003 (TO-92)
5,21
4,44
4,19
3,17
3,43 MIN.
2,67
2,03
2,67
2,03
5,34
4,32
Seating Plane
1,27
A)
(see Note A)
12,7 MIN.
0,56
0,40
1
1,40
1,14
3
2
0,41
0,35
2,67
2,41
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTE A: Lead dimensions are not controlled in this area.
PRODUCT
4
INFORMATION
MDXXAX
TICP206 SERIES
SILICON TRIACS
MARCH 1988 - REVISED MARCH 1997
MECHANICAL DATA
LP003 (TO-92)
3-pin cylindical plastic package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
LP003 (TO-92) - Formed Leads Version
LP003 Falls Within JEDEC
TO-226AA Dimensions
5,21
4,44
4,19
3,17
3,43 MIN.
2,67
2,03
2,67
2,03
5,34
4,32
4,00 MAX.
0,56
0,40
1
2
3
2,90
2,40
0,41
0,35
2,90
2,40
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXAR
PRODUCT
INFORMATION
5
TICP206 SERIES
SILICON TRIACS
MARCH 1988 - REVISED MARCH 1997
MECHANICAL DATA
LPR
tape dimensions
LP Package (TO-92) Tape (Formed Lead Version)
5,21
4,44
4,19
3,17
3,43 MIN.
2,67
2,03
2,67
2,03
5,34
4,32
4,00 MAX.
0,56
0,40
0,41
0,35
13,70
11,70
32,00
23,00
27,68
17,66
0,50
0,00
2,50 MIN.
16,50
15,50
11,00
8,50
9,75
8,50
2,90
2,40
2,90
2,40
19,00
5,50
19,00
17,50
ø 4,30
3,70
6,75
5,95
13,00
12,40
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXAS
PRODUCT
6
INFORMATION
TICP206 SERIES
SILICON TRIACS
MARCH 1988 - REVISED MARCH 1997
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the
information being relied on is current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI
deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except as mandated by government requirements.
PI accepts no liability for applications assistance, customer product design, software performance, or infringement
of patents or services described herein. Nor is any license, either express or implied, granted under any patent
right, copyright, design right, or other intellectual property right of PI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1997, Power Innovations Limited
PRODUCT
INFORMATION
7