TC4467 TC4468 TC4469 LOGIC-INPUT CMOS QUAD DRIVERS 2 FEATURES GENERAL DESCRIPTION ■ ■ ■ ■ ■ ■ The TC446X family of four-output CMOS buffer/drivers are an expansion from our earlier single- and dual-output drivers. Each driver has been equipped with a two-input logic gate for added flexibility. The TC446X drivers can source up to 250 mA into loads referenced to ground. Heavily loaded clock lines, coaxial cables, and piezoelectric transducers can all be easily driven with the 446X series drivers. The only limitation on loading is that total power dissipation in the IC must be kept within the power dissipation limits of the package. The TC446X series will not latch under any conditions within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking (either polarity) occurs on the ground line. They can accept up to half an amp of inductive kickback current (either polarity) into their outputs without damage or logic upset. In addition, all terminals are protected against ESD to at least 2000V. ■ High Peak Output Current ............................... 1.2A Wide Operating Range ............................ 4.5 to 18V Symmetrical Rise and Fall Times ................ 25nsec Short, Equal Delay Times ............................ 75nsec Latchproof! Withstands 500mA Inductive Kickback 3 Input Logic Choices — AND / NAND / AND + Inv 2kV ESD Protection on All Pins APPLICATIONS ■ ■ ■ ■ ■ ■ General-Purpose CMOS Logic Buffer Driving All Four MOSFETs in an H-Bridge Direct Small Motor Driver Relay or Peripheral Drivers CCD Driver Pin-Switching Network Driver 1 3 4 ORDERING INFORMATION TC4468 VDD 1B 2A 2B 3A 3B 4A 4B 1 2 13 3 12 4 5 11 6 8 10 9 Temp. Range TC446xCOE TC446xCPD TC446xEJD TC446xMJD 16-Pin SOIC (Wide) 14-Pin Plastic DIP 14-Pin CerDIP 14-Pin CerDIP 0° to +70°C 0° to +70°C – 40° to +85°C – 55° to +125°C VDD TC4469 14 14 1A Package x indicates a digit must be added in this position to define the device input configuration: TC446x — 7 NAND 8 AND 9 AND with INV LOGIC DIAGRAMS TC4467 Part No. 1Y 2Y 3Y 4Y 1A 1B 2A 2B 3A 3B 4A 4B 1 2 14 13 3 12 4 5 11 6 8 10 9 TC446X VDD 1Y 2Y 3Y 4Y 1A 1B 2A 2B 3A 3B 4A 4B 1 2 13 3 12 4 5 11 6 8 10 9 7 7 7 GND GND GND 6 VDD 1Y 2Y OUTPUT 7 3Y 4Y 8 TC4467/8/9-6 10/21/96 TELCOM SEMICONDUCTOR, INC. 5 4-261 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 ABSOLUTE MAXIMUM RATINGS* Supply Voltage ......................................................... +20V Input Voltage ......................... (GND – 5V) to (VDD + 0.3V) Maximum Chip Temperature Operating ........................................................ +150°C Storage ............................................. – 65° to +150°C Maximum Lead Temperature (Soldering, 10 sec) ......................................... +300°C Operating Ambient Temperature Range C Device .................................................. 0° to +70°C E Device ............................................. – 40° to +85°C M Device ........................................... – 55° to +125°C Package Power Dissipation (TA ≤ 70°C) 14-Pin CerDIP ................................................840mW 14-Pin Plastic DIP ...........................................800mW 16-Pin Wide SOIC ..........................................760mW Package Thermal Resistance 14-Pin CerDIP RθJ-A ...................................... 100°C/W RθJ-C ......................................... 23°C/W 14-Pin Plastic DIP RθJ-A ......................................... 80°C/W RθJ-C ......................................... 35°C/W 16-Pin Wide SOIC RθJ-A ......................................... 95°C/W RθJ-C ......................................... 28°C/W *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: Measured at TA = +25°C with 4.5V ≤ VDD ≤ 18V, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Logic 1, High Input Voltage Logic 0, Low Input Voltage Input Current Note 3 Note 3 0V ≤ VIN ≤ VDD 2.4 0 –1 — — — VDD 0.8 1 V V µA VOH VOL RO IPK IDC High Output Voltage Low Output Voltage Output Resistance Peak Output Current Continuous Output Current ILOAD = 100µA (Note 1) ILOAD = 10mA (Note 1) IOUT = 10mA, VDD = 18V VDD – 0.025 — — — — — — 10 1.2 — V V Ω A mA I Latch-Up Protection Withstand Reverse Current 500 — — 0.15 15 — 300 500 — Figure 1 Figure 1 Figure 1 Figure 1 — — — — 15 15 40 40 25 25 75 75 nsec nsec nsec nsec Note 2 — 4.5 1.5 — 4 18 mA V Input VIH VIL IIN Output Single Output Total Package 4.5V ≤ VDD ≤ 16V mA Switching Time tR tF tD1 tD2 Rise Time Fall Time Delay Time Delay Time Power Supply IS VDD Power Supply Current Power Supply Voltage TRUTH TABLE Part No. TC4467 NAND INPUTS A INPUTS B OUTPUTS TC446X H = High 4-262 H H L H L H L H H TC4468 AND L L H H H H H L L L H L TC4469 AND/INV L L L H H L H L H L H L L L L L = Low TELCOM SEMICONDUCTOR, INC. LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 1 ELECTRICAL CHARACTERISTICS: Measured throughout operating temperature range with 4.5V ≤ VDD ≤ 18V, unless otherwise specified. Symbol Parameter Unit 2 Test Conditions Min Typ Max Logic 1, High Input Voltage Logic 0, Low Input Voltage Input Current (Note 3) (Note 3) 0V ≤ VIN ≤ VDD 2.4 — – 10 — — — — 0.8 10 V V µA High Output Voltage Low Output Voltage Output Resistance Peak Output Current Latch-Up Protection Withstand Reverse Current ILOAD = 100 µA (Note 1) ILOAD = 10 mA (Note 1) IOUT = 10 mA, VDD = 18V VDD – 0.025 — — — 500 — — 20 1.2 — — 0.30 30 — — V V Ω A mA 3 Figure 1 Figure 1 Figure 1 Figure 1 — — — — — — — — 50 50 100 100 nsec nsec nsec nsec 4 Note 2 — 4.5 — — 8 18 mA V Input VIH VIL IIN Output VOH VOL RO IPK I 4.5V ≤ VDD ≤ 16V Switching Time tR tF tD1 tD2 Rise Time Fall Time Delay Time Delay Time Power Supply IS IS Power Supply Current Power Supply Voltage NOTES: 1. Totem-pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. 2. When driving all four outputs simultaneously in the same direction, VDD shall be limited to 16V. This reduces the chance that internal dv/dt will cause high-power dissipation in the device. 3. The input threshold has about 50 mV of hysteresis centered at approximately 1.5V. Slow moving inputs will force the device to dissipate high peak currents as the input transitions through this band. Input rise times should be kept below 5 µs to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum or below the minimum input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device. 5 PIN CONFIGURATIONS 16-Pin SOIC (Wide) 1A 1 16 VDD 1B 2 15 VDD 2A 3 14 1Y 2B 4 13 TC4467/8/9 6 14-Pin Plastic DIP/CerDIP 1A 1 14 VDD 1B 2 13 1Y 2Y 2A 3 12 2Y 12 3Y 2B 4 TC4467/8/9 11 3Y 3A 5 3B 6 11 4Y 3A 5 10 4Y GND 7 10 4B 3B 6 9 4B 9 4A GND 7 8 4A GND 8 TELCOM SEMICONDUCTOR, INC. 7 8 4-263 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 Supply Bypassing Large currents are required to charge and discharge large capacitive loads quickly. For example, charging a 1000 pF load to 18V in 25nsec requires 0.72A from the device's power supply. To guarantee low supply impedance over a wide frequency range, a 1 µF film capacitor in parallel with one or two low-inductance 0.1 µF ceramic disk capacitors with short lead lengths (<0.5 in.) normally provide adequate bypassing. Grounding The TC4467 and TC4469 contain inverting drivers. Potential drops developed in common ground impedances from input to output will appear as negative feedback and degrade switching speed characteristics. Instead, individual ground returns for input and output circuits, or a ground plane, should be used. Three components make up total package power dissipation: (1) Load-caused dissipation (PL) (2) Quiescent power (PQ) (3) Transition power (PT). A capacitive-load-caused dissipation (driving MOSFET gates), is a direct function of frequency, capacitive load, and supply voltage. The power dissipation is: PL = f C VS2, where: f = Switching frequency C = Capacitive load VS = Supply voltage. A resistive-load-caused dissipation for ground-referenced loads is a function of duty cycle, load current, and load voltage. The power dissipation is: Input Stage The input voltage level changes the no-load or quiescent supply current. The N-channel MOSFET input stage transistor drives a 2.5 mA current source load. With logic "0" outputs, maximum quiescent supply current is 4 mA. Logic "1" output level signals reduce quiescent current to 1.4 mA maximum. Unused driver inputs must be connected to VDD or VSS. Minimum power dissipation occurs for logic "1" outputs. The drivers are designed with 50 mV of hysteresis. This provides clean transitions and minimizes output stage current spiking when changing states. Input voltage thresholds are approximately 1.5V, making any voltage greater than 1.5V up to VDD a logic 1 input . Input current is less than 1 µA over this range. Power Dissipation The supply current versus frequency and supply current versus capacitive load characteristic curves will aid in determining power dissipation calculations. TelCom Semiconductor's CMOS drivers have greatly reduced quiescent DC power consumption. Input signal duty cycle, power supply voltage and load type, influence package power dissipation. Given power dissipation and package thermal resistance, the maximum ambient operating temperature is easily calculated. The 14pin plastic package junction-to-ambient thermal resistance is 83.3°C/W. At +70°C, the package is rated at 800mW maximum dissipation. Maximum allowable chip temperature is +150°C. 4-264 PL = D (VS – VL) IL, where: D = Duty cycle VS = Supply voltage VL = Load voltage IL = Load current. A resistive-load-caused dissipation for supply-referenced loads is a function of duty cycle, load current, and output voltage. The power dissipation is: PL = D VO IL, where: f = Switching frequency VO = Device output voltage IL = Load current. Quiescent power dissipation depends on input signal duty cycle. Logic HIGH outputs result in a lower power dissipation mode, with only 0.6 mA total current drain (all devices driven). Logic LOW outputs raise the current to 4 mA maximum. The quiescent power dissipation is: PQ = VS (D (IH) + (1–D)IL), where: IH = Quiescent current with all outputs LOW (4 mA max) IL = Quiescent current with all outputs HIGH (0.6 mA max) D = Duty cycle VS =Supply voltage. TELCOM SEMICONDUCTOR, INC. LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 Transition power dissipation arises in the complementary configuration (TC446X) because the output stage N-channel and P-channel MOS transistors are ON simultaneously for a very short period when the output changes. The transition power dissipation is approximately: PT = f VS (10 3 10–9). Package power dissipation is the sum of load, quiescent and transition power dissipations. An example shows the relative magnitude for each term: 1 Maximum operating temperature: 2 TJ – θJA (PD) = 141°C, where: TJ = Maximum allowable junction temperature (+150°C) θJA = Junction-to-ambient thermal resistance (83.3°C/W) 14-pin plastic package. NOTE: Ambient operating temperature should not exceed +85°C for "EJD" device or +125°C for "MJD" device. C = 1000 pF capacitive load VS = 15V D = 50% f = 200 kHz PD = Package Power Dissipation = PL + PQ + PT = 45 mW + 35 mW + 30 mW = 110 mW. 3 4 VDD 1 µF FILM 0.1 µF CERAMIC +5V 14 1A 1B 2A 2B 3A 3B 4A 4B 1 2 13 3 4 12 5 6 11 8 9 10 VOUT 470 pF 90% 0V 10% VDD tD1 90% tR OUTPUT 7 5 INPUT (A, B) 10% 0V tD2 90% tF 10% 6 Input: 100 kHz, square wave, tRISE = tFALL ≤ 10nsec Figure 1. Switching Time Test Circuit 7 8 TELCOM SEMICONDUCTOR, INC. 4-265 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 TYPICAL CHARACTERISTICS Fall Time vs. Supply Voltage Rise Time vs. Supply Voltage 140 140 2200 pF 120 2200 pF 100 1600 pF 80 1000 pF t (FALL) (nsec) t (RISE) (nsec) 120 60 100 1500 pF 80 1000 pF 60 40 470 pF 40 470 pF 20 100 pF 20 100 pF 0 3 5 7 9 11 13 VSUPPLY (V) 15 17 0 19 3 5 Rise Time vs. Capacitive Load 15 17 19 t (FALL) (nsec) 100 80 10V 15V 60 5V 120 5V 100 80 40 20 20 0 100 10,000 1000 10V 15V 60 40 0 100 Rise/Fall Times vs. Temperature 10,000 1000 C LOAD (pF) C LOAD (pF) Propagation Delay Time vs. Supply Voltage 80 25 VSUPPLY = 17.5V CLOAD = 470 pF C LOAD = 470 pF DELAY TIME (nsec) TIME (nsec) 11 13 VSUPPLY (V) 140 120 20 9 Fall Time vs. Capacitive Load 140 t (RISE) (nsec) 7 t (FALL) 15 t (RISE) 10 60 tD1 40 tD2 20 5 0 –50 4-266 0 –25 0 25 50 TEMPERATURE (°C) 75 100 125 4 6 8 10 12 V SUPPLY (V) 14 16 18 TELCOM SEMICONDUCTOR, INC. LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 1 TYPICAL CHARACTERISTICS (Cont.) 70 VDD = 12V DELAY TIME (nsec) DELAY TIME (nsec) 120 INPUT RISING 100 t D2 80 60 t D1 INPUT FALLING 40 VDD = 17.5V CLOAD = 470 pF VIN = 0, 5V 60 50 tD2 3 40 1 2 3 4 5 6 V DRIVE (V) 7 8 9 20 –60 10 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 120 100 4 Quiescent Supply Current vs. Temperature Quiescent Supply Current vs. Supply Voltage 3.5 2.5 3.0 I QUIESCENT (mA) I QUIESCENT (mA) 2.0 OUTPUTS = 0 1.5 1.0 OUTPUTS = 1 0.5 4 6 8 10 12 VSUPPLY (V) 14 16 VDD = 17.5V 2.5 1.5 1.0 OUTPUTS HIGH 0 –60 18 –40 35 35 30 30 TJ = +150°C R DS(ON) (Ω ) TJ = +25°C 10 5 0 0 6 8 10 12 V SUPPLY (V) TELCOM SEMICONDUCTOR, INC. 80 100 120 6 14 16 18 7 20 TJ = +150°C 15 10 T = +25°C J 5 4 20 40 60 TJUNCTION (°C) 25 20 15 –20 Low-State Output Resistance High-State Output Resistance 25 5 OUTPUTS LOW 2.0 0.5 0 R DS(ON) (Ω ) t D1 30 20 0 2 Propagation Delay Times vs. Temperature Input Amplitude vs. Delay Times 140 0 4 6 8 10 12 V SUPPLY (V) 14 16 18 4-267 8 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 SUPPLY CURRENT CHARACTERISTICS (Load on Single Output Only) Supply Current vs. Capacitive Load 60 VDD = 18V 50 I SUPPLY (mA) VDD = 18V 2 MHz 1 MHz 1000 pF 40 30 500 kHz 20 200 kHz 10 30 20 100 pF 0 10 10,000 1000 40 10 20 kHz 0 100 100 1000 FREQUENCY (kHz) CLOAD (pF) Supply Current vs. Capacitive Load 60 Supply Current vs. Frequency 2 MHz VDD = 12V 40 1 MHz 30 20 500 kHz 10 40 1000 pF 30 20 100 pF 10 200 kHz 20 kHz 0 100 0 10 10,000 1000 100 FREQUENCY (kHz) C LOAD (pF) Supply Current vs. Capacitive Load 1000 10,000 Supply Current vs. Frequency 60 60 VDD = 6V VDD = 6V 50 50 I SUPPLY (mA) I SUPPLY (mA) 2200 pF 50 I SUPPLY (mA) I SUPPLY (mA) 50 40 30 2 MHz 20 1 MHz 500 kHz 200 kHz 20 kHz 10 4-268 10,000 60 VDD = 12V 0 100 2200 pF 50 I SUPPLY (mA) 60 Supply Current vs. Frequency 1000 CLOAD (pF) 40 2200 pF 30 20 1000 pF 10 100 pF 10,000 0 10 100 1000 FREQUENCY (kHz) 10,000 TELCOM SEMICONDUCTOR, INC. LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 1 TYPICAL APPLICATIONS Stepper Motor Drive +5V TO +15V 14 TC4469 1 2 AIRPAX #M82102-P2 13 RED 7.5°/STEP 14 18V TC4469 DIRECTION MOTOR 3 4 A B FWD 12 GRAY 5 11 6 8 9 2 Quad Driver for H-Bridge Motor Control +12V REV PWM SPEED YEL 10 1 2 13 3 4 12 5 6 11 8 9 10 3 M MOTOR 7 BLK 4 7 48-Volt, 3-Phase Brushless Output Stage 48V R4 3.3 kΩ C1 1 µF D1 1N4744 15V R2 3.3 kΩ R3 3.3 kΩ R1 3.3 kΩ 5W 1 2 3 4 5 1A 1B 2A 2B 3A D3 D4 R9 (FLOAT AT 33V) Q1 4.7 kΩ 2N5550 R6 R10 B+ Q2 4.7 kΩ R7 2N5550 R11 Q3 C+ 4.7 kΩ U1 2N5550 A– B– 2Y 3Y 4Y 13 12 11 10 TC4469 GND 7 R5 A+ 1Y 6 3B 8 4A 9 4B D2 1 2 3 4 5 5 14 VDD 1A 1B 2A 2B 3A 6 MOTOR PHASE A 15V MOTOR PHASE B MOTOR PHASE C 14 VDD 1Y U2 6 3B 8 4A 9 4B 2Y 3Y 4Y 13 7 12 11 10 TC4469 GND 7 8 C– TELCOM SEMICONDUCTOR, INC. 4-269