SSG0410 N-Ch Enhancement Mode Power MOSFET 3.8 A, 100 V, RDS(ON) 158 m Elektronische Bauelemente DESCRIPTION The SSG0410 provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOP-8 package is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications such as DC/DC converters. SOP-8 FEATURES Simple Drive Requirement Low Gate Charge Fast Switching Characteristic B L D M Drain MARKING A C N J H Gate D D D D 8 7 6 5 G K F E Source 0410SC = Date Code REF. 1 2 3 4 S S S G A B C D E F G Millimeter Min. Max. 5.80 6.20 4.80 5.00 3.80 4.00 0° 8° 0.40 0.90 0.19 0.25 1.27 TYP. REF. H J K L M N Millimeter Min. Max. 0.35 0.49 0.375 REF. 45° 1.35 1.75 0.10 0.25 0.25 REF. MAXIMUM RATINGS (TA = 25°C unless otherwise specified) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current 3 SYMBOL RATINGS UNIT VDS 100 V VGS ±20 V ID @ TA = 25°C 3.8 A ID @ TA = 70°C 3.0 A Pulsed Drain Current 1 IDM 8 A Total Power Dissipation PD Linear Derating Factor Operating Junction & Storage Temperature Range TJ, TSTG 2.5 W 0.02 W / °C -55 ~ 150 °C 50 °C / W THERMAL RESISTANCE RATINGS Thermal Resistance Junction-ambient 3 (Max.) http://www.SeCoSGmbH.com/ 01-Jun-2010 Rev. A RθJA Any changes of specification will not be informed individually. Page 1 of 4 SSG0410 N-Ch Enhancement Mode Power MOSFET 3.8 A, 100 V, RDS(ON) 158 m Elektronische Bauelemente ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) SYMBOL MIN TYP MAX UNIT Drain-Source Breakdown Voltage Gate Threshold Voltage Forward Transconductance Gate-Source Leakage Current Drain-Source Leakage Current(TJ=25°C) Drain-Source Leakage Current(TJ=55°C) PARAMETER BVDSS VGS(th) gfs IGSS 100 1.0 - 4 - 3.0 ±100 V V S nA VGS=0V, ID =1mA VDS=10V, ID =1mA VDS=10V, ID =2.5A VGS=±20V TEST CONDITION - - 10 μA VDS=100V, VGS=0V - - 25 μA VDS=100V, VGS=0V Static Drain-Source On-Resistance 2 RDS(ON) mΩ VGS=10V, ID=2.7A VGS=6V, ID=2.5A Total Gate Charge 2 Gate-Source Chagre Gate-Drain (“Miller”) Change Turn-on Delay Time 2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Qg Qgs Qgd Td(ON) Tr Td(OFF) Tf CISS COSS CRSS nC VDS=80V, ID =3.5A, VGS=5V nS VDS=30V, VGS=10V I D=1A, RL=30Ω, RG=6Ω IDSS 158 175 11.2 30 4.4 3 9 9.4 26.8 2.6 975 1670 38 27 SOURCE-DRAIN DIODE 1.2 pF VDS=25V VGS=0V f=1MHz Forward On Voltage 2 VSD V IS=3.8A, VGS=0V Notes： 1. Pulse width limited by Max. junction temperature. 2. Pulse width ≦ 300 μs, duty cycle ≦ 2％. 3. Surface mounted on 1 in2 copper pad of FR4 board；125 °C / W when mounted on Min. copper pad. http://www.SeCoSGmbH.com/ 01-Jun-2010 Rev. A Any changes of specification will not be informed individually. Page 2 of 4 SSG0410 Elektronische Bauelemente N-Ch Enhancement Mode Power MOSFET 3.8 A, 100 V, RDS(ON) 158 m CHARACTERISTIC CURVES http://www.SeCoSGmbH.com/ 01-Jun-2010 Rev. A Any changes of specification will not be informed individually. Page 3 of 4 SSG0410 Elektronische Bauelemente N-Ch Enhancement Mode Power MOSFET 3.8 A, 100 V, RDS(ON) 158 m CHARACTERISTIC CURVES http://www.SeCoSGmbH.com/ 01-Jun-2010 Rev. A Any changes of specification will not be informed individually. Page 4 of 4