ETC ATF-521P8-TR2

Agilent ATF-521P8 High Linearity
Enhancement Mode [1]
Pseudomorphic HEMT in
2x2 mm2 LPCC [3] Package
Data Sheet
Features
• Single voltage operation
• High linearity and P1dB
Agilent Technologies’s ATF-521P8 is a
single-voltage high linearity, low noise
E-pHEMT housed in an 8-lead JEDECstandard leadless plastic chip carrier
(LPCC[3]) package. The device is ideal
as a medium-power, high-linearity amplifier. Its operating frequency range
is from 50 MHz to 6 GHz.
• Low noise figure
Pin Connections and
Package Marking
Pin 8
Pin 7 (Drain)
Pin 6
Pin 5
Source
(Thermal/RF Gnd)
Description
• Excellent uniformity in product
specifications
Pin 1 (Source)
Pin 2 (Gate)
Pin 3
Pin 4 (Source)
Bottom View
The thermally efficient package measures only 2mm x 2mm x 0.75mm. Its
backside metalization provides excellent thermal dissipation as well as visual evidence of solder reflow. The
device has a Point MTTF of over 300
years at a mounting temperature of
+85°C. All devices are 100% RF & DC
tested.
Pin 3
• Point MTTF > 300 years[2]
• MSL-1 and lead-free
• Tape-and-reel packaging option
available
Pin 8
Pin 1 (Source)
Pin 2 (Gate)
• Small package size:
2.0 x 2.0 x 0.75 mm3
2Px
Pin 4 (Source)
Pin 7 (Drain)
Specifications
Pin 6
2 GHz; 4.5V, 200 mA (Typ.)
Pin 5
• 42 dBm output IP3
Top View
Note:
Package marking provides orientation and
identification
• 26.5 dBm output power at 1 dB gain
compression
• 1.5 dB noise figure
• 17 dB Gain
Note:
1. Enhancement mode technology employs a
single positive Vgs, eliminating the need of
negative gate voltage associated with
conventional depletion mode devices.
2. Refer to reliability datasheet for detailed
MTTF data
3. Conform to JEDEC reference outline MO229
for DRP-N
4. Linearity Figure of Merit (LFOM) is essentially
OIP3 divided by DC bias power.
“2P” = Device Code
“x” = Month code indicates the month of
manufacture.
• 12.5 dB LFOM[4]
Applications
• Front-end LNA Q2 and Q3, driver or
pre-driver amplifier for Cellular/
PCS and WCDMA wireless
infrastructure
• Driver amplifier for WLAN,
WLL/RLL and MMDS applications
• General purpose discrete E-pHEMT
for other high linearity applications
ATF-521P8 Absolute Maximum Ratings [1]
Symbol
Parameter
Units
Absolute
Maximum
VDS
Drain – Source Voltage [2]
V
7
VGS
Gate – Source Voltage [2]
V
-5 to 1
VGD
Gate Drain Voltage [2]
V
-5 to 1
IDS
Drain Current [2]
mA
500
IGS
Gate Current
mA
46
Pdiss
Total Power Dissipation [3]
W
1.5
Pin max.
RF Input Power
dBm
27
TCH
Channel Temperature
°C
150
TSTG
Storage Temperature
°C
-65 to 150
θch_b
Thermal Resistance [4]
°C/W
45
Notes:
1. Operation of this device in excess of any one
of these parameters may cause permanent
damage.
2. Assumes DC quiescent conditions.
3. Board (package belly) temperatureTB is 25°C.
Derate 22 mW/°C for TB > 83°C.
4. Channel to board thermal resistance
measured using 150°C Liquid Crystal
Measurement method.
5. Device can safely handle +27dBm RF Input
Power provided IGS is limited to 46mA. IGS
at P1dB drive level is bias circuit dependent.
Product Consistency Distribution Charts [5, 6]
150
180
600
Stdev = 0.19
0.8V
500
0.7V
IDS (mA)
400
4
VDS (V)
0
6
8
0
0
0.5
1
1.5
2
2.5
3
300
Cpk = 2.13
Stdev = 0.21
Cpk = 4.6
Stdev = 0.11
250
120
200
-3 Std
90
+3 Std
60
100
30
50
15
16
17
18
GAIN (dB)
Figure 4. Gain @ 2 GHz, 4.5 V, 200 mA.
Nominal = 17.2 dB, LSL = 15.5 dB,
USL = 18.5 dB.
-3 Std
150
19
0
25
25.5
26
+3 Std
26.5
27
27.5
P1dB (dBm)
Figure 5. P1dB @ 2 GHz, 4.5 V, 200 mA.
Nominal = 26.5 dBm, LSL = 25 dBm.
Notes:
5. Distribution data sample size is 500 samples taken from 5 different wafers. Future wafers allocated
to this product may have nominal values anywhere between the upper and lower limits.
6. Measurements are made on production test board, which represents a trade-off between optimal
OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.
2
39
41
43
45
47
Figure 3. OIP3 @ 2 GHz, 4.5 V, 200 mA.
Nominal = 41.9 dBm, LSL = 38.5 dBm.
Figure 2. NF @ 2 GHz, 4.5 V, 200 mA.
Nominal = 1.5 dB.
180
37
OIP3 (dBm)
NF (dB)
Figure 1. Typical I-V Curves.
(VGS = 0.1 V per step)
150
+3 Std
30
30
0.4V
2
-3 Std
60
0.5V
0
90
+3 Std
60
Vgs = 0.6V
0
-3 Std
90
200
0
120
120
300
100
Cpk = 0.86
Stdev = 1.32
150
49
ATF-521P8 Electrical Specifications
TA = 25°C, DC bias for RF parameters is Vds = 4.5V and Ids = 200 mA unless otherwise specified.
Symbol
Parameter and Test Condition
Units
Min.
Typ.
Max.
Vgs
Operational Gate Voltage
Vds = 4.5V, Ids = 200 mA
V
—
0.62
—
Vth
Threshold Voltage
Vds = 4.5V, Ids = 16 mA
V
—
0.28
—
Idss
Saturated Drain Current
Vds = 4.5V, Vgs = 0V
µA
—
14.8
—
Gm
Transconductance
Vds = 4.5V, Gm = ∆Idss/∆Vgs;
Vgs = Vgs1 - Vgs2
Vgs1 = 0.55V, Vgs2 = 0.5V
mmho
—
1300
—
Igss
Gate Leakage Current
Vds = 0V, Vgs = -4V
µA
-20
0.49
—
NF
Noise
Figure [1]
f = 2 GHz
f = 900 MHz
dB
dB
—
—
1.5
1.2
—
—
G
Gain [1]
f = 2 GHz
f = 900 MHz
dB
dB
15.5
—
17
17.2
18.5
—
OIP3
Output 3rd Order
Intercept Point [1]
f = 2 GHz
f = 900 MHz
dBm
dBm
38.5
—
42
42.5
—
—
P1dB
Output 1dB
Compressed[1]
f = 2 GHz
f = 900 MHz
dBm
dBm
25
—
26.5
26.5
—
—
PAE
Power Added Efficiency
f = 2 GHz
f = 900 MHz
%
%
45
—
60
56
—
—
ACLR
Adjacent Channel Leakage
Power Ratio[1,2]
Offset BW = 5 MHz
Offset BW = 10 MHz
dBc
dBc
—
—
-51.4
-61.5
—
—
Notes:
1. Measurements obtained using production test board described in Figure 6.
2. ACLR test spec is based on 3GPP TS 25.141 V5.3.1 (2002-06)
– Test Model 1
– Active Channels: PCCPCH + SCH + CPICH + PICH + SCCPCH + 64 DPCH (SF=128)
– Freq = 2140 MHz
– Pin = -5 dBm
– Chan Integ Bw = 3.84 MHz
Input
50 Ohm
Transmission
Line Including
Gate Bias T
(0.3 dB loss)
Input
Matching Circuit
Γ_mag = 0.55
Γ_ang = -166°
(1.1 dB loss)
DUT
Output
Matching Circuit
Γ_mag = 0.35
Γ_ang = 168°
(0.9 dB loss)
50 Ohm
Transmission
Line and
Drain Bias T
(0.3 dB loss)
Output
Figure 6. Block diagram of the 2 GHz production test board used for NF, Gain, OIP3 , P1dB and PAE and ACLR measurements. This circuit achieves a
trade-off between optimal OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.
3
1 pF
3.9 nH
50 Ohm
.02 λ
1.5 pF
RF Input
110 Ohm
.03 λ
110 Ohm
.03 λ
50 Ohm
.02 λ
1.5 pF
RF Output
DUT
12 nH
47 nH
15 Ohm
2.2 µF
Drain
Supply
2.2 µF
Gate
Supply
Figure 7. Simplified schematic of production test board. Primary purpose is to show 15 Ohm series resistor placement in
gate supply. Transmission line tapers, tee intersections, bias lines and parasitic values are not shown.
Gamma Load and Source at Optimum OIP3 and P1dB Tuning Conditions
The device’s optimum OIP3 and P1dB measurements were determined using a Maury load pull system at
4.5V, 200 mA quiesent bias:
Freq
(GHz)
Gamma Source
Mag
Ang (deg)
Optimum OIP3
Gamma Load
OIP3
Mag
Ang (deg)
(dBm)
Gain
(dB)
P1dB
(dBm)
PAE
(%)
0.9
0.413
10.5
0.314
179.0
42.7
16.0
27.0
54.0
2
0.368
162.0
0.538
-176.0
42.5
15.8
27.5
55.3
2.4
0.318
169.0
0.566
-169.0
42.0
14.1
27.4
53.5
3.9
0.463
-134.0
0.495
-159.0
40.3
9.6
27.3
43.9
Freq
(GHz)
Gamma Source
Mag
Ang (deg)
Optimum P1dB
Gamma Load
OIP3
Mag
Ang (deg)
(dBm)
Gain
(dB)
P1dB
(dBm)
PAE
(%)
0.9
0.587
12.7
0.613
-172.1
39.1
14.5
29.3
49.6
2
0.614
126.1
0.652
-172.5
39.5
12.9
29.3
49.5
2.4
0.649
145.0
0.682
-171.5
40.0
12.0
29.4
46.8
3.9
0.552
-162.8
0.670
-151.2
38.1
9.6
27.9
39.1
4
ATF-521P8 Typical Performance Curves (at 25°C unless specified otherwise)
Tuned for Optimal OIP3
50
45
50
45
40
45
30
25
15
150
200
250
300
350
30
25
20
4.5V
4V
3V
20
OIP3 (dBm)
35
10
100
40
35
OIP3 (dBm)
OIP3 (dBm)
40
4.5V
4V
3V
15
10
100
400
150
200
4.5V
4V
3V
15
400
10
100
150
30
30
30
20
4.5V
4V
3V
15
150
200
250
300
350
P1dB (dBm)
35
25
25
20
4.5V
4V
3V
15
10
100
400
150
200
Idq (mA)
250
300
350
10
100
400
11
15
15
10
250
300
350
14
13
12
4.5V
4V
3V
11
GAIN (dBm)
16
GAIN (dBm)
16
200
150
200
Id (mA)
Figure 14. Small Signal Gain vs Ids and Vds
at 2 GHz.
Note:
Bias current for the above charts are quiescent
conditions. Actual level may increase depending
on amount of RF drive.
10
100
150
200
250
300
350
400
300
350
9
8
7
4.5V
4V
3V
11
400
250
Figure 13. P1dB vs. Idq and Vds at 3.9 GHz.
12
150
4.5V
4V
3V
Idq (mA)
17
12
400
20
17
13
350
15
Figure 12. P1dB vs. Idq and Vds at 900 MHz.
14
300
25
Idq (mA)
Figure 11. P1dB vs. Idq and Vds at 2 GHz.
10
100
250
Figure 10. OIP3 vs. Ids and Vds at 3.9 GHz.
35
10
100
200
Id (mA)
35
P1dB (dBm)
P1dB (dBm)
350
25
20
Figure 9. OIP3 vs. Ids and Vds at 900 MHz.
Figure 8. OIP3 vs. Ids and Vds at 2 GHz.
GAIN (dBm)
300
30
Id (mA)
Id (mA)
5
250
35
4.5V
4V
3V
6
400
Id (mA)
Figure 15. Small Signal Gain vs Ids and Vds
at 900 MHz.
5
100
150
200
250
300
350
400
Id (mA)
Figure 16. Small Signal Gain vs Ids and Vds
at 3.9 GHz.
ATF-521P8 Typical Performance Curves, continued (at 25°C unless specified otherwise)
Tuned for Optimal OIP3
70
70
60
60
50
50
50
45
40
40
4.5V
4V
3V
20
150
4.5V
4V
3V
20
200
250
300
350
10
100
400
150
250
300
350
10
100
400
150
200
27
40
25
35
30
85°C
25°C
-40°C
250
300
350
400
Idq (mA)
Figure 19. PAE @ P1dB vs. Idq and Vds
at 3.9 GHz.
20
15
GAIN (dB)
45
P1dB (dBm)
OIP3 (dBm)
29
23
21
85°C
25°C
-40°C
19
20
10
85°C
25°C
-40°C
5
17
1
1.5
2
2.5
3
3.5
4
FREQUENCY (GHz)
60
50
40
30
85°C
25°C
-40°C
20
10
1.5
2
2.5
1
1.5
2
2.5
3
3.5
Figure 21. P1dB vs. Temp and Freq
tuned for optimal OIP3 at 4.5V, 200 mA.
70
1
15
0.5
FREQUENCY (GHz)
Figure 20. OIP3 vs. Temp and Freq
tuned for optimal OIP3 at 4.5V, 200 mA.
PAE (%)
15
Figure 18. PAE @ P1dB vs. Idq and Vds
at 900 MHz.
50
25
3
3.5
4
FREQUENCY (GHz)
Figure 23. PAE vs Temp and Freq
tuned for optimal OIP3 at 4.5V, 200 mA.
Note:
Bias current for the above charts are quiescent
conditions. Actual level may increase depending
on amount of RF drive.
6
4.5V
4V
3V
Idq (mA)
Figure 17. PAE @ P1dB vs. Idq and Vds
at 2 GHz.
0
0.5
30
20
200
Idq (mA)
15
0.5
35
25
30
30
10
100
PAE (%)
PAE (%)
PAE (%)
40
4
0
0.5
1
1.5
2
2.5
3
3.5
FREQUENCY (GHz)
Figure 22. Gain vs. Temp and Freq
tuned for optimal OIP3 at 4.5V, 200 mA.
4
45
45
50
40
40
45
35
35
30
25
20
10
100
150
200
250
300
30
25
20
4.5V
4V
3V
15
40
OIP3 (dBm)
OIP3 (dBm)
OIP3 (dBm)
ATF-521P8 Typical Performance Curves (at 25°C unless specified otherwise)
Tuned for Optimal P1dB
4.5V
4.5V
4V
4V
3V
3V
15
350
10
100
400
150
200
10
100
400
30
30
25
20
4.5V
4V
3V
15
250
300
350
P1db (dBm)
30
200
25
20
4.5V
4V
3V
15
10
100
400
150
200
250
300
350
10
100
400
15
13
13
13
GAIN (dBm)
15
GAIN (dBm)
15
11
9
7
150
200
250
4.5V
4V
3V
150
200
300
350
Id (mA)
Figure 30. Gain vs Ids and Vds at 2 GHz.
Note:
Bias current for the above charts are quiescent
conditions. Actual level may increase depending
on amount of RF drive.
5
100
300
350
400
4.5V
4V
3V
11
9
4.5V
4V
3V
7
400
250
Figure 29. P1dB vs. Idq and Vds at 3.9 GHz.
17
4.5V
4V
3V
400
Idq (mA)
17
9
350
20
17
11
300
15
Figure 28. P1dB vs. Idq and Vds at 900 MHz.
Figure 27. P1dB vs. Idq and Vds at 2 GHz.
250
25
Idq (mA)
Idq (mA)
5
100
200
Figure 26. OIP3 vs. Ids and Vds at 3.9 GHz.
35
150
150
Id (mA)
35
10
100
4.5V
4V
3V
15
35
P1dB (dBm)
P1dB (dBm)
350
25
20
Figure 25. OIP3 vs. Ids and Vds at 900 MHz.
Figure 24. OIP3 vs. Ids and Vds at 2 GHz.
GAIN (dBm)
300
30
Id (mA)
Id (mA)
7
250
35
150
200
250
300
350
7
400
Id (mA)
Figure 31. Gain vs Ids and Vds at 900 MHz.
5
100
150
200
250
300
350
400
Id (mA)
Figure 32. Gain vs Ids and Vds at 3.9 GHz.
ATF-521P8 Typical Performance Curves, continued (at 25°C unless specified otherwise)
Tuned for Optimal P1dB
60
55
55
50
35
45
40
PAE (%)
45
PAE (%)
PAE (%)
50
40
40
35
30
35
4.5V
4V
3V
30
30
25
25
20
100
150
200
4.5V
4V
3V
250
300
350
20
100
400
150
200
50
32
45
30
150
200
300
250
350
400
Idq (mA)
Figure 35. PAE @ P1dB vs. Idq and Vds
at 3.9 GHz.
20
35
30
85°C
25°C
-40°C
1.5
2
2.5
3
3.5
4
60
50
40
30
20
85°C
25°C
-40°C
10
2
2.5
85°C
25°C
-40°C
20
0.5
1
1.5
2
2.5
3
3.5
Figure 37. P1dB vs. Temp and Freq
(tuned for optimal P1dB at 4.5V, 200 mA).
Figure 36. OIP3 vs. Temp and Freq
tuned for optimal P1dB at 4.5V, 200 mA.
1.5
24
FREQUENCY (GHz)
FREQUENCY (GHz)
1
26
22
20
1
GAIN (dB)
P1dB (dBm)
OIP3 (dBm)
20
100
400
28
25
PAE (%)
350
15
40
3
3.5
4
FREQUENCY (GHz)
Figure 39. PAE vs Temp and Freq
tuned for optimal P1dB at 4.5V.
Note:
Bias current for the above charts are quiescent
conditions. Actual level may increase depending
on amount of RF drive.
8
300
Figure 34. PAE @ P1dB vs. Idq and Vds
at 900 MHz.
Figure 33. PAE @ P1dB vs. Idq and Vds
at 2 GHz.
0
0.5
250
Idq (mA)
Idq (mA)
15
0.5
4.5V
4V
3V
25
10
85°C
25°C
-40°C
5
4
0
0.5
1
1.5
2
2.5
3
3.5
FREQUENCY (GHz)
Figure 38. Gain vs. Temp and Freq
tuned for optimal P1dB at 4.5V, 200 mA.
4
ATF-521P8 Typical Scattering Parameters at 25°C, VDS = 4.5V, IDS = 280 mA
Freq.
GHz
Mag.
S11
Ang.
dB
S21
Mag.
Ang.
dB
S12
Mag.
Ang.
S22
Mag. Ang.
MSG/MAG
dB
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.5
2.0
2.5
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
18.0
0.613
0.780
0.831
0.855
0.860
0.878
0.888
0.887
0.894
0.886
0.892
0.883
0.890
0.884
0.890
0.893
0.896
0.906
0.882
0.887
0.887
0.882
0.878
0.894
0.888
0.884
0.830
0.708
0.790
-96.9
-131.8
-147.2
-156.4
-162.0
-166.7
-170.2
-172.6
-174.5
-177.2
175.0
168.7
162.8
157.2
146.6
137.0
127.9
119.5
105.6
96.4
84.6
72.3
62.2
52.0
42.0
34.6
24.7
11.0
-12.7
33.2
30.0
27.3
25.1
23.5
22.0
20.8
19.7
18.7
17.9
14.3
12.1
10.2
8.6
6.1
4.1
2.3
0.9
-0.8
-1.7
-2.9
-3.9
-5.0
-6.4
-7.6
-8.3
-9.5
-9.0
-10.3
45.79
31.50
23.26
18.04
14.98
12.62
10.95
9.63
8.65
7.82
5.20
4.01
3.24
2.71
2.02
1.60
1.31
1.11
0.92
0.82
0.72
0.64
0.56
0.48
0.42
0.38
0.34
0.35
0.31
141.7
121.6
111.0
104.1
99.7
95.6
92.8
90.0
87.9
85.4
76.3
68.4
61.5
54.5
40.6
27.6
15.4
3.7
-9.8
-22.2
-33.6
-45.8
-57.0
-67.8
-76.2
-84.3
-92.8
-99.5
-93.1
-39.5
-36.7
-36.2
-35.4
-35.2
-35.0
-34.6
-34.3
-33.7
-33.8
-32.8
-31.2
-30.0
-28.9
-27.0
-25.5
-24.2
-22.9
-21.3
-20.1
-19.3
-18.5
-18.0
-17.8
-17.3
-16.6
-16.1
-15.4
-16.4
0.011
0.015
0.015
0.017
0.017
0.018
0.019
0.019
0.021
0.020
0.023
0.027
0.032
0.036
0.045
0.053
0.061
0.071
0.086
0.098
0.109
0.119
0.126
0.130
0.137
0.147
0.156
0.169
0.152
51.3
37.1
30.6
28.2
27.4
26.1
27.4
28.9
28.5
30.3
34.6
36.7
36.8
39.2
36.1
32.4
28.2
22.9
14.5
7.2
-1.0
-10.5
-19.8
-28.6
-36.1
-42.9
-52.4
-63.8
-82.8
0.317
0.423
0.466
0.483
0.488
0.496
0.497
0.500
0.501
0.502
0.502
0.492
0.490
0.494
0.505
0.529
0.551
0.570
0.567
0.585
0.593
0.617
0.636
0.662
0.697
0.732
0.752
0.816
0.660
36.2
33.2
31.9
30.3
29.5
28.5
27.6
27.0
26.1
25.9
23.5
20.2
18.5
16.2
13.8
11.9
10.4
9.6
6.8
6.2
5.0
3.9
2.8
2.1
0.9
0.3
-1.8
-2.2
-4.3
-108.3
-138.5
-152.4
-159.9
-163.8
-167.0
-169.9
-171.7
-173.6
-175.7
178.8
173.6
169.8
165.7
157.8
150.3
142.9
135.5
127.3
117.8
107.3
97.1
86.0
74.7
67.5
58.7
51.9
46.1
41.2
Typical Noise Parameters at 25°C, VDS = 4.5V, IDS = 280 mA
Fmin
dB
Γopt
Mag.
Γopt
Ang.
Rn
0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
1.20
1.30
1.61
1.68
2.12
2.77
2.58
2.85
3.35
0.47
0.53
0.61
0.69
0.67
0.71
0.79
0.82
0.73
170.00
-177.00
-166.34
-155.85
-146.98
-134.35
-125.22
-115.35
-105.76
2.8
2.6
2.7
4.0
8.4
19.0
26.7
47.2
65.2
Ga
dB
22.8
20.1
17.3
14.4
11.6
9.9
8.8
7.5
5.7
40.0
MSG/MAG and |S21|2 (dB)
Freq
GHz
30.0
MSG
20.0
10.0
MAG
0.0
S21
-10.0
-20.0
0
5
10
15
20
FREQUENCY (GHz)
Figure 40. MSG/MAG and |S21|2 vs.
Frequency at 4.5V, 280 mA.
Notes:
1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on a set of
16 noise figure measurements made at 16 different impedances using an ATN NP5 test system. From these measurements a true Fmin is calculated.
Refer to the noise parameter application section for more information.
2. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of the gate
lead. The output reference plane is at the end of the drain lead.
9
ATF-521P8 Typical Scattering Parameters, VDS = 4.5V, IDS = 200 mA
Freq.
GHz
Mag.
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.5
2
2.5
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
0.823
0.873
0.879
0.885
0.883
0.897
0.895
0.894
0.900
0.893
0.894
0.889
0.888
0.892
0.884
0.891
0.889
0.902
0.881
0.891
0.876
0.885
0.885
0.893
0.889
0.894
0.840
0.719
0.794
S11
Ang.
-89.9
-128.7
-145.5
-155.1
-161.1
-165.9
-169.5
-171.9
-174.7
-176.6
175.3
168.5
162.6
157.0
146.5
137.0
127.9
119.6
105.6
96.0
83.9
73.1
60.9
53.0
42.2
34.3
25.0
9.1
-8.1
dB
Mag.
S21
Ang.
dB
S12
Mag.
Ang.
Mag.
34.4
30.5
27.6
25.2
23.6
22.1
20.8
19.6
18.7
17.8
14.3
12.0
10.2
8.6
6.0
4.0
2.3
0.9
-0.9
-1.7
-2.9
-3.6
-4.8
-6.3
-7.2
-7.8
-8.4
-10.0
-12.2
52.21
33.39
23.90
18.25
15.12
12.66
10.95
9.59
8.64
7.78
5.17
4.00
3.22
2.69
2.00
1.59
1.30
1.11
0.90
0.83
0.72
0.66
0.57
0.48
0.44
0.41
0.38
0.32
0.25
135.6
115.7
106.3
100.5
96.6
92.9
90.5
88.0
86.2
83.7
75.7
67.8
61.3
54.5
40.7
28.3
16.4
4.8
-8.8
-20.1
-32.1
-43.7
-54.1
-66.2
-74.0
-80.6
-83.4
-90.1
-102.3
-37.9
-35.6
-34.9
-34.7
-34.4
-34.1
-33.7
-33.6
-33.1
-33.1
-32.1
-30.8
-29.8
-28.6
-26.8
-25.2
-24.0
-22.8
-21.3
-20.2
-19.3
-18.5
-18.0
-17.7
-17.2
-16.9
-16.2
-15.4
-16.7
0.013
0.017
0.018
0.018
0.019
0.020
0.021
0.021
0.022
0.022
0.025
0.029
0.032
0.037
0.046
0.055
0.063
0.072
0.086
0.098
0.108
0.119
0.126
0.131
0.138
0.143
0.154
0.171
0.147
46.2
32.0
27.0
25.8
24.8
24.2
24.2
25.3
26.2
27.6
32.6
33.6
35.2
35.6
34.4
30.5
26.4
21.0
13.3
5.6
-3.2
-12.1
-21.6
-29.9
-36.7
-44.1
-54.3
-64.8
-84.1
0.388
0.478
0.507
0.518
0.519
0.525
0.526
0.528
0.528
0.529
0.527
0.516
0.514
0.517
0.526
0.548
0.568
0.584
0.580
0.594
0.600
0.622
0.641
0.663
0.698
0.732
0.750
0.815
0.655
S22
Ang.
-113.0
-143.2
-156.0
-163.1
-166.7
-169.6
-172.2
-174.0
-175.6
-177.7
177.2
172.1
168.1
164.0
156.0
148.3
141.0
133.5
124.9
115.8
105.3
95.0
84.1
73.1
65.7
57.4
51.0
44.5
40.4
MSG/MAG
dB
36.0
32.9
31.2
30.1
29.0
28.0
27.2
26.6
25.9
25.5
23.2
21.4
18.4
16.7
13.5
11.9
10.1
9.4
6.7
6.4
4.6
4.2
3.0
2.1
1.2
1.0
-0.8
-3.2
-5.9
Typical Noise Parameters, VDS = 4.5V, IDS = 200 mA
Fmin
dB
Γopt
Mag.
Γopt
Ang.
Rn
0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
0.60
0.72
0.96
1.11
1.44
1.75
1.99
2.12
2.36
0.30
0.35
0.47
0.57
0.62
0.69
0.74
0.80
0.69
130.00
150.00
-175.47
-162.03
-150.00
-136.20
-127.35
-116.83
-108.38
2.8
2.6
1.9
2.1
4.5
10.0
17.0
28.5
35.6
Ga
dB
20.2
18.4
16.5
13.8
11.2
9.8
8.7
7.5
5.7
40.0
MSG/MAG and |S21|2 (dB)
Freq
GHz
30.0
MSG
20.0
10.0
MAG
0.0
S21
-10.0
-20.0
0
5
10
15
20
FREQUENCY (GHz)
Figure 41. MSG/MAG and |S21|2 vs.
Frequency at 4.5V, 200 mA.
Notes:
1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on a set of
16 noise figure measurements made at 16 different impedances using an ATN NP5 test system. From these measurements a true Fmin is calculated.
Refer to the noise parameter application section for more information.
2. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of the gate
lead. The output reference plane is at the end of the drain lead.
10
ATF-521P8 Typical Scattering Parameters, VDS = 4.5V, IDS = 120 mA
Freq.
GHz
Mag.
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.5
2
2.5
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
0.913
0.900
0.896
0.893
0.882
0.895
0.893
0.895
0.897
0.895
0.893
0.889
0.882
0.888
0.883
0.885
0.892
0.894
0.880
0.876
0.879
0.889
0.881
0.893
0.891
0.888
0.845
0.828
0.827
S11
Ang.
-84.6
-125.0
-142.0
-152.3
-158.4
-164.2
-167.8
-170.8
-173.0
-175.5
176.0
169.2
163.6
157.9
146.8
137.7
128.0
120.4
105.7
96.5
84.4
72.8
62.4
54.0
42.1
34.1
25.3
13.2
-10.2
dB
Mag.
S21
Ang.
dB
S12
Mag.
Ang.
Mag.
34.2
30.3
27.4
25.1
23.4
21.8
20.6
19.5
18.5
17.6
14.1
11.8
10.0
8.4
5.9
3.8
2.1
0.6
-1.0
-1.9
-3.0
-3.8
-5.2
-6.3
-7.2
-8.3
-9.1
-11.2
-11.0
51.26
32.80
23.39
17.89
14.75
12.36
10.71
9.39
8.44
7.59
5.07
3.89
3.15
2.62
1.97
1.55
1.28
1.08
0.89
0.81
0.71
0.65
0.55
0.48
0.44
0.39
0.35
0.28
0.28
135.4
115.4
106.1
100.3
96.3
92.9
90.5
88.0
86.1
83.6
75.3
67.8
61.2
54.6
40.7
28.2
16.7
5.1
-8.7
-20.8
-32.7
-44.3
-56.0
-66.6
-72.6
-79.2
-89.6
-95.9
-92.5
-36.4
-33.9
-33.4
-32.9
-32.6
-32.7
-32.4
-32.3
-32.2
-31.8
-31.1
-30.0
-29.0
-28.2
-26.5
-25.2
-24.0
-22.8
-21.2
-20.1
-19.3
-18.6
-18.1
-17.7
-17.3
-16.8
-16.1
-15.6
-16.6
0.015
0.020
0.021
0.023
0.023
0.023
0.024
0.024
0.025
0.026
0.028
0.032
0.036
0.039
0.047
0.055
0.063
0.072
0.087
0.099
0.108
0.118
0.125
0.130
0.136
0.144
0.157
0.167
0.147
49.0
31.2
25.3
23.5
22.5
20.6
20.4
21.1
22.1
23.0
25.5
27.9
30.2
30.2
29.7
26.3
21.9
18.2
10.6
3.2
-5.2
-13.5
-23.1
-31.4
-38.4
-45.9
-55.0
-64.2
-86.1
0.423
0.499
0.522
0.530
0.531
0.537
0.537
0.539
0.539
0.540
0.538
0.528
0.526
0.528
0.536
0.556
0.576
0.591
0.585
0.602
0.605
0.624
0.642
0.664
0.697
0.732
0.751
0.821
0.654
S22
Ang.
-106.6
-139.4
-153.4
-161.1
-165.0
-168.4
-171.2
-173.1
-174.8
-176.9
177.4
172.2
168.1
163.9
155.7
148.1
140.5
133.1
124.3
114.9
104.5
94.2
83.4
72.4
65.1
56.7
50.4
44.0
39.9
MSG/MAG
dB
35.3
32.1
30.5
28.9
28.1
27.3
26.5
25.9
25.3
24.7
22.6
20.8
19.4
16.9
13.6
11.6
10.2
8.9
6.6
5.7
4.7
4.3
2.7
2.2
1.2
0.4
-1.5
-3.9
-4.3
Typical Noise Parameters, VDS = 4.5V, IDS = 120 mA
Fmin
dB
Γopt
Mag.
Γopt
Ang.
Rn
0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
0.60
0.72
0.81
0.92
1.24
1.50
1.60
1.88
2.02
0.19
0.30
0.44
0.56
0.59
0.70
0.75
0.81
0.68
162.00
164.00
176.97
-164.98
-155.51
-136.55
-128.59
-117.31
-109.54
3.0
2.6
2.0
2.0
3.4
11.1
16.0
24.0
28.8
Ga
dB
20.0
18.3
15.9
13.6
11.1
9.7
8.7
7.6
5.6
MSG/MAG and |S21|2 (dB)
40.0
Freq
GHz
30.0
MSG
20.0
10.0
MAG
0.0
S21
-10.0
-20.0
0
5
10
15
20
FREQUENCY (GHz)
Figure 42. MSG/MAG and |S21|2 vs.
Frequency at 4.5V, 120 mA.
Notes:
1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on a set of
16 noise figure measurements made at 16 different impedances using an ATN NP5 test system. From these measurements a true Fmin is calculated.
Refer to the noise parameter application section for more information.
2. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of the gate
lead. The output reference plane is at the end of the drain lead.
11
ATF-521P8 Typical Scattering Parameters, VDS = 4V, IDS = 200 mA
Freq.
GHz
Mag.
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.5
2
2.5
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
0.843
0.879
0.888
0.892
0.886
0.896
0.897
0.898
0.896
0.896
0.898
0.887
0.893
0.886
0.887
0.894
0.898
0.896
0.879
0.888
0.872
0.880
0.875
0.908
0.898
0.888
0.815
0.725
0.792
S11
Ang.
-90.5
-129.3
-146.1
-155.6
-161.5
-165.7
-169.5
-172.2
-174.9
-176.7
175.2
168.0
162.8
156.9
146.6
136.8
127.4
119.7
105.4
95.0
84.1
72.4
60.4
52.4
41.3
34.1
24.1
11.3
-9.8
dB
Mag.
S21
Ang.
dB
S12
Mag.
Ang.
Mag.
34.3
30.3
27.4
25.1
23.4
21.8
20.6
19.5
18.6
17.6
14.1
11.8
10.0
8.4
5.9
3.9
2.1
0.7
-0.9
-1.7
-2.9
-3.8
-4.8
-6.2
-7.1
-8.2
-8.9
-9.9
-10.2
51.89
32.88
23.48
17.91
14.80
12.37
10.74
9.39
8.47
7.61
5.06
3.91
3.15
2.63
1.97
1.57
1.28
1.09
0.90
0.82
0.72
0.65
0.58
0.49
0.44
0.39
0.36
0.32
0.31
134.8
115.0
105.8
100.1
96.3
92.7
90.5
88.1
85.9
84.0
75.7
68.1
61.7
55.1
41.5
29.4
17.7
6.3
-7.1
-19.3
-30.9
-42.8
-53.3
-63.4
-73.5
-80.2
-85.3
-90.9
-95.1
-37.7
-35.4
-35.1
-34.4
-34.2
-34.2
-33.6
-33.5
-33.3
-32.9
-32.1
-30.7
-29.5
-28.4
-26.7
-25.1
-23.9
-22.6
-21.1
-20.1
-19.2
-18.6
-18.0
-17.7
-17.2
-16.8
-16.2
-15.5
-16.6
0.013
0.017
0.018
0.019
0.020
0.020
0.021
0.021
0.022
0.023
0.025
0.029
0.034
0.038
0.046
0.056
0.064
0.074
0.088
0.099
0.110
0.118
0.126
0.130
0.138
0.144
0.156
0.167
0.147
46.5
32.1
26.0
25.1
24.6
24.1
24.7
24.4
26.5
26.3
29.9
35.2
35.8
35.8
33.2
29.6
25.5
20.4
12.4
4.7
-4.3
-12.9
-22.8
-31.4
-38.0
-45.6
-54.7
-66.0
-84.8
0.408
0.507
0.539
0.549
0.551
0.556
0.557
0.559
0.559
0.560
0.558
0.547
0.545
0.547
0.554
0.572
0.590
0.603
0.594
0.609
0.610
0.629
0.647
0.666
0.699
0.734
0.750
0.809
0.652
Typical Noise Parameters, VDS = 4V, IDS = 200 mA
Fmin
dB
Γopt
Mag.
Γopt
Ang.
Rn
0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
0.67
0.74
0.96
1.24
1.44
1.62
1.83
1.99
2.21
0.21
0.30
0.46
0.57
0.62
0.69
0.74
0.82
0.71
155.00
164.00
-176.61
-162.19
-152.18
-135.43
-127.94
-117.20
-108.96
2.8
2.6
2.1
2.8
4.5
10.0
17.0
27.7
35.3
-118.1
-146.1
-158.3
-164.8
-168.2
-170.9
-173.5
-175.2
-176.9
-178.7
176.0
170.9
166.9
162.6
154.3
146.6
139.0
131.6
122.7
113.2
102.9
92.6
81.9
71.0
64.0
55.9
49.3
43.5
39.7
MSG/MAG
dB
36.0
32.9
31.2
29.7
28.7
27.9
27.1
26.5
25.9
25.2
23.1
21.3
18.9
16.3
13.6
11.9
10.3
8.9
6.6
6.1
4.4
3.8
2.8
2.6
1.5
0.5
-1.7
-3.1
-4.2
40.0
Ga
dB
20.1
18.4
16.4
13.9
11.4
10.0
8.7
7.7
5.9
MSG/MAG and |S21|2 (dB)
Freq
GHz
S22
Ang.
30.0
MSG
20.0
10.0
MAG
0.0
S21
-10.0
-20.0
0
5
10
15
20
FREQUENCY (GHz)
Figure 43. MSG/MAG and |S21|2 vs.
Frequency at 4V, 200 mA.
Notes:
1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on a set of
16 noise figure measurements made at 16 different impedances using an ATN NP5 test system. From these measurements a true Fmin is calculated.
Refer to the noise parameter application section for more information.
2. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of the gate
lead. The output reference plane is at the end of the drain lead.
12
ATF-521P8 Typical Scattering Parameters, VDS = 3V, IDS = 200 mA
Freq.
GHz
Mag.
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.5
2
2.5
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
0.867
0.894
0.899
0.896
0.892
0.910
0.906
0.902
0.907
0.902
0.900
0.896
0.896
0.887
0.890
0.898
0.896
0.904
0.877
0.883
0.877
0.875
0.863
0.910
0.868
0.863
0.835
0.720
0.780
S11
Ang.
-94.6
-132.9
-148.2
-157.2
-162.8
-167.4
-170.8
-173.6
-175.2
-177.7
174.2
168.1
162.3
156.7
145.7
136.3
127.4
119.4
104.9
94.8
83.1
71.7
60.6
51.6
40.9
33.4
25.2
11.2
-7.7
dB
Mag.
S21
Ang.
dB
S12
Mag.
Ang.
Mag.
33.7
29.4
26.5
24.1
22.4
20.8
19.6
18.4
17.5
16.6
13.1
10.8
9.0
7.4
4.9
3.0
1.3
-0.2
-1.6
-2.4
-3.5
-4.4
-5.4
-6.5
-7.5
-8.1
-9.6
-9.5
-11.6
48.20
29.66
21.06
16.00
13.20
11.00
9.51
8.35
7.51
6.76
4.50
3.49
2.82
2.35
1.76
1.41
1.16
0.98
0.83
0.76
0.67
0.60
0.54
0.47
0.42
0.39
0.33
0.33
0.26
132.4
113.2
104.4
99.1
95.6
92.3
90.2
87.8
86.3
84.2
76.4
69.1
63.0
56.9
43.8
32.1
21.6
10.3
-2.3
-13.0
-26.0
-36.3
-47.4
-57.9
-62.8
-74.7
-78.2
-90.8
-92.8
-36.8
-34.9
-34.1
-34.0
-33.6
-33.2
-33.2
-33.0
-32.9
-32.5
-31.5
-29.9
-29.0
-27.7
-26.1
-24.5
-23.4
-22.1
-20.7
-19.8
-18.9
-18.3
-17.8
-17.6
-17.2
-16.8
-16.3
-15.8
-17.0
0.014
0.018
0.020
0.020
0.021
0.022
0.022
0.022
0.023
0.024
0.027
0.032
0.036
0.041
0.050
0.059
0.068
0.078
0.092
0.102
0.113
0.121
0.128
0.132
0.138
0.144
0.154
0.161
0.142
45.1
28.5
23.2
23.7
24.5
22.9
23.9
24.6
27.0
26.9
32.7
32.9
34.3
35.0
32.2
28.3
23.5
17.7
9.0
1.3
-7.3
-16.6
-25.1
-33.6
-40.4
-47.6
-56.8
-67.6
-85.1
0.482
0.601
0.636
0.647
0.650
0.655
0.657
0.658
0.660
0.659
0.656
0.647
0.642
0.643
0.645
0.659
0.671
0.677
0.651
0.661
0.657
0.670
0.680
0.694
0.721
0.748
0.758
0.818
0.655
S22
Ang.
-132.4
-154.2
-163.8
-169.2
-171.9
-174.4
-176.7
-178.2
-179.5
178.6
173.4
167.9
163.7
159.2
150.4
142.1
134.3
126.6
117.0
107.2
96.8
86.7
76.2
65.9
59.3
51.3
44.9
39.4
37.1
MSG/MAG
dB
35.4
32.2
30.2
29.0
28.0
27.0
26.4
25.8
25.1
24.5
22.2
20.4
18.6
15.6
12.9
11.3
9.5
8.5
5.9
5.3
4.0
3.1
1.9
2.3
0.2
-0.2
-2.1
-2.6
-5.7
Typical Noise Parameters, VDS = 3V, IDS = 200 mA
Fmin
dB
Γopt
Mag.
Γopt
Ang.
Rn
0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
0.66
0.72
0.87
1.00
1.32
1.49
1.59
1.79
1.96
0.22
0.30
0.42
0.59
0.63
0.72
0.74
0.78
0.70
147.00
160.00
-179.94
-163.63
-153.81
-135.10
-128.97
-117.68
-110.04
2.9
2.6
1.9
1.6
3.7
10.0
15.0
25.1
29.2
Ga
dB
20.0
18.3
16.0
13.7
11.3
9.9
8.5
7.6
5.6
40.0
MSG/MAG and |S21|2 (dB)
Freq
GHz
30.0
MSG
20.0
10.0
MAG
0.0
S21
-10.0
-20.0
0
5
10
15
20
FREQUENCY (GHz)
Figure 44. MSG/MAG and |S21|2 vs.
Frequency at 3V, 200 mA.
Notes:
1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on a set of
16 noise figure measurements made at 16 different impedances using an ATN NP5 test system. From these measurements a true Fmin is calculated.
Refer to the noise parameter application section for more information.
2. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of the gate
lead. The output reference plane is at the end of the drain lead.
13
ATF-521P8
Applications Information
14
3 dB
RF Input & Output Matching
In order to achieve maximum
linearity, the appropriate input
(Γs) and output (ΓL) impedances
must be presented to the device.
Correctly matching from these
impedances to 50Ωs will result in
maximum linearity. Although
ATF-521P8 may be used in other
impedance systems, data collected for this data sheet is all
referenced to a 50Ω system.
S11*
5 dB
9 dB
Application Guidelines
The ATF-521P8 device operates
as a normal FET requiring input
and output matching as well as
DC biasing. Unlike a depletion
mode transistor, this enhancement mode device only requires a
single positive power supply,
which means a positive voltage is
placed on the drain and gate in
order for the transistor to turn
on. This application note walks
through the RF and DC design
employed in a single FET amplifier. Included in this description
is an active feedback scheme to
accomplish this DC biasing.
rules but will have different
locations. Also, the location of
these points is largely due to the
manufacturing process and
partly due to IC layout, but in
either case beyond the scope of
this application note.
ΓS
B
16 d
Description
Agilent’s ATF-521P8 is an
enhancement mode PHEMT
designed for high linearity and
medium power applications.
With an OIP3 of 42 dBm and a
1dB compression point of
26 dBm, ATF-521P8 is well suited
as a base station transmit driver
or a first or second stage LNA in
a receive chain. Whether the
design is for a W-CDMA, CDMA,
or GSM basestation, this device
delivers good linearity in the
form of OIP3 or ACLR, which is
required for standards with high
peak to average ratios.
The input load pull parameter at
2 GHz is shown in Figure 1 along
with the optimum S11 conjugate
match.
ΓL
s
n Los
Retur
S22*
Figure 1. Input Match for ATF-521P8 at 2 GHz.
Thus, it should be obvious from
the illustration above that if this
device is matched for maximum
return loss i.e. S11*, then OIP3
will be sacrificed. Conversely, if
ATF-521P8 is matched for
maximum linearity, then return
loss will not be greater than
10 dB. For most applications, a
designer requires VSWR greater
than 2:1, hence limiting the input
match close to S11*. Normally,
the input return loss of a single
ended amplifier is not critical as
most basestation LNA and driver
amplifiers are in a balanced
configuration with 90° (quadrature) couplers.
Proceeding from the same
premise, the output match of this
device becomes much simpler.
As background information, it is
important to note that OIP3 is
largely dependant on the output
match and that output return
loss is also required to be greater
than 10 dB. So, Figure 2 shows
how both good output return loss
and good linearity could be
achieved simultaneously with the
same impedance point.
Figure 2. Output Match at 2 GHz.
Once a designer has chosen the
proper input and output impedance points, the next step is to
choose the correct topology to
accomplish this match. For
example to perform the above
output impedance transformation from 50Ω to the given load
parameter of 0.53∠-176°, two
possible solutions exist. The first
potential match is a high pass
configuration accomplished by a
shunt inductor and a series
capacitor shown in Figure 3
along with its frequency response
in Figure 4.
RFin
C1
RFout
L1
Figure 3. High Pass Circuit Topology.
Amp
Frequency
Of course, these points are valid
only at 2 GHz, and other frequencies will follow the same design
Figure 4. High Pass Frequency Response.
The second solution is a low pass
configuration with a shunt
capacitor and a series inductor
shown in Figure 5 and 6.
RFin
L1
RFout
C1
Figure 5. Low Pass Circuit Topology.
Amp
Frequency
Figure 6. Low Pass Frequency Response.
The actual values of these
components may be calculated by
hand on a Smith Chart or more
accurately done on simulation
software such as ADS. There are
some advantages and disadvantages of choosing a high pass
versus a low pass. For instance, a
high pass circuit cuts off low
frequency gain, which narrows
the usable bandwidth of the
amplifier, but consequently helps
avoid potential low frequency
instability problems. A low pass
match offers a much broader
frequency response, but it has
two major disadvantages. First it
has the potential for low frequency instability, and second it
creates the need for an extra DC
blocking capacitor on the input
in order to isolate the device gate
from the preceding stages.
precipitously giving a narrow
band frequency response, yet still
wide enough to accommodate a
CDMA or WCDMA transmit band.
For more information on RF
matching techniques refer to
MGA-53543 application note.
Passive Bias [1]
Once the RF matching has been
established, the next step is to
DC bias the device. A passive
biasing example is shown in
Figure 8. In this example the
voltage drop across resistor R3
sets the drain current (Id) and is
calculated by the following
equation:
A voltage divider network with
R1 and R2 establishes the typical
gate bias voltage (Vg).
R1 =
R2 =
Vg
Ibb
(2)
p
(Vdd – Vg) x R1
Vg
Often the series resistor, R4, is
added to enhance the low frequency stability. The complete
passive bias example may be
found in reference [1].
C4
C1
INPUT
Q1
Zo
R3 =
Vdd – Vds
Ids + Ibb
(3)
p
L1 C2
(1)
OUTPUT
Zo
L4 C5
p
R4
where,
Vdd is the power supply voltage;
Vds is the device drain to source
voltage;
Ids is the device drain to source
current;
C3
R3
C6
Ib
R5
R1
R2
Vdd
Figure 8. Passive Biasing.
Ibb for DC stability is 10X the
typical gate current;
RFin
RFout
C3
C1
Zo
Zo
52
L1
C2
Total Response
Figure 7 displays the input and
output matching selected for
ATF-521P8. In this example the
input and output match both
essentially function as high pass
filters, but the high frequency
gain of the device rolls off
15
Output Match
ATF-521P8
Input Match
Amp
Amp
Amp
+
Frequency
Amp
+
Frequency
Figure 7. Input and Output Match for ATF-521P8 at 2 GHz.
=
Frequency
Frequency
Active Bias [2]
Due to very high DC power
dissipation and small package
constraints, it is recommended
that ATF-521P8 use active
biasing. The main advantage of
an active biasing scheme is the
ability to hold the drain to source
current constant over a wide
range of temperature variations.
A very inexpensive method of
accomplishing this is to use two
PNP bipolar transistors arranged
in a current mirror configuration
as shown in Figure 9. Due to
resistors R1 and R3, this circuit
is not acting as a true current
mirror, but if the voltage drop
across R1 and R3 is kept identical then it still displays some of
the more useful characteristics of
a current mirror. For example,
transistor Q1 is configured with
its base and collector tied
together. This acts as a simple PN
junction, which helps temperature compensate the EmitterBase junction of Q2.
R2
Q1
To calculate the values of R1, R2,
R3, and R4 the following parameters must be know or chosen
first:
Ids is the device drain-to-source
current;
IR is the Reference current for
active bias;
Vdd is the power supply voltage
available;
Vds is the device drain-to-source
voltage;
Vg is the typical gate bias;
Vbe1 is the typical Base-Emitter
turn on voltage for Q1 & Q2;
Therefore, resistor R3, which sets
the desired device drain current,
is calculated as follows:
R3 =
Vdd – Vds
Ids + IC2
(4)
p
IC2 is chosen for stability to be
10 times the typical gate current
R1
Vdd
R4 Vg
C6
R3
Vds
Q2
C5
C4
C3
R6
R5
C8
L3
L2
RFin
C1
L1
C2
Figure 9. Active Bias Circuit.
16
C7
2
2PL
RFout
7
ATF-521P8
L4
The next three equations are
used to calculate the rest of the
biasing resistors for Figure 9.
Note that the voltage drop across
R1 must be set equal to the
voltage drop across R3, but with
a current of IR.
R1 =
Vdd – Vds
IR
(5)
p
R2 sets the bias current through
Q1.
R2 =
Vds – Vbe1
IR
(6)
p
R4 sets the gate voltage for
ATF-521P8.
V
R4 = g
(7)
IC2
p
where,
VE
and also equal to the reference
current IR.
Thus, by forcing the emitter
voltage (VE) of transistor Q1
equal to Vds, this circuit regulates
the drain current similar to a
current mirror. As long as Q2
operates in the forward active
mode, this holds true. In other
words, the Collector-Base junction of Q2 must be kept reversed
biased.
PCB Layout
A recommended PCB pad layout
for the Leadless Plastic Chip
Carrier (LPCC) package used by
the ATF-521P8 is shown in
Figure 10. This layout provides
plenty of plated through hole vias
for good thermal and RF grounding. It also provides a good
transition from microstrip to the
device package. For more detailed dimensions refer to
Section 9 of the data sheet.
Figure 10. Microstripline Layout.
Source
Gate
Pin 8
Drain
P
Pin 6
Pin 5
Pin 3
Source
Bottom View
Figure 11. LPCC Package for ATF-521P8.
This simplifies RF grounding by
reducing the amount of inductance from the source to ground.
It is also recommended to ground
pins 1 and 4 since they are also
connected to the device source.
Pins 3, 5, 6, and 8 are not connected, but may be used to
help dissipate heat from the
package or for better alignment
when soldering the device.
This three-layer board (Figure
12) contains a 10-mil layer and a
52-mil layer separated by a
ground plane. The first layer is
Getek RG200D material with
dielectric constant of 3.8. The
second layer is for mechanical
RF Grounding
Unlike SOT packages, ATF-521P8
is housed in a leadless package
with the die mounted directly to
the lead frame or the belly of the
package shown in Figure 11.
rigidity and consists of FR4 with
dielectric constant of 4.2.
High Linearity Tx Driver
The need for higher data rates
and increased voice capacity gave
rise to a new third generation
standard know as Wideband
CDMA or UMTS. This new
standard requires higher performance from radio components
such as higher dynamic range
and better linearity. For example,
a WCDMA waveform has a very
high peak to average ratio which
forces amplifiers in a transmit
chain to have very good Adjacent
Channel Leakage power Ratio or
ACLR, or else operate in a
backed off mode. If the amplifier
is not backed off then the waveform is compressed and the
signal becomes very nonlinear.
This application example presents a highly linear transmit
drive for use in the 2.14GHz
frequency range. Using the RF
matching techniques described
earlier, ATF-521P8 is matched to
the following input and output
impedances:
Input
Match
BCV62B
S11* = 0.89∠ -169
Figure 13. ATF-521P8 Matching.
R3
C6
R6
R5
C4
C3
C7
C1
C2
L1
short
Figure 12. ATF-521P8 demoboard.
17
J2
0
L4
L3
L2
J1
ΓL = 0.53∠ -176
R1
0
R4
50 Ohm
50 Ohm
C5
R2
Output
Match
2PL
C8
Resistor
Calculated
Actual
R1
50Ω
49.9Ω
R2
385Ω
383Ω
R3
2.38Ω
2.37Ω
R4
62Ω
61.9Ω
20
Gain
15
GAIN and NF (dB)
As described previously the input
impedance must be matched to
S11* in order to guarantee return
loss greater than 10 dB. A high
pass network is chosen for this
match. The output is matched to
ΓL with another high pass
network. The next step is to
choose the proper DC biasing
conditions. From the data sheet,
ATF-521P8 produces good
linearity at a drain current of
200mA and a drain to source
voltage of 4.5V. Thus to construct
the active bias circuit described,
the following parameters are
given:
10
Table 1. Resistors for Active Bias.
5
NF
Ids = 200 mA
IR = 10 mA
Vdd = 5 V
Vds = 4.5V
Vg = 0.62 V
Vbe1 = 0.65V
Performance of ATF-521P8 at
2140 MHz
ATF-521P8 delivers excellent
performance in the WCDMA
frequency band. With a drain-tosource voltage of 4.5V and a
drain current of 200 mA, this
device has 16.5 dB of gain and
1.55 dB of noise figure as show in
Figure 15.
Using equations 4, 5, 6, and 7, the
biasing resistor values are
calculated in column 2 of table 1,
and the actual values used are
listed in column 3.
0
1.6
1.8
2.0
2.2
2.4
2.6
FREQUENCY (GHz)
Figure 15. Gain and Noise Figure vs. Frequency.
Input and output return loss are
both greater that 10 dB. Although
somewhat narrowband, the
response is adequate in the
frequency range of 2110 MHz to
2170 MHz for the WCDMA
downlink. If wider band response
is need, using a balanced configuration improves return loss and
doubles OIP3.
0
INPUT AND OUTPUT
RETURN LOSS (dB)
The entire circuit schematic for a
2.14 GHz Tx driver amplifier is
shown below in Figure 14.
Capacitors C4, C5, and C6 are
added as a low frequency bypass.
These terminate second order
harmonics and help improve
linearity. Resistors R5 and
R6 also help terminate low
frequencies, and can prevent
resonant frequencies between
the two bypass capacitors.
S11
-5
-10
S22
IR
R1=49.9Ω
R2=383Ω
Q1
Vg
Vbe1+
C4=1µF
C3=4.7pF
C1=1.2pF
L1=1.0nH
C2=1.5nH
Figure 14. 2140 MHz Schematic.
18
2.2
2.4
2.6
Figure 16. Input and Output Return Loss vs.
Frequency.
C6=.1µF
R6=1.2Ω
C7=150pF
L3=39nH
C8=1.5pF
2
2.0
R3=2.37Ω
IC2
R5=10Ω
1.8
FREQUENCY (GHz)
C5=1µF
L2=12nH
RFin
+5V
Vds
Q2
R4=61.9Ω
-15
1.6
2PL
7
ATF-521P8
RFout
L4=3.9nH
Perhaps the most critical system
level specification for the
ATF-521P8 lies in its distortionless output power. Typically,
amplifiers are characterized for
linearity by measuring OIP3. This
is a two-tone harmonic measurement using CW signals. But
because WCDMA is a modulated
waveform spread across
3.84 MHz, it is difficult to correlated good OIP3 to good ACLR.
Thus, both are measured and
presented to avoid ambiguity.
OIP3 (dBm)
40
35
30
25
2060 2080 2100 2120 2140 2160 2180 2200
FREQUENCY (MHz)
Figure 17. OIP3 vs. Frequency in WCDMA Band
(Pout = 12 dBm).
-30
Using the 3GPP standards
document Release 1999 version
2002-6, the following channel
configuration was used to test
ACLR. This table contains the
power levels of the main channels used for Test Model 1. Note
that the DPCH can be made up of
16, 32, or 64 separate channels
each at different power levels
and timing offsets. For a listing
of power levels, channelization
codes and timing offset see the
entire 3GPP TS 25.141 V3.10.0
(2002-06) standards document
at: http://www.3gpp.org/specs/
specs.htm
-35
ACLR (dB)
-40
-45
3GPP TS 25.141 V3.10.0 (2002-06)
Type
Pwr (dB)
-50
P-CCPCH+SCH
-10
-55
Primary CPICH
-10
-60
PICH
-18
S-CCPCH containing PCH
(SF=256)
-18
DPCH-64ch
(SF=128)
-1.1
-65
-3
2
7
12
17
22
Pout (dBm)
Figure 18. ACLR vs. Pout at 5 MHz Offset.
Table 3. ACLR Channel Power Configuration.
C1=1.2 pF
Phycomp 0402CG129C9B200
C2,C8=1.5 pF
Phycomp 0402CG159C9B200
C3=4.7 pF
Phycomp 0402CG479C9B200
C4,C6=.1 µF
Phycomp 06032F104M8B200
C5=1 µF
AVX 0805ZC105KATZA
C7=150 pF
Phycomp 0402CG151J9B200
L1=1.0 nH
TOKO LL1005-FH1n0S
L2=12 nH
TOKO LL1005-FS12N
L3=39 nH
TOKO LL1005-FS39
L4=3.9 nH
TOKO LL1005-FH3N9S
R1=49.9Ω
RohmRK73H1J49R9F
R2=383Ω
Rohm RK73H1J3830F
R3=2.37Ω
Rohm RK73H1J2R37F
R4=61.9Ω
Rohm RK73H1J61R9F
R5=10Ω
Rohm RK73H1J10R0F
R6=1.2Ω
Rohm RK73H1J1R21F
Q1, Q2
Philips BCV62C
J1, J2
142-0701-851
Table 2. 2140 MHz Bill of Material.
19
Thermal Design
When working with medium to
high power FET devices, thermal
dissipation should be a large part
of the design. This is done to
ensure that for a given ambient
temperature the transistor’s
channel does not exceed the
maximum rating, TCH, on the
data sheet. For example,
ATF-521P8 has a maximum
channel temperature of 150°C
and a channel to board thermal
resistance of 45°C/W, thus the
entire thermal design hinges
from these key data points. The
question that must be answered
is whether this device can
operate in a typical environment
with ambient temperature
fluctuations from -25°C to 85°C.
From Figure 19, a very useful
equation is derived to calculate
the temperature of the channel
for a given ambient temperature.
These calculations are all incorporated into Agilent Technologies AppCAD.
Tch
(channel)
Pdiss = Vds x Ids
45
θch-b
Tb (board
or belly
of the part)
θb-s
Ts (sink)
θs-a
Ta (ambient)
Figure 19. Equivalent Circuit for Thermal
Resistance.
Hence very similar to Ohms Law,
the temperature of the channel is
calculated with equation 8 below.
TCH = Pdiss (θch–b + θ b–s + θs–a )
+ Tamb
(8)
If no heat sink is used or heat
sinking is incorporated into the
PCB board then equation 8 may
be reduced to:
TCH = Pdiss (θch–b + θ b–a ) + Tamb (9)
where,
θb–a is the board to ambient
thermal resistance;
θch–b is the channel to board
thermal resistance.
The board to ambient thermal
resistance thus becomes very
important for this is the
designer’s major source of heat
control. To demonstrate the
influence of θb-a, thermal resistance is measured for two very
different scenarios using the
ATF-521P8 demoboard. The first
case is done with just the
demoboard by itself. The second
case is the ATF demoboard
mounted on a chassis or metal
casing, and the results are given
below:
ATF Demoboard
θ b-a
PCB 1/8" Chassis
10.4°C/W
PCB no HeatSink
32.9°C/W
Table 4. Thermal resistance measurements.
Therefore calculating the temperature of the channel for these
two scenarios gives a good
indication of what type of heat
sinking is needed.
Case 1: Chassis Mounted @ 85°C
Tch = P x (θch-b + θb-a) + Ta
=.9W x (45+10.4)°C/W +85°C
Tch = 135°C
Case 2: No Heatsink @ 85°C
Tch = P x (θch-b + θb-a) + Ta
=.9W x (45+32.9)°C/W + 85°C
Tch = 155°C
In other words, if the board is
mounted to a chassis, the channel temperature is guaranteed to
be 135°C safely below the 150°C
maximum. But on the other
hand, if no heat sinking is used
and the θb-a is above 27°C/W
(32.9°C/W in this case), then the
power must be derated enough to
20
lower the temperature below
150°C. This can be better understood with Figure 20 below. Note
power is derated at 13 mW/°C
for the board with no heat sink
and no derating is required for
the chassis mounted board until
an ambient temperature of
100°C.
Pdiss
(W)
Mounted on Chassis
(18 mW/°C)
0.9W
0
81
100
Summary
A high linearity Tx driver
amplifier for WCDMA has been
presented and designed using
Agilent’s ATF-521P8. This
includes RF, DC and good thermal dissipation practices for
reliable lifetime operation. A
summary of the typical performance for ATF-521P8 demoboard
at 2140 MHz is as follows:
Demo Board Results at 2140 MHz
No Heatsink
(13 mW/°C)
Gain
16.5 dB
Tamb (°C)
OIP3
41.2 dBm
ACLR
-58 dBc
P1dB
24.8 dBm
NF
1.55 dB
150
Figure 20. Derating for ATF- 521P8.
Thus, for reliable operation of
ATF-521P8 and extended MTBF,
it is recommended to use some
form of thermal heatsinking. This
may include any or all of the
following suggestions:
• Maximize vias underneath and
around package;
• Maximize exposed surface
metal;
• Use 1 oz or greater copper clad;
• Minimize board thickness;
• Metal heat sinks or extrusions;
• Fans or forced air;
• Mount PCB to Chassis.
References
[1] Ward, A. (2001) Agilent
ATF-54143 Low Noise Enhancement Mode Pseudomorphic
HEMT in a Surface Mount
Plastic Package, 2001 [Internet],
Available from:
<http://www.agilent.com/view/rf>
[Accessed 22 August, 2002].
[2] Biasing Circuits and
Considerations for GaAs
MESFET Power Amplifiers, 2001
[Internet], Available from:
<http://www.rf-solutions.com/
pdf/AN-0002_ajp.pdf> [Accessed
22 August, 2002]
Device Models
Refer to Agilent’s Web Site
www.agilent.com/view/rf
Ordering Information
Part Number
No. of Devices
Container
ATF-521P8-TR1
3000
7” Reel
ATF-521P8-TR2
10000
13”Reel
ATF-521P8-BLK
100
antistatic bag
2 x 2 LPCC (JEDEC DFP-N) Package Dimensions
D1
D
pin1
P
pin1
8
1
2
e
E1
3
R
2PX
4
5
Top View
Bottom View
A1
A
A2
End View
End View
DIMENSIONS
SYMBOL
A
A1
A2
b
D
D1
E
E1
e
MIN.
0.70
0
0.225
1.9
0.65
1.9
1.45
NOM.
0.75
0.02
0.203 REF
0.25
2.0
0.80
2.0
1.6
0.50 BSC
DIMENSIONS ARE IN MILLIMETERS
21
E
6
b
L
A
7
MAX.
0.80
0.05
0.275
2.1
0.95
2.1
1.75
PCB Land Pattern and Stencil Design
2.72 (107.09)
2.80 (110.24)
0.70 (27.56)
0.63 (24.80)
0.25 (9.84)
0.22 (8.86)
0.25 (9.84)
PIN 1
φ0.20 (7.87)
0.50 (19.68)
0.50 (19.68)
Solder
mask
RF
transmission
line
0.32 (12.79)
PIN 1
1.54 (60.61)
1.60 (62.99)
0.28 (10.83)
+
0.60 (23.62)
0.25 (9.74)
0.63 (24.80)
0.72 (28.35)
0.80 (31.50)
0.15 (5.91)
0.55 (21.65)
Stencil Layout (top view)
PCB Land Pattern (top view)
Device Orientation
4 mm
REEL
8 mm
CARRIER
TAPE
USER
FEED
DIRECTION
COVER TAPE
22
2PX
2PX
2PX
2PX
Tape Dimensions
P0
P
D
P2
E
F
W
+
+
D1
Tt
t1
K0
10° Max
10° Max
A0
DESCRIPTION
CAVITY
PERFORATION
CARRIER TAPE
COVER TAPE
DISTANCE
23
B0
SYMBOL
SIZE (mm)
SIZE (inches)
LENGTH
A0
2.30 ± 0.05
0.091 ± 0.004
WIDTH
B0
2.30 ± 0.05
0.091 ± 0.004
DEPTH
K0
1.00 ± 0.05
0.039 ± 0.002
PITCH
P
4.00 ± 0.10
0.157 ± 0.004
BOTTOM HOLE DIAMETER
D1
1.00 + 0.25
0.039 + 0.002
DIAMETER
D
1.50 ± 0.10
0.060 ± 0.004
PITCH
P0
4.00 ± 0.10
0.157 ± 0.004
POSITION
E
1.75 ± 0.10
0.069 ± 0.004
WIDTH
W
THICKNESS
t1
8.00 + 0.30
8.00 – 0.10
0.254 ± 0.02
0.315 ± 0.012
0.315 ± 0.004
0.010 ± 0.0008
WIDTH
C
5.4 ± 0.10
0.205 ± 0.004
TAPE THICKNESS
Tt
0.062 ± 0.001
0.0025 ± 0.0004
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 ± 0.05
0.138 ± 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P2
2.00 ± 0.05
0.079 ± 0.002
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Data subject to change.
Copyright © 2003 Agilent Technologies, Inc.
Obsoletes 5988-8403
July 29, 2003
5988-9974EN