74LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATEÉ Outputs General Description Features The LVX4245 is a dual-supply, 8-bit translating transceiver that is designed to interface between a 5V bus and a 3V bus in a mixed 3V/5V supply environment. The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition. The A port interfaces with the 5V bus; the B port interfaces with the 3V bus. The LVX4245 is suitable for mixed voltage applications such as laptop computers using 3.3V CPU’s and 5V LCD displays. Y Logic Symbol Y Y Y Y Y Y Y Bidirectional interface between 5V and 3V buses Control inputs compatible with TTL level 5V data flow at A port and 3V data flow at B port Outputs source/sink 24 mA at 5V bus; 12 mA at 3V bus Guaranteed simultaneous switching noise level and dynamic threshold performance Available in SOIC, QSOP and TSSOP packages Implements patented Quiet Series EMI reduction circuitry Functionally compatible with the 74 series 245 Connection Diagram Pin Assignment for SOIC, QSOP and TSSOP TL/F/11540 – 1 Pin Names OE T/R A0 – A7 B0 – B7 Description Output Enable Input Transmit/Receive Input Side A Inputs or TRI-STATE Outputs Side B Inputs or TRI-STATE Outputs TL/F/11540 – 2 Order Number SOIC JEDEC QSOP TSSOP 74LVX4245WM 74LVX4245WMX 74LVX4245QSC 74LVX4245QSCX 74LVX4245MTC 74LVX4245MTCX M24B MQA24 MTC24 See NS Package Number TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/11540 RRD-B30M115/Printed in U. S. A. 74LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs October 1995 Truth Table Inputs Outputs OE T/R L L H L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State Logic Diagram TL/F/11540 – 6 2 Absolute Maximum Ratings (Note) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage VCCA VCCB b 0.5V to a 7.0V Supply Voltage (VCCA, VCCB) b 0.5V to VCCA a 0.5V DC Input Voltage (VI) @ OE, T/R DC Input/Output Voltage (VI/O) @ A(n) b 0.5V to VCCA a 0.5V @ B(n) b 0.5V to VCCB a 0.5V g 20 mA DC Input Diode Current (IIN) @ OE, T/R g 50 mA DC Output Diode Current (IOK) g 50 mA DC Output Source or Sink Current (IO) DC VCC or Ground Current g 50 mA per Output Pin (ICC or IGND) g 200 mA and Max Current @ ICCA @ I g 100 mA CCB b 65§ C to a 150§ C Storage Temperature Range (TSTG) g 300 mA DC Latch-Up Source or Sink Current Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation . Input Voltage (VI) @ OE, T/R Input/Output Voltage (VI/O) @ A(n) @ B(n) Free Air Operating Temperature (TA) 74LVX Minimum Input Edge Rate (Dt/DV) VIN from 30% to 70% of VCC VCC @ 3.0V, 4.5V, 5.5V 4.5V to 5.5V 2.7V to 3.6V 0V to VCCA 0V to VCCA 0V to VCCB b 40§ C to a 85§ C 8 ns/V DC Electrical Characteristics Symbol VCCA (V) Parameter VCCB (V) 74LVX4245 74LVX4245 TA a 25§ C TA e b40§ C to a 85§ C Typ VIHA VIHB VILA 5.5 4.5 3.3 3.3 2.0 2.0 2.0 2.0 B(n) 5.0 5.0 3.6 2.7 2.0 2.0 2.0 2.0 Maximum Low Level Input Voltage A(n), T/R, OE 5.5 4.5 3.3 3.3 0.8 0.8 0.8 0.8 B(n) 5.0 5.0 2.7 3.6 0.8 0.8 0.8 0.8 4.5 4.5 3.0 3.0 4.5 4.25 4.4 3.86 4.4 3.76 V IOUT e b100 mA IOH e b24 mA 4.5 4.5 4.5 3.0 3.0 2.7 2.99 2.8 2.5 2.9 2.4 2.4 2.9 2.4 2.4 V IOUT e b100 mA IOH e b12 mA IOL e b8 mA 4.5 4.5 3.0 3.0 0.002 0.18 0.1 0.36 0.1 0.44 V IOUT e 100 mA IOL e 24 mA 4.5 4.5 4.5 3.0 3.0 2.7 0.002 0.1 0.1 0.1 0.31 0.31 0.1 0.4 0.4 V IOUT e 100 mA IOL e 12 mA IOL e 8 mA Maximum Input Leakage Current @ OE, T/R 5.5 3.6 g 0.1 g 1.0 mA Maximum TRI-STATE Output Leakage @ A(n) 5.5 3.6 g 0.5 g 5.0 mA Minimum High Level Output Voltage Maximum Low Level Output Voltage VOLB IIN IOZA Guaranteed Limits A(n), T/R, OE VOHB VOLA Conditions Minimum High Level Input Voltage VILB VOHA Units V V VOUT s 0.1V or t VCC b 0.1V VOUT s 0.1V or t VCC b 0.1V VI e VCCA, GND 3 VI e VIL, VIH OE e VCCA VO e VCCA, GND DC Electrical Characteristics (Continued) Symbol Parameter VCCA (V) VCCB (V) 74LVX4245 74LVX4245 TA e a 25§ C TA e b40§ C to a 85§ C Typ IOZB DICC ICCA Maximum TRI-STATE Output Leakage @ B(n) 5.5 3.6 Maximum ICCT/Input @ A(n), T/R, OE 5.5 3.6 Input 5.5 3.6 @ B(n) Units Conditions Guaranteed Limits 1.0 VI e VIL, VIH OE e VCCA VO e VCCB, GND g 0.5 g 5.0 mA 1.35 1.5 mA 0.35 0.5 mA VI e VCCB b 0.6V VI e VCCA b 2.1V Quiescent VCCA Supply Current 5.5 3.6 8 80 mA A(n) e VCCA or GND B(n) e VCCB or GND, OE e GND T/R e GND Quiescent VCCB Supply Current 5.5 3.6 5 50 mA A(n) e VCCA or GND B(n) e VCCB or GND, OE e GND T/R e VCCA VOLPA VOLPB Quiet Output Maximum Dynamic VOL 5.0 5.0 3.3 3.3 1.5 0.8 V VOLVA VOLVB Quiet Output Minimum Dynamic VOL 5.0 5.0 3.3 3.3 b 1.2 b 0.8 V VIHDA VIHDB Minimum High Level Dynamic Input Voltage 5.0 5.0 3.3 3.3 2.0 2.0 V VILDA VILDB Maximum Low Level Dynamic Input Voltage 5.0 5.0 3.3 3.3 0.8 0.8 V ICCB (Notes 1, 2) (Notes 1, 2) (Notes 1, 3) (Notes 1, 3) ² Maximum test duration 2.0 ms, one output loaded at a time. Note 1: Worst case package. Note 2: Max number of outputs defined as (n). Data inputs are driven 0V to VCC level; one output at GND. Note 3: Max number of Data Inputs (n) switching. (n b 1) inputs switching 0V to VCC level. Input-under-test switching: VCC level to threshold (VIHD), OV to threshold (VILD), f e 1 MHz. 4 AC Electrical Characteristics Symbol Parameters 74LVX4245 74LVX4245 74LVX4245 TA e a 25§ C CL e 50 pF *VCCA e 5V **VCCB e 3.3V TA e b40§ C to a 85§ C CL e 50 pF *VCCA e 5V **VCCB e 3.3V TA e b40§ C to a 85§ C CL e 50 pF *VCCA e 5V VCCB e 2.7V Units Min Typ Max Min Max Min Max tPHL tPLH Propagation Delay A to B 1.0 1.0 5.1 5.3 8.5 8.5 1.0 1.0 9.0 9.0 1.0 1.0 10.0 10.0 ns tPHL tPLH Propagation Delay B to A 1.0 1.0 5.4 5.5 8.5 8.5 1.0 1.0 9.0 9.0 1.0 1.0 10.0 10.0 ns tPZL tPZH Output Enable Time OE to B 1.0 1.0 6.5 6.7 10.0 10.0 1.0 1.0 10.5 10.5 1.0 1.0 11.5 11.5 ns tPZL tPZH Output Enable Time OE to A 1.0 1.0 5.2 5.8 9.0 9.0 1.0 1.0 9.5 9.5 1.0 1.0 10.0 10.0 ns tPHZ tPLZ Output Disable Time OE to B 1.0 1.0 6.0 3.3 9.5 6.5 1.0 1.0 10.0 7.0 1.0 1.0 10.0 7.5 ns tPHZ tPLZ Output Disable Time OE to A 1.0 1.0 3.9 2.9 7.0 6.5 1.0 1.0 7.5 7.0 1.0 1.0 7.5 7.5 ns tOSHL tOSLH Output to Output Skew*** Data to Output 1.0 1.5 1.5 ns 1.5 *Voltage Range 5.0V is 5.0V g 0.5V. **Voltage Range 3.3V is 3.3V g 0.3V. ***Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Capacitance Typ Units Conditions CIN Symbol Input Capacitance Parameter 4.5 pF VCC e Open CI/O Input/Output Capacitance 15 pF VCCA e 5.0V VCCB e 3.3V CPD Power Dissipation Capacitance BxA 55 pF VCCA e 5.0V AxB 40 pF VCCB e 3.3V CPD is measured at 10 MHz 8-Bit Dual Supply Translating Transceiver The LVX4245 is a dual supply device capable of bidirectional signal translation. This level shifting ability provides an efficient interface between low voltage CPU local bus with memory and a standard bus defined by 5V I/O levels. The device control inputs can be controlled by either the low voltage CPU and core logic or a bus arbitrator with 5V I/O levels. Manufactured on a sub-micron CMOS process, the LVX4245 is ideal for mixed voltage applications such as notebook computers using 3.3V CPU’s and 5V peripheral devices. TL/F/11540 – 3 5 Applications: Mixed Mode Dual Supply Interface Solution This device is also configured as an 8-bit 245 transceiver, giving the designer TRI-STATE capabilities and the ability to select either bidirectional or unidirectional modes. Since the center 20 pins are also pin compatible to 74 series 245, as shown in Figure 2 , the designer could use this device in either a 3V system or a 5V system without any further work to re-layout the board. LVX4245 is designed to solve 3V/5V interfacing issues when CMOS devices cannot tolerate I/O levels above their applied VCC. If an I/O pin of 3V ICs is driven by 5V ICs, the P-Channel transistor in 3V ICs will conduct causing current flow from I/O bus to the 3V power supply. The resulting high current flow can cause destruction of 3V ICs through latchup effects. To prevent this problem, a current limiting resistor is used typically under direct connection of 3V ICs and 5V ICs, but it causes speed degradation. In a better solution, the LVX4245 configures two different output levels to handle the dual supply interface issues. The ‘‘A’’ port is a dedicated 5V port to interface 5V ICs. The ‘‘B’’ port is a dedicated port to interface 3V ICs. Figure 1 shows how LVX4245 fits into a system with 3V subsystem and 5V subsystem. TL/F/11540 – 4 FIGURE 2. LVX4245 Pin Arrangment is Compatible to 20-Pin 74 Series 245 TL/F/11540 – 5 FIGURE 1. LVX4245 Fits into a System with 3V Subsystem and 5V Subsystem 6 74LVX4245 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74LVX 4245 MW X Temperature Range Family 74 e Commercial Special Variations ‘‘X’’ e Tape and Reel ‘‘ ’’ e Rail/Tube Device Type Package Code WM e Small Outline JEDEC SOIC (0.300× Wide) QSC e Molded Shrink Small Outline Package, JEDEC (also known as QSOP) inches Physical Dimensions millimeters 24-Lead (0.300× Wide) Small Outline Package (WM) Order Number 74LVX4245WM or 74LVX4245WMX NS Package Number M24B 7 74LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs Physical Dimensions inches (Continued) 24-Lead, Molded Shrink Small Outline Package, JEDEC (QSC) (also known as: QSOP) Order Number 74LVX4245QSC or 74LVX4245QSCX NS Package Number MQA24 LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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