LCDP1521 Dual line programmable transient voltage suppressor for SLIC protection Features ■ Dual line programmable transient voltage suppressor ■ Wide negative firing voltage range: ■ VMGL = -150 V max. ■ Low dynamic switching voltages: VFP and VDGL ■ Low gate triggering current: IGT = 5 mA max ■ Peak pulse current: IPP = 20 A (10/1000 µs) ■ Holding current: IH = 150 mA min SO-8 Description This device has been especially designed to protect 2 new high voltage, as well as classical SLICs, against transient overvoltages. Positive overvoltages are clamped by 2 diodes. Negative surges are suppressed by 2 thyristors, their breakdown voltage being referenced to -VBAT through the gate. This component presents a very low gate triggering current (IGT) in order to reduce the current consumption on printed circuit board during the firing phase. Benefits Functional diagram TIP 1 1 8 RING 1 GATE 2 7 GND GATE 3 6 GND TIP 2 4 5 RING 2 Trisils are not subject to ageing and provide a fail safe mode in short circuit for a better protection. Trisils are used to help equipment to meet various standards such as UL1950, IEC950 / CSA C22.2, UL1459 and FCC part68. Trisils have UL94 V0 resin approved (Trisils are UL497B approved (file: E136224)). Rev 3 1/11 February 2006 www.st.com 11 LCDP1521 1 Compliant with the following standards 1 Compliant with the following standards STANDARD Peak Surge Voltage (V) Voltage Waveform Required peak current (A) Current Waveform Minimum serial resistor to meet standard (Ω) GR-1089 Core First level 2500 1000 2/10 µs 10/1000 µs 500 100 2/10 µs 10/1000 µs 31 40 GR-1089 Core Second level 5000 2/10 µs 500 2/10 µs 62 GR-1089 Core Intra-building 1500 2/10 µs 100 2/10 µs 7 ITU-T-K20/K21 6000 1500 10/700 µs 150 37.5 5/310 µs 200 20 ITU-T-K20 (IEC61000-4-2) 8000 15000 1/60 ns VDE0433 4000 2000 10/700 µs 100 50 5/310 µs 120 40 VDE0878 4000 2000 1.2/50 µs 100 50 1/20 µs 27 0 IEC61000-4-5 4000 4000 10/700 µs 1.2/50 µs 100 100 5/310 µs 8/20 µs 120 27 FCC Part 68, lightning surge type A 1500 800 10/160 µs 10/560 µs 200 100 10/160 µs 10/560 µs 43 32 FCC Part 68, lightning surge type B 1000 9/720 µs 25 5/320 µs 0 2 Characteristics 2.1 Thermal resistance 2/11 ESD contact discharge ESD air discharge 0 0 Symbol Parameter Value Unit Rth (j-a) Junction to ambient 170 °C/W LCDP1521 2.2 2 Characteristics Electrical characteristics (TAMB = 25°C) Symbol Parameter IGT Gate triggering current IH Holding current IRM Reverse leakage current LINE / GND IRG Reverse leakage current GATE / LINE VRM Reverse voltage LINE / GND VGT Gate triggering voltage I VR VRM VF VF Forward drop voltage LINE / GND IRM IR VFP Peak forward voltage LINE / GND IH VDGL Dynamic switching voltage GATE / LINE VGATE GATE / GND voltage VRG Reverse voltage GATE / LINE C Capacitance LINE / GND V IPP 2.3 Absolute ratings (Tamb = 25° C, unless otherwise specified). Symbol Value Unit 10/1000 µs 8/20 µs 10/560 µs 5/310 µs 10/160 µs 1/20 µs 2/10 µs 20 60 20 25 30 60 70 A Non repetitive surge peak on-state current (50 Hz sinusoidal) t = 10ms t = 1s 5 3.5 A I2t value for fusing (50 Hz sinusoidal) t = 10 ms 0.125 A2s IGSM Maximum gate current (50 Hz sinusoidal) t = 10 ms 2 A VMLG VMGL Maximum voltage LINE/GND Maximum voltage GATE/LINE -40° C < Tamb < +85° C -40° C < Tamb < +85° C -150 -150 V Tstg Tj Storage temperature range Maximum junction temperature - 55 to + 150 150 °C 260 °C IPP ITSM I2t TL Parameter Peak pulse current (see note1) Maximum lead temperature for soldering during 10 s 3/11 LCDP1521 2 Characteristics Figure 1. Repetitive peak pulse current tr: rise time (µs) tp: pulse duration (µs) ex: Pulse waveform 10/1000 µs tr = 10µs tp = 1000 µs % IPP 100 50 0 2.4 tr t tp Parameters related to the diode line / GND (Tamb = 25°C) Symbol Test conditions VF VFP (Note 1) IF = 1 A 10/700 µs 1.2/50 µs 2/10 µs t = 500 µs RS = 110 Ω RS = 60 Ω RS = 245 Ω 1.5 kV 1.5 kV 2.5 kV IPP = 10 A IPP = 15 A IPP = 10 A Max Unit 2 V 5 10 20 V Note: 1 See test circuit for VFP; RS is the protection resistor located on the line card. 2.5 Parameters related to the protection thyristor (Tamb = 25°C unless otherwise specified) Symbol Test conditions Min Max Unit 5 mA IGT VGND / LINE = -48 V 0.1 IH VGATE = -48 V (Note 2) 150 VGT at IGT IRG VRG = -150 V VRG = -150 V VDGL VGATE = -48 V (Note 3) 10/700 µs 1.2/50 µs 2/10 µs 1.5 kV 1.5 kV 2.5 kV RS = 110 Ω RS = 60 Ω RS = 245 Ω mA 2.5 V Tc=25°C Tc=85°C 5 50 µA IPP = 10 A IPP = 15 A IPP = 10 A 5 10 20 V 2 See functional holding current (IH) test circuit 3 See test circuit for VDGL. The oscillations with a time duration lower than 50ns are not taken into account 4/11 LCDP1521 2.6 3 Functional holding current (IH) test circuit: go no-go test Parameters related to diode and protection thyristor (Tamb = 25° C, unless otherwise specified) Symbol 3 Test conditions IRM VGATE / LINE = -1V VGATE / LINE = -1V VRM = -150 V VRM = -150 V C VR = 50 V bias, VRMS = 1 V, F = 1 MHz VR = 2 V bias, VRMS = 1 V, F = 1 MHz Typ. Max. Unit 5 50 µA Tc=25° C Tc=85° C 20 48 pF Functional holding current (IH) test circuit: go no-go test R VBAT = - 100V Surge generator D.U.T This is a GO-NO GO test which confirms the holding current (IH) level in a functional test circuit. TEST PROCEDURE : – Adjust the current level at the IH value by short circuiting the D.U.T. – Fire the D.U.T. with a surge current : IPP = 10 A, 10/1000 µs. – The D.U.T. will come back to the off-state within a duration of 50 ms max. 5/11 LCDP1521 4 Test circuit for vfp and vdgl parameters 4 Test circuit for vfp and vdgl parameters R4 (VP is defined in unload condition) TIP L R2 RING R3 R1 C1 VP C2 GND Table 1. 5 Test circuit component values Pulse (µs) Vp C1 C2 L R1 R2 R3 R4 IPP Rs tr tp (V) (µF) (nF) (µH) (Ω) (Ω) (Ω) (Ω) (A) (Ω) 10 700 1500 20 200 0 50 15 25 25 10 110 1.2 50 1500 1 33 0 76 13 25 25 15 60 2 10 2500 10 0 1.1 1.3 0 3 3 10 245 Technical information Figure 2. LCDP1521 concept behavior. Rs1 L1 TIP GND -Vbat V Tip ID1 IG T1 Th1 D1 Gate GND C Rs2 RING VRing L2 Figure 2 shows the classical protection circuit using the LCDP1521 crowbar concept. This topology has been developed to protect the new high voltage SLICs. This supports the programming of the negative firing threshold while the positive clamping value is fixed at GND. 6/11 LCDP1521 5 Technical information When a negative surge occurs on one wire (L1 for example), a current IG flows through the base of the transistor T1 and then injects a current in the gate of the thyristor Th1. Th1 fires and all the surge current flows through the ground. After the surge when the current flowing through Th1 becomes less negative than the holding current IH, then Th1 switches off. When a positive surge occurs on one wire (L1 for example), the diode D1 conducts and the surge current flows through the ground. The capacitor C is used to speed up the crowbar structure firing during the fast surge edges. This mimimizes the dynamic breakover voltage at the SLIC Tip and Ring inputs during fast strikes. Note that this capacitor is generally present around the SLIC - VBAT pin. So, to be efficient, it has to be as close as possible to the LCDP1521 Gate pin and to the reference ground track (or plan). The optimized value for C is 220 nF. The series resitors Rs1 and Rs2 in Figure 2 represent the fuse resistors or the PTC which are mandatory to withstand the power contact or the power induction tests imposed by the various country standards. Taking into account this fact, the actual lightning surge current flowing through the LCDP is equal to: I surge = V surge / (Rg + Rs) With V surge = peak surge voltage imposed by the standard. Rg = series resistor of the surge generator Rs = series resistor of the line card (equivalent to PTC + R on Figure 3.) Example: For a line card with 60 Ω of series resistors which has to be qualified under GR1089 Core 1000V 10/1000µs surge, the actual current through the LCDP1521 is equal to: I surge = 1000 / (10 + 60) = 14A The LCDP1521 is particularly optimized for the new telecom applications such as the fiber in the loop, the WLL, the remote central office. In this case, the operating voltages are smaller than in the classical system. This makes the high voltage SLICs particularly suitable. The schematics of Figure 3 shows the topologies most frequently used for these applications. Protection of high voltage SLICs -Vbat PTC or Fuse Ring relay 1 R Line 1 LCDPxxxx TIP SLIC 1 R PTC or Fuse RING R PTC or Fuse Ring relay 2 Figure 3. Line 2 SLIC 2 R PTC or Fuse 7/11 LCDP1521 6 Ordering information scheme Figure 4. Surge peak current versus overload duration. ITSM(A) 7 F=50Hz Tj initial=25°C 6 5 4 3 2 1 t(s) 0 0.01 Figure 5. 0.10 1.00 10.00 100.00 1000.00 Relative variation of holding current versus junction temperature IH ( Tj ) / IH ( Tj=25°C ) 1.3 1.2 1.1 1 0.9 0.8 Tj ( °C ) 0.7 -40 -30 -20 -10 6 10 20 30 40 50 60 Ordering information scheme LCDP Line Card Dual Protection Holding Current 15 = 150 mA Version 2 = devices protected Package 1 = SO-8 Packaging Blanck = Tube RL = Tape & Reel 8/11 0 15 2 1 RL 70 80 90 LCDP1521 7 7 Package mechanical data SO-8 (Plastic) Package mechanical data SO-8 (Plastic) DIMENSIONS REF. Millimetres Min. A L c1 a1 C a a2 0.1 a2 a1 S D M 5 F Max. 1.75 0.069 0.25 0.004 0.010 1.65 0.065 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 C 0.25 0.50 0.010 0.020 0.50 4 45° (typ) D 4.8 5.0 0.189 0.197 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.15 0.157 L 0.4 1.27 0.016 0.050 0.6 0.024 M S 8 Typ. b c1 1 Min. E e3 8 Max. A e b Typ. Inches 8° (max) Ordering Information Order code Marking Package Weight Base qty Delivery mode LCDP1521 CDP152 SO-8 0.08 g 100 Tube LCDP1521RL(1) CDP152 SO-8 0.08 g 2500 Tape and Reel 1. Preferred device 9/11 LCDP1521 9 Revision history 9 10/11 Revision history Date Revision Changes March 2002 1 Initial release. 24-Jun-2005 2 Peak Pulse Current changed from 15 to 20 A (10/1000 µs) 07-Feb-2006 3 Added footnote to ordering information table LCDP1521 9 Revision history Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 11/11