NEC 2SJ598-Z

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SJ598
SWITCHING
P-CHANNEL POWER MOS FET
ORDERING INFORMATION
DESCRIPTION
The 2SJ598 is P-channel MOS Field Effect Transistor designed
PART NUMBER
PACKAGE
2SJ598
TO-251 (MP-3)
2SJ598-Z
TO-252 (MP-3Z)
for solenoid, motor and lamp driver.
FEATURES
• Low on-state resistance:
RDS(on)1 = 130 mΩ MAX. (VGS = –10 V, ID = –6 A)
RDS(on)2 = 190 mΩ MAX. (VGS = –4.0 V, ID = –6 A)
• Low Ciss: Ciss = 720 pF TYP.
• Built-in gate protection diode
• TO-251/TO-252 package
(TO-251)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
–60
V
Gate to Source Voltage (VDS = 0 V)
VGSS
m20
V
Drain Current (DC) (TC = 25°C)
ID(DC)
m12
A
Drain Current (pulse)
Note1
ID(pulse)
m30
A
Total Power Dissipation (TC = 25°C)
PT
23
W
Total Power Dissipation (TA = 25°C)
PT
1.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to +150
°C
Single Avalanche Current Note2
IAS
–12
A
Note2
EAS
14.4
mJ
Single Avalanche Energy
(TO-252)
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = –30 V, RG = 25 Ω, VGS = –20 → 0 V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D14656EJ4V0DS00 (4th edition)
Date Published August 2004 NS CP(K)
Printed in Japan
The mark
shows major revised points.
2000, 2001
2SJ598
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
IDSS
VDS = –60 V, VGS = 0 V
–10
µA
Gate Leakage Current
IGSS
VGS = m16 V, VDS = 0 V
m10
µA
VGS(off)
VDS = –10 V, ID = –1 mA
–2.5
V
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
–1.5
–2.0
5
11
| yfs |
VDS = –10 V, ID = –6 A
S
RDS(on)1
VGS = –10 V, ID = –6 A
102
130
mΩ
RDS(on)2
VGS = –4.0 V, ID = –6 A
131
190
mΩ
Input Capacitance
Ciss
VDS = –10 V
720
pF
Output Capacitance
Coss
VGS = 0 V
150
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
50
pF
Turn-on Delay Time
td(on)
ID = –6 A
7
ns
tr
VGS = –10 V
4
ns
td(off)
VDD = –30 V
35
ns
tf
RG = 0 Ω
10
ns
Total Gate Charge
QG
ID = –12 A
15
nC
Gate to Source Charge
QGS
VDD= –48 V
3
nC
Gate to Drain Charge
QGD
VGS = –10 V
4
nC
Rise Time
Turn-off Delay Time
Fall Time
Body Diode Forward Voltage
VF(S-D)
IF = 12 A, VGS = 0 V
0.98
V
Reverse Recovery Time
trr
IF = 12 A, VGS = 0 V
50
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A /µs
100
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
D.U.T.
L
RL
50 Ω
PG.
VGS = −20 → 0 V
VDD
RG
PG.
VGS(−)
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS(−)
−
IAS
BVDSS
VDS
ID
VGS(−)
0
VDS
Wave Form
τ
VDD
Starting Tch
τ = 1 µs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
2
IG = −2 mA
RL
50 Ω
VDD
Data Sheet D14656EJ4V0DS
VDS
90%
90%
10% 10%
0
td(on)
tr td(off)
ton
tf
toff
2SJ598
TYPICAL CHARACTERISTICS (TA = 25°C)
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
30
100
80
60
40
20
0
0
20
40
60
80
100
25
20
15
10
5
0
120 140 160
0
20
TC - Case Temperature - ˚C
40
60
80
100 120 140 160
TC - Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
–100
PW
10
0
–10
d
ite
ID(DC)
m
)
on
R
Li
1
Po
Lim we
ite r Di
d ss
(
DS
10
D
ipa
tio
=
10
µs
µs
m
s
m
s
C
n
–1
TC = 25˚C
Single Pulse
–0.1
–0.1
–1
–10
–100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
rth(t) - Transient Thermal Resistance - ˚C/W
ID - Drain Current - A
ID(pulse)
Rth(ch-A) = 125˚C/W
100
10
Rth(ch-C) = 5.43˚C/W
1
0.1
Single Pulse
0.01
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D14656EJ4V0DS
3
2SJ598
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
–50
ID - Drain Current - A
ID - Drain Current - A
–100
–10
TA = −55˚C
25˚C
75˚C
150˚C
–1
–0.1
–40
–30
VGS = –10 V
–4.0 V
–20
–10
–0.01
–1
–2
VDS = –10 V
Pulsed
–5
–4
–3
Pulsed
00
–2
VGS - Gate to Source Voltage - V
TA = 150˚C
75˚C
25˚C
−50˚C
0.1
VDS = –10 V
Pulsed
–0.1
–1
–10
–100
ID - Drain Current - A
RDS(on) - Drain to Source On-state Resistance - mΩ
10
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
200
Pulsed
150
ID = –6 A
100
50
0
0
–5
300
200
Pulsed
VGS = –4.0 V
–4.5 V
–10 V
–1
–10
–15
–20
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
100
0
–0.1
–10
VGS - Gate to Source Voltage - V
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
–100
–4.0
VGS(off) - Gate Cut-off Voltage - V
| yfs | - Forward Transfer Admittance - S
RDS(on) - Drain to Source On-state Resistance - mΩ
4
100
0.01
–0.01
–10
–8
VDS - Drain to Source Voltage - V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
1
–6
–4
VDS = –10 V
ID = –1 mA
–3.0
–2.0
–1.0
0
–50
ID - Drain Current - A
0
50
100
150
Tch - Channel Temperature - ˚C
Data Sheet D14656EJ4V0DS
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
–100
Pulsed
250
VGS = –4.0 V
200
150
–10 V
100
50
0
ID = –6 A
−50
50
0
100
Pulsed
–10
VGS = –10 V
–1
0V
–0.1
–0.01
150
0
VSD - Source to Drain Voltage - V
Tch - Channel Temperature - ˚C
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
SWITCHING CHARACTERISTICS
1000
VGS = 0 V
f = 1 MHz
1000
Ciss
100
Coss
Crss
10
–0.1
–1
–10
td(on), tr, td(off), tf - Switching Time - ns
Ciss, Coss, Crss - Capacitance - pF
10000
–100
VDD = –30 V
RG = 0 Ω
VGS = –10 V
100
td(off)
tf
10
td(on)
tr
1
–0.1
100
10
10
100
–60
VDS - Drain to Source Voltage - V
trr - Reverse Recovery Time - ns
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
di/dt = 100 A/µs
VGS = 0 V
1
–100
ID - Drain Current - A
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1
0.1
–10
–1
VDS - Drain to Source Voltage - V
1000
–1.5
–1.0
–0.5
ID = –12 A
–50
VGS
VDD = –48 V
–30 V
–12 V
–40
–12
–10
–8
–30
–6
–20
–4
–10
0
0
–2
VDS
2
4
6
8
10
12
14
VGS - Gate to Source Voltage - V
300
ISD - Diode Forward Current - A
RDS(on) - Drain to Source On-state Resistance - mΩ
2SJ598
0
16
QG - Gate Charge - nC
IF - Drain Current - A
Data Sheet D14656EJ4V0DS
5
2SJ598
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
SINGLE AVALANCHE ENERGY
DERATING FACTOR
160
IAS = –12 A
–10
EAS
= 14
.4 m
J
–1
VDD = –30 V
RG = 25 Ω
VGS = –20 → 0 V
–0.1
10 µ
100 µ
120
100
80
60
40
20
1m
L - Inductive Load - H
6
VDD = –30 V
RG = 25 Ω
VGS = –20 → 0 V
IAS ≤ –12 A
140
Energy Derating Factor - %
IAS - Single Avalanche Current - A
–100
10 m
0
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - ˚C
Data Sheet D14656EJ4V0DS
2SJ598
PACKAGE DRAWINGS (Unit: mm)
2) TO-252 (MP-3Z)
1.1 ±0.2
+0.2
0.5 −0.1
+0.2
0.5 −0.1
0.75
2.3 2.3
1. Gate
2. Drain
3. Source
4. Fin (Drain)
1
2
3
1.5 −0.1
2.3 ±0.2
1.0 MIN.
1.8TYP.
0.5 ±0.1
0.9
0.8
2.3 2.3 MAX. MAX.
0.8
1. Gate
2. Drain
3. Source
4. Fin (Drain)
0.7
0.8 4.3 MAX.
1.1 ±0.2
13.7 MIN.
3
7.0 MIN.
2
5.5 ±0.2
1.6 ±0.2
1
4
5.5 ±0.2
10.0 MAX.
6.5 ±0.2
5.0 ±0.2
0.5 ±0.1
4
+0.2
2.3 ±0.2
2.0
MIN.
5.0 ±0.2
1.5 −0.1
6.5 ±0.2
+0.2
1) TO-251 (MP-3)
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
Data Sheet D14656EJ4V0DS
7
2SJ598
• The information in this document is current as of August, 2004. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
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M8E 02. 11-1