2SK3070(L),2SK3070(S) Silicon N Channel MOS FET High Speed Power Switching ADE-208-684G (Z) 8th. Edition February 1999 Features • Low on-resistance R DS(on) = 4.5 mΩ typ. • Low drive current • 4 V gate drive device can be driven from 5 V source Outline LDPAK 4 4 D 1 1 G S 2 3 2 3 1. Gate 2. Drain 3. Source 4. Drain Datasheet Title Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS 40 V Gate to source voltage VGSS ±20 V Drain current ID 75 A 300 A 75 A 50 A 333 mJ 100 W Drain peak current I D(pulse) Body-drain diode reverse drain current I DR Avalanche current Avalanche energy I AP Note 1 Note 3 EAR Note 3 Note 2 Channel dissipation Pch Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Note: 2 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Datasheet Title Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V(BR)DSS 40 — — V I D = 10 mA, VGS = 0 Gate to source leak current I GSS — — ±0.1 µA VGS = ±20 V, VDS = 0 Zero gate voltege drain current I DSS — — 10 µA VDS = 40 V, VGS = 0 Gate to source cutoff voltage VGS(off) 1.0 — 2.5 V I D = 1 mA, VDS = 10 V Note1 Static drain to source on state RDS(on) — 4.5 5.8 mΩ I D = 40 A, VGS = 10 V Note1 — 6.5 10 mΩ I D = 40 A, VGS = 4 V Note1 resistance Forward transfer admittance |yfs| 50 80 — S I D = 40 A, VDS = 10 V Note1 Input capacitance Ciss — 6800 — pF VDS = 10 V Output capacitance Coss — 1300 — pF VGS = 0 Reverse transfer capacitance Crss — 380 — pF f = 1 MHz Total gate charge Qg — 130 — nc VDD = 25 V Gate to source charge Qgs — 25 — nc VGS = 10 V Gate to drain charge Qgd — 30 — nc I D = 75 A Turn-on delay time t d(on) — 60 — ns VGS = 10 V, ID = 40 A Rise time tr — 300 — ns RL = 0.75 Ω Turn-off delay time t d(off) — 550 — ns Fall time tf — 400 — ns Body–drain diode forward voltage VDF — 1.05 — V I F = 75 A, VGS = 0 Body–drain diode reverse recovery time t rr — 90 — ns I F = 75 A, VGS = 0 diF/ dt = 50 A/ µs Note: 1. Pulse test 3 Datasheet Title Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1000 I D (A) 150 Drain Current Channel Dissipation Pch (W) 200 100 50 100 30 10 3 1 50 100 Case Temperature 150 200 Tc (°C) = 10 DC ms Op (1 s e (T rati hot) c = on 25 Operation in °C ) this area is limited by R DS(on) Typical Transfer Characteristics 100 4V 3.5 V 5V Pulse Test VGS = 10 V ID 60 (A) 80 Drain Current I D (A) PW 0.1 Ta = 25°C 3 30 0.1 0.3 1 10 100 Drain to Source Voltage V DS (V) Typical Output Characteristics 100 Drain Current 10 0.3 0 3V 40 20 80 0 2 4 6 Drain to Source Voltage 8 V DS (V) 10 V DS = 10 V Pulse Test 60 40 20 2.5 V 4 10 µ 0µ s s 1 m s 300 0 75°C 25°C Tc = –25°C 1 2 3 Gate to Source Voltage 4 5 V GS (V) Datasheet Title Drain to Source Saturation Voltage vs. Gate to Source Voltage 0.4 0.3 I D = 50 A 0.2 20 A 0.1 10 A 0 Static Drain to Source on State Resistance R DS(on) (mΩ ) Drain to Source On State Resistance R DS(on) (m Ω ) Pulse Test 12 4 8 Gate to Source Voltage Static Drain to Source on State Resistance vs. Temperature 20 Pulse Test 16 12 8 4 0 –50 I D = 50 A VGS = 10 V 10, 20 A 10, 20, 50 A 4V 0 50 100 Case Temperature 100 Pulse Test 50 20 10 150 Tc (°C) 200 VGS = 4 V 5 10 V 2 1 1 16 20 V GS (V) 3 10 30 100 300 1000 Drain Current I D (A) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (S) Drain to Source Saturation Voltage V DS(on) (V) 0.5 Static Drain to Source on State Resistance vs. Drain Current 500 200 V DS = 10 V Pulse Test 100 Tc = –25 °C 50 20 10 25 °C 5 75 °C 2 1 0.5 0.1 0.3 1 3 10 30 100 Drain Current I D (A) 5 Datasheet Title Body–Drain Diode Reverse Recovery Time 30000 VGS = 0 f = 1 MHz 500 Capacitance C (pF) Reverse Recovery Time trr (ns) 1000 200 100 50 20 10 0.1 10000 di / dt = 50 A / µs V GS = 0, Ta = 25°C 40 20 0 V DS 12 8 V DD = 40 V 25 V 10 V 80 160 240 320 Gate Charge Qg (nc) 4 0 400 V GS (V) 16 Crss 10 20 30 40 50 Switching Characteristics t d(off) 500 Switching Time t (ns) V DD = 40 V 25 V 10 V 60 1000 Gate to Source Voltage V DS (V) Drain to Source Voltage V GS Coss 1000 Drain to Source Voltage V DS (V) 20 80 3000 100 0 0.3 1 3 10 30 100 Reverse Drain Current I DR (A) I D = 75 A Ciss 300 Dynamic Input Characteristics 100 6 Typical Capacitance vs. Drain to Source Voltage tf 200 tr 100 t d(on) 50 20 V GS = 10 V, V DD = 30 V PW = 5 µs, duty < 1% 10 0.1 0.2 0.5 1 2 Drain Current 5 10 20 I D (A) 50 100 Datasheet Title Reverse Drain Current vs. Source to Drain Voltage Repetitive Avalanche Energy E AR (mJ) Maximun Avalanche Energy vs. Channel Temperature Derating Reverse Drain Current I DR (A) 100 10 V 80 5V 60 V GS = 0, –5 V 40 20 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 500 I AP = 50 A V DD = 25 V duty < 0.1 % Rg > 50 Ω 400 300 200 100 0 25 V SD (V) 50 100 125 150 Channel Temperature Tch (°C) Avalanche Test Circuit V DS Monitor 75 Avalanche Waveform EAR = L 1 2 • L • I AP • 2 I AP Monitor VDSS VDSS – V DD V (BR)DSS I AP Rg D. U. T V DS VDD ID Vin 15 V 50Ω 0 VDD 7 Datasheet Title Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γ s (t) 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 1.25 °C/W, Tc = 25 °C 0.1 0.05 PDM 0.02 1 lse 0.0 t pu o h 1s 0.03 0.01 10 µ D= PW T PW T 100 µ 1m 10 m Pulse Width 100 m 1 10 PW (S) Switching Time Test Circuit Waveform Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vin 10 V 50Ω V DD = 30 V Vout 10% 10% 90% td(on) 8 tr 10% 90% td(off) tf Datasheet Title Package Dimensions 1.2 ± 0.2 0.4 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 L type 2.54 ± 0.5 (1.4) (1.5) (1.5) 1.27 ± 0.2 3.0 +0.3 –0.5 2.59 ± 0.2 4.44 ± 0.2 8.6 ± 0.3 10.0 +0.3 –0.5 10.2 ± 0.3 1.27 ± 0.2 0.76 ± 0.1 1.3 ± 0.2 11.3 ± 0.5 4.44 ± 0.2 11.0 ± 0.5 1.2 ± 0.2 0.86 +0.2 –0.1 8.6 ± 0.3 10.0 +0.3 –0.5 (1.5) 10.2 ± 0.3 (1.4) Unit: mm 1.3 ± 0.2 0.1 +0.2 –0.1 2.59 ± 0.2 0.4 ± 0.1 0.86 +0.2 –0.1 2.54 ± 0.5 S type Hitachi Code EIAJ JEDEC LDPAK — — 9 Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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