2SK3134(L), 2SK3134(S) Silicon N Channel MOS FET High Speed Power Switching ADE-208-721B (Z) 3rd. Edition February 1999 Features • Low on-resistance R DS(on) = 4 mΩ typ. • Low drive current • 4 V gate drive device can be driven from 5 V source Outline LDPAK 4 4 D 1 1 G S 2 3 2 3 1. Gate 2. Drain 3. Source 4. Drain 2SK3134(L),2SK3134(S) Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS 30 V Gate to source voltage VGSS ±20 V Drain current ID 75 A 300 A 75 A 35 A 122 mJ 100 W Drain peak current I D(pulse) Body-drain diode reverse drain current I DR Avalanche current Avalanche energy I AP Note 1 Note 3 EAR Note 3 Note 2 Channel dissipation Pch Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Note: 2 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω 2SK3134(L),2SK3134(S) Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V(BR)DSS 30 — — V I D = 10 mA, VGS = 0 Gate to source leak current I GSS — — ±0.1 µA VGS = ±20 V, VDS = 0 Zero gate voltege drain current I DSS — — 10 µA VDS = 30 V, VGS = 0 Gate to source cutoff voltage VGS(off) 1.0 — 2.5 V I D = 1 mA, VDS = 10 V Note 1 Static drain to source on state RDS(on) — 4.0 5.0 mΩ I D = 40 A, VGS = 10 V Note 1 — 5.5 8.5 mΩ I D = 40 A, VGS = 4 V Note 1 resistance Forward transfer admittance |yfs| 50 80 — S I D = 40 A, VDS = 10 V Note 1 Input capacitance Ciss — 6800 — pF VDS = 10 V Output capacitance Coss — 1550 — pF VGS = 0 Reverse transfer capacitance Crss — 500 — pF f = 1 MHz Total gate charge Qg — 130 — nc VDD = 10 V Gate to source charge Qgs — 16 — nc VGS = 10 V Gate to drain charge Qgd — 30 — nc I D = 75 A Turn-on delay time t d(on) — 50 — ns VGS = 10 V, ID = 40 A Rise time tr — 370 — ns RL = 0.25 Ω Turn-off delay time t d(off) — 550 — ns Fall time tf — 380 — ns Body–drain diode forward voltage VDF — 1.05 — V Body–drain diode reverse t rr — 80 — ns recovery time Note: I F = 75 A, VGS = 0 I F = 75 A, VGS = 0 diF/ dt = 5 A/ µs 1. Pulse test 3 2SK3134(L),2SK3134(S) Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1000 I D (A) 120 Drain Current Channel Dissipation Pch (W) 160 80 40 10 300 PW 100 DC 30 10 10 = 10 1 µs 0µ s m s Op ms (1 e s (T rati c = on hot ) 25 °C ) Operation in 3 this area is limited by R DS(on) 1 0.3 0 50 100 150 Case Temperature 0.1 Ta = 25°C 3 30 0.1 0.3 1 10 100 Drain to Source Voltage V DS (V) 200 Tc (°C) Typical Output Characteristics Typical Transfer Characteristics Pulse Test 3V ID 4V 2.5 V 60 40 20 0 4 VGS = 10 V 5V (A) 80 100 Drain Current Drain Current I D (A) 100 2 4 6 Drain to Source Voltage 8 10 V DS (V) 80 V DS = 10 V Pulse Test 60 40 25°C 20 0 75°C Tc = –25°C 1 2 3 Gate to Source Voltage 4 5 V GS (V) 2SK3134(L),2SK3134(S) Drain to Source Saturation Voltage vs. Gate to Source Voltage Pulse Test 0.4 0.3 I D = 50 A 0.2 0.1 20 A 10 A Drain to Source On State Resistance R DS(on) (mΩ ) Drain to Source Saturation Voltage V DS(on) (V) 0.5 Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test 30 10 VGS = 4 V 3 10 V 1 0.3 0.1 12 4 8 Gate to Source Voltage 16 20 V GS (V) Static Drain to Source on State Resistance vs. Temperature 20 Pulse Test 16 12 I D = 50 A 8 10, 20 A 4V 4 0 –50 VGS = 10 V 10, 20, 50 A 0 50 100 150 200 Case Temperature Tc (°C) 1 3 30 10 Drain Current 100 300 1000 I D (A) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (S) Static Drain to Source on State Resistance R DS(on) (mΩ ) 0 500 200 V DS = 10 V Pulse Test 100 50 Tc = –25 °C 20 10 5 2 25 °C 75 °C 1 0.5 0.1 0.3 1 3 10 30 Drain Current I D (A) 100 5 2SK3134(L),2SK3134(S) Body–Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 30000 VGS = 0 f = 1 MHz di / dt = 50 A / µs V GS = 0, Ta = 25°C 500 Capacitance C (pF) Reverse Recovery Time trr (ns) 1000 200 100 50 10000 3000 Coss 1000 Crss 300 20 10 0.1 100 0 0.3 1 3 10 30 100 Reverse Drain Current I DR (A) VDS = 20 V 10 V 5V 30 20 10 0 V DS 16 12 8 VDS = 20 V 10 V 5V 80 160 240 320 Gate Charge Qg (nc) 4 0 400 20 30 40 50 Switching Characteristics t d(off) 500 Switching Time t (ns) V GS 40 V GS (V) I D = 75 A 1000 Gate to Source Voltage V DS (V) Drain to Source Voltage 20 10 Drain to Source Voltage V DS (V) Dynamic Input Characteristics 50 6 Ciss tf 200 100 50 20 tr t d(on) V GS = 10 V, V DD = 10 V PW = 5 µs, duty < 1% 10 2 5 10 20 0.1 0.2 0.5 1 Drain Current I D (A) 50 100 2SK3134(L),2SK3134(S) Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) Reverse Drain Current vs. Source to Drain Voltage (A) 100 10 V Reverse Drain Current I F 80 5V 60 V GS = 0, –5 V 40 20 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 200 I AP = 35 A V DD = 15 V duty < 0.1 % Rg > 50 Ω 160 120 80 40 0 25 V SDF (V) 50 75 100 125 150 Channel Temperature Tch (°C) Avalanche Test Circuit V DS Monitor Avalanche Waveform EAR = L 1 2 • L • I AP • 2 I AP Monitor VDSS VDSS – V DD V (BR)DSS I AP Rg D. U. T V DS VDD ID Vin 15 V 50Ω 0 VDD 7 2SK3134(L),2SK3134(S) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γ s (t) 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 1.25 °C/W, Tc = 25 °C 0.1 0.05 PDM 0.02 1 lse 0.0 t pu ho 1s 0.03 0.01 10 µ D= PW T PW T 100 µ 1m 10 m Pulse Width 100 m 1 10 PW (S) Switching Time Test Circuit Waveform Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vin 10 V 50Ω V DD = 10 V Vout 10% 10% 90% td(on) 8 tr 10% 90% td(off) tf 2SK3134(L),2SK3134(S) Package Dimensions 1.2 ± 0.2 0.4 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 L type 2.54 ± 0.5 (1.4) (1.5) (1.5) 1.27 ± 0.2 3.0 +0.3 –0.5 2.59 ± 0.2 4.44 ± 0.2 8.6 ± 0.3 10.0 +0.3 –0.5 10.2 ± 0.3 1.27 ± 0.2 0.76 ± 0.1 1.3 ± 0.2 11.3 ± 0.5 4.44 ± 0.2 11.0 ± 0.5 1.2 ± 0.2 0.86 +0.2 –0.1 8.6 ± 0.3 10.0 +0.3 –0.5 (1.5) 10.2 ± 0.3 (1.4) Unit: mm 1.3 ± 0.2 0.1 +0.2 –0.1 2.59 ± 0.2 0.4 ± 0.1 0.86 +0.2 –0.1 2.54 ± 0.5 S type Hitachi Code EIAJ JEDEC LDPAK — — 9 Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. 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