PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 6-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans™ FEATURES 1 • • • • • • 2 • • • • • • • • Up to 6-A Output Current 4.5-V to 14-V Input Voltage Wide-Output Voltage Adjust (0.69 V to 5.5 V) ±1.5% Total Output Voltage Variation Efficiencies up to 95% Output Overcurrent Protection (Nonlatching, Auto-Reset) Operating Temperature: –40°C to 85°C Safety Agency Approvals – UL/IEC/CSA-C22.2 60950-1 Prebias Startup On/Off Inhibit Differential Output Voltage Remote Sense Adjustable Undervoltage Lockout Auto-Track™ Sequencing Ceramic Capacitor Version (PTH08T231W) • • • TurboTrans™ Technology Designed to meet Ultra-Fast Transient Requirements up to 300 A/s SmartSync Technology APPLICATIONS • • • Complex Multi-Voltage Systems Microprocessors Bus Drivers DESCRIPTION The PTH08T230/231W is the higher input voltage (4.5V to 14V) version of the PTH04T230/231W (2.2V to 5.5V), 6-A rated, non-isolated power module. This regulator represents the 2nd generation of the PTH series of power modules which include a reduced footprint and improved features. The PTH08T231W is optimized to be used in applications requiring all ceramic capacitors. Operating from an input voltage range of 4.5V to 14V, the PTH08T230/231W requires a single resistor to set the output voltage to any value over the range, 0.69V to 5.5V. The wide input voltage range makes the PTH08T230/231W particularly suitable for advanced computing and server applications that use a loosely regulated 8-V to 12-V intermediate distribution bus. Additionally, the wide input voltage range increases design flexibility by supporting operation with tightly regulated 5-V, 8-V, or 12-V intermediate bus architectures. The module incorporates a comprehensive list of features. Output over-current and over-temperature shutdown protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™ sequencing is a popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a power system. The PTH08T230/231W includes new patent pending technologies, TurboTrans™ and SmartSync. The TurboTrans feature optimizes the transient response of the regulator while simultaneously reducing the quantity of external output capacitors required to meet a target voltage deviation specification. Additionally, for a target output capacitor bank, TurboTrans can be used to significantly improve the regulator's transient response by reducing the peak voltage deviation. SmartSync allows for switching frequency synchronization of multiple modules, thus simplifying EMI noise suppression tasks and reduces input capacitor RMS current requirements. Double-sided surface mount construction provides a low profile and compact footprint. Package options include both through-hole and surface mount configurations that are lead (Pb) - free and RoHS compatible. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. TurboTrans, Auto-Track, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2007, Texas Instruments Incorporated PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PTH08T230W SmartSync TurboTrans Auto−Track 9 VI 2 Track 1 8 SYNC TT 5 +Sense VI VO PTH08T230W Inhibit 10 INH/UVLO + CI 330 µF (Required) (Notes B and C) −Sense GND VOAdj 3 7 RTT 1% 0.05 W (Optional) +Sense VO 4 6 CO1 [D] + 200 µF Ceramic (Required) RSET 1% 0.05 W (Required) CO2 100 µF (Required) L O A D −Sense GND GND A. RSET required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table. B. An additional 22-µF ceramic input capacitor is recommended to reduce RMS ripple current. C. For VI greater than 8 V, the minimum required CI may be reduced to 220 µF plus a 22-µF ceramic capacitor. D. 200 µF of output capacitance can be achieved by using two 100-µF ceramic capacitors or four 47-µF ceramic capacitors. PTH08T231W - Ceramic Capacitor Version SmartSync TurboTrans Auto−Track 9 VI 2 Track 1 8 SYNC TT +Sense Vi Vo PTH08T231W Inhibit 10 INH/UVLO −Sense GND 3 CI 300 uF (Required) GND 2 5 RTT 1% 0.05W (Optional) +Sense 4 Vo 6 CO [B] 200 µF Ceramic (Required) VoAdj 7 RSET 1% 0.05 W (Required) (Note A) L O A D −Sense GND A. RSET required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table. B. 200 µF of output capacitance can be achieved by using two 100-µF ceramic capacitors or four 47-µF ceramic capacitors. Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI website at www.ti.com. DATASHEET TABLE OF CONTENTS DATASHEET SECTION PAGE NUMBER ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS 3 ELECTRICAL CHARACTERISTICS TABLE (PTH08T230W) 4 ELECTRICAL CHARACTERISTICS TABLE (PTH08T231W) 6 PIN-OUT AND TERMINAL FUNCTIONS 8 TYPICAL CHARACTERISTICS (VI = 12V) 9 TYPICAL CHARACTERISTICS (VI = 5V) 10 ADJUSTING THE OUTPUT VOLTAGE 11 CAPACITOR RECOMMENDATIONS 13 TURBOTRANS™ INFORMATION 17 UNDERVOLTAGE LOCKOUT (UVLO) 22 SOFT-START POWER-UP 23 OVER-CURRENT PROTECTION 23 OVER-TEMPERATURE PROTECTION 23 OUTPUT ON/OFF INHIBIT 24 REMOTE SENSE 24 SYCHRONIZATION (SMARTSYNC) 25 AUTO-TRACK SEQUENCING 26 PREBIAS START-UP 29 TAPE & REEL AND TRAY DRAWINGS 31 ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS (Voltages are with respect to GND) UNIT VTrack Track pin voltage –0.3 to VI + 0.3 V VSYNC SYNC pin voltage –0.3 to 6.0 V TA Operating temperature range Over VI range –40 to 85 Twave Wave soldering temperature Surface temperature of module body or pins (5 seconds maximum) Treflow Solder reflow temperature Surface temperature of module body or pins Tstg Storage temperature Mechanical shock Mechanical vibration AH and AD suffix (1) (2) AS suffix 235 (1) AZ suffix 260 (1) °C –55 to 125 (2) Per Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted Mil-STD-883D, Method 2007.2, 20-2000 Hz Suffix AH and AD Suffix AS and AZ Weight Flammability 260 500 20 G 15 2.5 grams Meets UL94V-O During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65C. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 3 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 ELECTRICAL CHARACTERISTICS TA =25°C, VI = 5V, VO = 3.3V, CI = 330µF, CO1 = 200µF ceramic, CO2 = 100µF, IO = IOmax (unless otherwise stated) PARAMETER TEST CONDITIONS PTH08T230W MIN IO Output current VI Input voltage range Output adjust range Over VO range 25°C, natural convection Over IO range TYP 6 0.69 ≤ VO ≤ 1.2 4.5 11 × VO 1.2 < VO ≤ 3.6 4.5 14 3.6 < VO ≤ 5.5 (2) 14 0.69 5.5 Over IO range VO +1 η ±1.0 ±0.25 %Vo Over VI range ±3 mV Load regulation Over IO range ±2 Total output variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C IO = 6 A 95% RSET = 1.21 kΩ, VO = 3.3 V 92% RSET = 2.37 kΩ, VO = 2.5 V 90% RSET = 4.75 kΩ, VO = 1.8 V 88% RSET = 6.98 kΩ, VO = 1.5 V 87% RSET = 12.1 kΩ, VO = 1.2 V 85% RSET = 20.5 kΩ, VO = 1.0 V 83% RSET = 681 Ω, VO = 0.7 V 79% 20-MHz bandwidth Overcurrent threshold Reset, followed by auto-recovery 2.5 A/µs load step 50% to 100% IOmax VO = 2.5 V Pin to GND dVtrack/dt Track slew rate capability CO ≤ CO (max) UVLOADJ Adjustable Under-voltage lockout (pin 10) %VO 10 A µSec Recovery Time 70 VO Overshoot 150 mV w/o TurboTrans (4) CO1 = 200 µF, ceramic CO2 = 330 µF, Type B Recovery Time 100 µSec VO Overshoot 100 mV with TurboTrans CO1 = 200 µF, ceramic CO2 = 330 µF, Type B RTT = 11.3 kΩ Recovery Time 150 µSec VO Overshoot 60 mV -130 4.3 VI decreasing, RUVLO = OPEN 4.0 Inhibit (pin 10) to GND, Track (pin 9) open fs Switching frequency Over VI and IO ranges, SmartSync (pin 1) to GND V/ms 4.45 V Open (6) -0.2 Input low current (IIL), Pin 10 to GND Input standby current µA 1 0.5 Input low voltage (VIL) Iin (5) 4.2 Input high voltage (VIH) 4 %VO w/o TurboTrans CO1 = 200 µF, ceramic Hysteresis, RUVLO ≤ 52.3 kΩ (6) (3) 1 VI increasing, RUVLO = OPEN Inhibit control (pin 10) mV ±1.5 RSET = 169 Ω, VI = 8.0 V, VO = 5.0V VO Ripple (peak-to-peak) Track input current (pin 9) (4) (5) V %Vo –40°C < TA < 85°C IIL (2) (3) (3) V Line regulaltion Transient response (1) A Temperature variation Efficiency ILIM UNIT (1) Set-point voltage tolerance VO MAX 0 0.6 V 235 µA 5 mA 300 kHz The maximum input voltage is duty cycle limited to (VO × 11)V or 14V, whichever is less. The maximum allowable input voltage is a function of switching frequency, and may increase or decrease when the SmartSync feature is used. Please review the SmartSync section of the Application Information for further guidance. The minimum input voltage is 4.5V or (VO+1)V, whichever is greater. Additional input capacitance may be required when VI < (VO+2)V. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/C or better temperature stability. Without TurboTrans, the minimum ESR limit of 7 mΩ must not be violated. A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 9. The open-circuit voltage is less than 6.5 Vdc. This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related application information section. Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 ELECTRICAL CHARACTERISTICS (continued) TA =25°C, VI = 5V, VO = 3.3V, CI = 330µF, CO1 = 200µF ceramic, CO2 = 100µF, IO = IOmax (unless otherwise stated) PARAMETER TEST CONDITIONS PTH08T230W MIN fSYNC Synchronization (SYNC) frequency VSYNCH SYNC High-Level Input Voltage VSYNCL SYNC Low-Level Input Voltage tSYNC SYNC Minimum Pulse Width CI External input capacitance kHz 2 5.5 V 0.8 Capacitance value 330 (7) Nonceramic 0 (8) Ceramic 200 (8) Equivalent series resistance (non-ceramic) External output capacitance Reliability TYP 200 with Turbotrans MTBF UNIT 400 SmartSync Control without TurboTrans CO MAX 240 Capacitance value Capacitance × ESR product (CO × ESR) Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign V nSec µF 100 5000 (9) 500 7 µF mΩ see table 10,000 (10) (11) 1000 10,000 6.7 µF µF×mΩ 106 Hr (7) A 330 µF electrolytic input capacitor is required for proper operation. The capacitor must be rated for a minimum of 450 mA rms of ripple current. An additional 22-µF ceramic input capacitor is recommended to reduce rms ripple current. When operating at VI > 8V, the minimum required CI may be reduced to a 220-µF electrolytic plus a 22-µF ceramic. (8) 200 µF ceramic external output capacitance is required for basic operation. The required ceramic output capacitance can be made up of 2×100µF or 4×47µF. The minimum output capacitance requirement increases when TurboTrans™ (TT) technology is used. See the Application Information for more guidance. (9) This is the calculated maximum disregarding TurboTrans™ technology. When the TurboTrans feature is used, the minimum output capacitance must be increased. See the TurboTrans application notes for further guidance. (10) When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR capacitors are required for proper operation. See the TurboTrans application notes for further guidance. (11) This is the calaculated maximum when using the TurboTrans feature. Additionally, low ESR capacitors are required for proper operation. See the TurboTrans application notes for further guidance. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 5 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 ELECTRICAL CHARACTERISTICS TA =25°C, VI = 5 V, VO = 3.3 V, CI = 330 µF, CO1 = 200 µF ceramic, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS PTH08T231W MIN IO Output current VI Input voltage range Output adjust range Over VO range 25°C, natural convection Over IO range TYP 6 0.69 ≤ VO ≤ 1.2 4.5 11 × VO 1.2 < VO ≤ 3.6 4.5 14 3.6 < VO ≤ 5.5 (2) 14 0.69 5.5 Over IO range VO +1 η ±1.0 ±0.25 %Vo Over VI range ±3 mV Load regulation Over IO range ±2 Total output variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C IO = 6 A 95% RSET = 1.21 kΩ, VO = 3.3 V 92% RSET = 2.37 kΩ, VO = 2.5 V 90% RSET = 4.75 kΩ, VO = 1.8 V 88% RSET = 6.98 kΩ, VO = 1.5 V 87% RSET = 12.1 kΩ, VO = 1.2 V 85% RSET = 20.5 kΩ, VO = 1.0 V 83% RSET = 681 Ω, VO = 0.7 V 79% 20-MHz bandwidth Overcurrent threshold Reset, followed by auto-recovery 2.5 A/µs load step 50% to 100% IOmax VI = 12 V VO = 3.3 V Track input current (pin 9) Pin to GND Track slew rate capability CO ≤ CO (max) UVLOADJ Adjustable Under-voltage lockout (pin 10) %VO 10 A 80 µSec Recovery Time VO Overshoot 85 mV w/o TurboTrans (4) CO1 = 400 µF, ceramic Recovery Time 120 µSec VO Overshoot 75 mV with TurboTrans CO1 = 400 µF, ceramic RTT = 8.06 kΩ Recovery Time 220 µSec VO Overshoot 45 4.3 VI decreasing, RUVLO = OPEN 4.0 Inhibit (pin 10) to GND, Track (pin 9) open fs Switching frequency Over VI and IO ranges, SmartSync (pin 1) to GND µA 1 V/ms 4.45 4.2 V Open (6) -0.2 Input low current (IIL), Pin 10 to GND Input standby current (5) 0.5 Input low voltage (VIL) Iin mV -130 Input high voltage (VIH) 6 %VO w/o TurboTrans CO1 = 200 µF, ceramic Hysteresis, RUVLO ≤ 52.3 kΩ (6) (3) 1 VI increasing, RUVLO = OPEN Inhibit control (pin 10) mV ±1.5 RSET = 169 Ω, VI = 8.0 V, VO = 5.0V VO Ripple (peak-to-peak) dVtrack/dt (4) (5) V %Vo –40°C < TA < 85°C IIL (2) (3) (3) V Line regulaltion Transient response (1) A Temperature variation Efficiency ILIM UNIT (1) Set-point voltage tolerance VO MAX 0 0.6 V 235 µA 5 mA 300 kHz The maximum input voltage is duty cycle limited to (VO × 11)V or 14V, whichever is less. The maximum allowable input voltage is a function of switching frequency, and may increase or decrease when the SmartSync feature is used. Please review the SmartSync section of the Application Information for further guidance. The minimum input voltage is 4.5V or (VO+1)V, whichever is greater. Additional input capacitance may be required when VI < (VO+2)V. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/C or better temperature stability. Without TurboTrans, the minimum ESR limit of 7 mΩ must not be violated. A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 9. The open-circuit voltage is less than 6.5 Vdc. This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related application information section. Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 ELECTRICAL CHARACTERISTICS (continued) TA =25°C, VI = 5 V, VO = 3.3 V, CI = 330 µF, CO1 = 200 µF ceramic, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS PTH08T231W MIN fSYNC Synchronization (SYNC) frequency VSYNCH SYNC High-Level Input Voltage VSYNCL SYNC Low-Level Input Voltage tSYNC SYNC Minimum Pulse Width CI External input capacitance MTBF External output capacitance Reliability UNIT 400 kHz 2 5.5 V SmartSync Control TYP 0.8 200 without TurboTrans CO MAX 240 with Turbotrans Capacitance value Ceramic Capacitance value Ceramic Capacitance × ESR product (CO × ESR) Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign 300 (7) 200 (8) see table (9) 100 V nSec µF 5000 µF (10) µF 5000 1000 6.7 µF×mΩ 106 Hr (7) 300 µF of ceramic or 330 µF of electrolytic input capacitance is required for proper operation. Electrolytic capacitance must be rated for a minimum of 450 mA rms of ripple current. An additional 22-µF ceramic input capacitor is recommended to reduce rms ripple current. (8) 200 µF ceramic external output capacitance is required for basic operation. The required ceramic output capacitance can be made up of 2×100µF or 4×47µF. The minimum output capacitance requirement increases when TurboTrans™ (TT) technology is used. See the Application Information for more guidance. (9) When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR capacitors are required for proper operation. See the TurboTrans application notes for further guidance. (10) This is the calaculated maximum when using the TurboTrans feature. Additionally, low ESR capacitors are required for proper operation. See the TurboTrans application notes for further guidance. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 7 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 PTH08T230/231W (TOP VIEW) 1 10 9 2 8 7 6 5 3 4 TERMINAL FUNCTIONS TERMINAL NAME NO. DESCRIPTION VI 2 The positive input voltage power node to the module, which is referenced to common GND. VO 4 The regulated positive power output with respect to the GND. GND 3 This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for the control inputs. Inhibit and UVLO (1) VO Adjust 10 The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin to GND (pin 3) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more information, see the Application Information section. 7 A 0.05 W 1% resistor must be directly connected between this pin and pin 6 (– Sense) to set the output voltage to a value higher than 0.69 V. The temperature stability of the resistor should be 100 ppm/°C (or better). The setpoint range for the output voltage is from 0.69 V to 5.5 V. If left open circuit, the output voltage will default to its lowest value. For further information, on output voltage adjustment see the related application note. The specification table gives the preferred resistor values for a number of standard output voltages. + Sense 5 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy, +Sense must be connected to VO, close to the load. – Sense 6 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy, –Sense must be connected to GND (pin 3), very close to the module (within 10 cm). 9 This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to VI. Track NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. For more information, see the related application note. TurboTrans™ SmartSync (1) 8 8 This input pin adjusts the transient response of the regulator. To activate the TurboTrans feature, a 1%, 0.05 W resistor must be connected between this pin and pin 5 (+Sense) very close to the module. For a given value of output capacitance, a reduction in peak output voltage deviation is achieved by using this feature. If unused, this pin must be left open-circuit. The resistance requirement can be selected from the TurboTrans resistor table in the Application Information section. External capacitance must never be connected to this pin unless the TurboTrans resistor is a short, 0Ω. 1 This input pin sychronizes the switching frequency of the module to an external clock frequency. The SmartSync feature can be used to sychronize the switching fequency of multiple PTH08T230/231W modules, aiding EMI noise suppression efforts. If unused, this pin should be connected to GND (pin 3). For more information, please review the Application Information section. Denotes negative logic: Open = Normal operation, Ground = Function active Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 TYPICAL CHARACTERISTICS (1) (2) CHARACTERISTIC DATA ( VI = 12 V) EFFICIENCY vs OUTPUT CURRENT OUTPUT RIPPLE vs OUTPUT CURRENT 25 VO = 3.3 V VO − Output Voltage Ripple − VPP (mV) VO = 5 V 95 90 80 VO = 2.5 V 75 VO = 1.8 V 70 VO = 1.5 V 65 VO = 1.2 V 60 55 50 1 2 3 4 IO − Output Current − A 5 15 VO = 3.3 V VO = 2.5 V 10 5 VO = 1.8 V VO = 1.5 V VO = 3.3 V 1.5 VO = 2.5 V VO = 1.8 V 1 VO = 1.5 V 0.5 VO = 1.2 V VO = 1.2 V 1 2 3 4 5 0 6 1 IO − Output Current − A 3 4 2 IO − Output Current − A 5 Figure 1. Figure 2. Figure 3. AMBIENT TEMPERATURE vs OUTPUT CURRENT AMBIENT TEMPERATURE vs OUTPUT CURRENT AMBIENT TEMPERATURE vs OUTPUT CURRENT 90 TA− Ambient Temperature − oC 80 100 LFM 70 Nat Conv 60 50 40 VO = 5 V 30 20 1 2 3 4 IO − Output Current − A 5 6 Figure 4. 6 90 80 100 LFM 70 Nat Conv 60 50 40 VO = 3.3 V 30 20 0 2 0 0 6 90 TA− Ambient Temperature − oC 20 0 0 (2) VO = 5 V VO = 5 V TA− Ambient Temperature − oC Efficiency − % 85 2.5 PD − Power Dissipation − W 100 (1) POWER DISSIPATION vs OUTPUT CURRENT 80 Nat Conv 70 60 50 40 VO = 1.2 V 30 20 0 1 2 3 4 IO − Output Current − A 5 6 Figure 5. 0 1 2 3 4 IO − Output Current − A 5 6 Figure 6. The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, and Figure 3. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper. Applies to Figure 4 and Figure 5. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 9 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 TYPICAL CHARACTERISTICS (1) (2) CHARACTERISTIC DATA ( VI = 5 V) EFFICIENCY vs OUTPUT CURRENT OUTPUT RIPPLE vs OUTPUT CURRENT 10 VO = 2.5 V 95 90 85 80 VO = 1.5 V VO = 1.8 V 75 VO = 1.2 V 70 VO = 0.7 V 65 60 1.6 1.4 VO = 3.3 V 8 VO = 1.8 V PD − Power Dissipation − W VO = 3.3 V VO − Output Voltage Ripple − VPP (mV) 100 Efficiency − % POWER DISSIPATION vs OUTPUT CURRENT VO = 3.3 V VO = 2.5 V 6 4 2 VO = 1.5 V VO = 0.7 V VO = 1.2 V 1 2 3 4 IO − Output Current − A 5 VO = 2.5 V 0.8 VO = 1.8 V 0.6 VO = 1.5 V 0.4 VO = 1.2 V VO = 0.7 V 0 0 6 1 0.2 0 0 1.2 1 2 3 4 5 0 6 IO − Output Current − A Figure 7. Figure 8. 1 2 3 4 IO − Output Current − A 5 6 Figure 9. AMBIENT TEMPERATURE vs OUTPUT CURRENT TA− Ambient Temperature − oC 90 80 Nat Conv 70 60 50 40 ALL VO 30 20 0 1 2 3 4 IO − Output Current − A 5 6 Figure 10. (1) (2) 10 The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure 7, Figure 8, and Figure 9. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper. Applies to Figure 10. Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 APPLICATION INFORMATION ADJUSTING THE OUTPUT VOLTAGE The VO Adjust control (pin 7) sets the output voltage of the PTH08T230/231W. The adjustment range is 0.69V to 5.5V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the VO Adjust and the –Sense pins. Table 1 gives the standard value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. For other output voltages, the required resistor value can either be calculated using the following formula, or simply selected from the values given in Table 2. Figure 11 shows the placement of the required resistor. 0.69 - 1.43 k W RSET = 10 kW x VO - 0.69 (1) Table 1. Preferred Values of RSET for Standard Output Voltages VO (Standard) (V) RSET (Standard Value) (kΩ) VO (Actual) (V) 0.169 5.01 3.3 1.2 3.30 2.5 2.37 2.51 1.8 4.7 1.81 1.5 6.98 1.51 1.2 (2) 12.1 1.20 1.0 (2) 20.5 1.01 0.7 (2) 681 0.70 5.0 (1) (2) (1) For VO > 3.6 V, the minimum input voltage is (VO + 1) V. The maximum input voltage is (VO × 11) V or 14 V, whichever is less. The maximum allowable input voltage is a function of switching frequency and may increase or decrease when the Smart Sync feature is used. Review the Smart Sync application section for further guidance. +Sense +Sense VO PTH08T230W −Sense GND VoAdj 3 7 5 4 VO 6 RSET 1% 0.05 W −Sense GND (1) RSET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better). Connect the resistor directly between pins 7 and 6, as close to the regulator as possible, using dedicated PCB traces. (2) Never connect capacitors from VO Adjust to either GND, VO, or +Sense. Any capacitance added to the VO Adjust pin affects the stability of the regulator. Figure 11. VO Adjust Resistor Placement Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 11 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Table 2. Output Voltage Set-Point Resistor Values 12 VO Required RSET (kΩ) VO Required (V) RSET (Ω) 0.70 0.681 3.00 1.54 k 0.75 0.113 3.10 1.43 k 0.80 61.9 3.20 1.33 k 0.85 41.2 3.30 1.21 k 0.90 31.6 3.40 1.13 k 0.95 24.9 3.50 1.02 k 1.00 20.5 3.60 931 1.10 15.4 3.70 866 1.20 12.1 3.80 787 1.30 9.88 3.90 715 1.40 8.25 4.00 649 1.50 6.98 4.10 590 1.60 6.04 4.20 536 1.70 5.36 4.30 475 1.80 4.75 4.40 432 1.90 4.22 4.50 383 2.00 3.83 4.60 332 2.10 3.40 4.70 287 2.20 3.09 4.80 249 2.30 2.87 4.90 210 2.40 2.61 5.00 169 2.50 2.37 5.10 133 2.60 2.15 5.20 100 2.70 2.00 5.30 66.5 2.80 1.82 5.40 34.8 2.90 1.69 5.50 4.99 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 CAPACITOR RECOMMENDATIONS FOR THE PTH08T230/231W POWER MODULE Capacitor Technologies Electrolytic Capacitors When using electrolytic capacitors, high quality, computer-grade electrolytic capacitors are recommended. Aluminum electrolytic capacitors provide adequate decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum, ceramic, or OS-CON type capacitors are required. Ceramic Capacitors Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have a low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. Tantalum, Polymer-Tantalum Capacitors Tantalum type capacitors may only used on the output bus, and are recommended for applications where the ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation, and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. Input Capacitor (Required) The PTH08T231W requires a minimum input capacitance of 300µF of ceramic type. (330 µF of electrolytic input capacitance may also be used. See the following paragraph for the required electrolytic capacitor ratings.) The PTH08T230W requires a minimum input capacitance of 330µF. The ripple current rating of the capacitor must be at least 450mArms. An optional 22-µF X5R/X7R ceramic capacitor is recommended to reduce the RMS ripple current. When operating with an input voltage greater than 8 V, the minimum required input capacitance may be reduced to a 220-µF electrolytic plus a 22-µF ceramic. Input Capacitor Information The size and value of the input capacitor is determined by the converter’s transient performance capability. This minimum value assumes that the converter is supplied with a responsive, low inductance input source. This source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground planes. Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1,3 cm). Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module's input. This will reduce the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the RMS ripple current requirement for the electrolytic capacitor. Increasing the minimum input capacitance to 680µF is recommended for high-performance applications, or wherever the input source performance is degraded. The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability, and less than 100 mΩ of equivalent series resistance (ESR). Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability. No tantalum capacitors were found with a sufficient voltage rating to meet this requirement. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 13 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Output Capacitor (Required) The PTH08T231W requires a minimum output capacitance of 200µF of ceramic type. The PTH08T230W requires a minimum output capacitance of 200µF ceramic type. An optional 100 µF of non-ceramic, low-ESR capacitance is recommended for improved performance. See the Electrical Characteristics table for maximum capacitor limits. The required capacitance above the minimum will be determined by actual transient deviation requirements. See the TurboTrans Technology application section within this document for specific capacitance selection. Output Capacitor Information When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR. When using the TurboTrans feature, the capacitance x ESR product should also be considered (see the following section). Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the load to be effective. Ceramic capacitor values below 10µF should not be included when calculating the total output capacitance value. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered. TurboTrans Output Capacitance TurboTrans allows the designer to optimize the output capacitance according to the system transient design requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. When using TurboTrans, the capacitor's capacitance (in µF) × ESR (in mΩ) product determines its capacitor type; Type A, B, or C. These three types are defined as follows: Type A = (100 ≤ capacitance × ESR ≤ 1000) (e.g. ceramic) Type B = (1000 < capacitance × ESR ≤ 5000) (e.g. polymer-tantalum) Type C = (5000 < capacitance × ESR ≤ 10,000) (e.g. OS-CON) When using more than one type of output capacitor, select the capacitor type that makes up the majority of your total output capacitance. When calculating the C × ESR product, use the maximum ESR value from the capacitor manufacturer's data sheet. Working Examples: A capacitor with a capacitance of 330µF and an ESR of 5mΩ, has a C×ESR product of 1650µFxmΩ (330 × 5). This is a Type B capacitor. A capacitor with a capacitance of 1000µF and an ESR of 8mΩ, has a C×ESR product of 8000µFxmΩ (1000 × 8). This is a Type C capacitor. See the TurboTrans Technology application section within this document for specific capacitance selection. Table 3 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column. Non-TurboTrans Output Capacitance If the TurboTrans feature is not used, minimum ESR and maximum capacitor limits must be followed. System stability may be effected and increased output capacitance may be required without TurboTrans. When using the PTH08T230W without the TurboTrans feature, observe the minimum ESR of the entire output capacitor bank. The minimum ESR limit of the output capacitor bank is 7mΩ. A list of preferred low-ESR type capacitors, are identified in Table 3. Large amounts of capacitance may reduce system stability when not using the TurboTrans feature. When using the PTH08T231W without the TurboTrans feature, the maximum amount of capacitance is tbd µF of ceramic type. Large amounts of capacitance may reduce system stability. Using the TurboTrans feature improves system stability, improves transient response, and reduces the amount of output capacitance required to meet system transient design requirements. 14 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Designing for Fast Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 2.5A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100A/µs, adding multiple 10µF ceramic capacitors plus 10×1µF, and numerous high frequency ceramics (≤0.1µF) is all that is required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close as possible to the high frequency devices are essential for optimizing transient performance. Table 3. Input/Output Capacitors (1) Capacitor Characteristics Capacitor Vendor, Type Series (Style) Working Value Voltage (µF) Quantity Output Bus (2) Max. ESR at 100 kHz Max Ripple Current at 85°C (Irms) Physical Size (mm) Input Bus No TurboTrans TurboTrans Cap Type (3) Vendor Part No. Panasonic FC (Radial) 25 V 1000 43mΩ 1690mA 16 × 15 1 ≥2 N/R (4) EEUFC1E102S FC (Radial) 25 V 820 38mΩ 1655mA 12 × 20 1 ≥1 N/R (4) EEUFC1E821S FC (SMD) 35 V 470 43mΩ 1690mA 16 × 16,5 1 ≥1 N/R (4) EEVFC1V471N FK (SMD) 35 V 1000 35mΩ 1800mA 16 ×16,5 1 ≥2 N/R (4) EEVFK1V102M 6.3 V 330 25mΩ 2600mA 7,3×4,3×2.8 N/R (5) 1~4 C ≥ 2 (6) United Chemi-Con PTB, Poly-Tantalum(SMD) 6PTB337MD6TER (VO≤ 5.1V) (7) LXZ, Aluminum (Radial) 35 V 680 38mΩ 1660mA 12,5 × 20 1 1~3 PS, Poly-Alum (Radial) 16 V 330 14mΩ 5060mA 10 × 12,5 1 1~3 B ≥ 2 (6) 16PS330MJ12 PS, Poly-Alum (Radial) 6.3 V 390 12mΩ 5500mA 8 × 12,5 N/R (5) 1~2 B ≥ 1 (6) 6PS390MH11 (VO≤ 5.1V) (7) (6) N/R (4) LXZ35VB681M12X20LL PXA, Poly-Alum (SMD) 16 V 330 14mΩ 5050mA 10 × 12,2 1 1~3 B≥2 PXA, Poly-Alum (Radial) 10 V 330 14mΩ 4420mA 8 × 12,2 N/R (5) 1~2 B ≥ 1 (6) PM (Radial) 25 V 1000 43mΩ 1520mA 18 × 15 1 ≥2 N/R (4) UPM1E102MHH6 HD (Radial) 35 V 470 23mΩ 1820mA 10 × 20 1 ≥2 N/R (4) UHD1V471HR Panasonic, Poly-Aluminum 2.0 V 390 5mΩ 4000mA 7,3×4,3×4,2 N/R (5) N/R (8) B ≥ 2 (6) PXA16VC331MJ12TP PXA10VC331MH12 Nichicon, Aluminum (1) (2) (3) (4) (5) (6) (7) (8) EEFSE0J391R(VO≤ 1.6V) (7) Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. RoHS, Lead-free and Material Details See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. Additional output capacitance must include the required 200 µF of ceramic type. Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection Capacitor Types: a. Type A = (100 < capacitance × ESR ≤ 1000) b. Type B = (1,000 < capacitance × ESR ≤ 5,000) c. Type C = (5,000 < capacitance × ESR ≤ 10,000) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher ESR capacitors can be used in conjunction with lower ESR capacitance. N/R – Not recommended. The voltage rating does not meet the minimum operating limits. Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection Capacitor Types: a. Type A = (100 < capacitance × ESR ≤ 1000) b. Type B = (1,000 < capacitance × ESR ≤ 5,000) c. Type C = (5,000 < capacitance × ESR ≤ 10,000) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage. N/R – Not recommended. The ESR value of this capacitor is below the required minimum when not using TurboTrans. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 15 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Table 3. Input/Output Capacitors (continued) Capacitor Characteristics Capacitor Vendor, Type Series (Style) Working Value Voltage (µF) Quantity Output Bus (2) Max. ESR at 100 kHz Max Ripple Current at 85°C (Irms) Physical Size (mm) Input Bus No TurboTrans TurboTrans Cap Type (3) Vendor Part No. Sanyo TPE, Poscap (SMD) 10 V 330 25mΩ 3300mA 7,3×4,3 N/R (9) 1~3 C ≥ 1 (10) 10TPE330MF (11) TPE, Poscap (SMD) 2.5 V 470 7mΩ 4400mA 7,3×4,3 N/R (9) 1~2 B ≥ 2 (10) 2R5TPE470M7(VO≤ 1.8V) (11) TPD, Poscap (SMD) 2.5 V 1000 5mΩ 6100mA 7,3×4,3 N/R (9) N/R (12) B ≥ 1 (10) 2R5TPD1000M5(VO≤ 1.8V) (11) SEP, OS-CON (Radial) 16 V 330 16mΩ 4700mA 10 × 13 1 1~2 B≥1 SEPC, OS-CON (Radial) 16 V 470 10mΩ 6100mA 10 × 13 1 1~2 B ≥ 2 (10) 16SEPC470M SVP, OS-CON (SMD) 16 V 330 16mΩ 4700mA 10 × 12,6 1 1~2 B ≥ 1 (10) 16SVP330M 10 V 330 23mΩ 3000mA 7,3×4,3×4,1 N/R (9) 1~3 C ≥ 2 (10) TPME337M010R0035 7,3×4,3×4,1 N/R (9) 1~6 N/R (13) (9) 1~5 (13) 1~3 C ≥ 2 (10) T520X337M010ASE025 (11) 2~3 B≥2 (10) T530X337M010ASE015 (11) B≥1 (10) T530X687M004ASE005 (VO≤ 3.5V) (11) B≥1 (10) T530X108M2R5ASE005 (VO≤ 2.0V) (11) (10) 16SEP330M AVX, Tantalum TPM Multianode TPS Series III (SMD) TPS Series III (SMD) 10 V 330 40mΩ 1830mA 4V 1000 25mΩ 2400mA 7,3×6,1×3.5 N/R 10 V 330 25mΩ 2600mA 7,3×4,3×4,1 N/R (9) 7,3×4,3×4,1 N/R (9) N/R (9) (9) N/R TPSE337M010R0040 (VO≤ 5V) (14) TPSV108K004R0035 (VO≤ 2.1V) (14) Kemet, Poly-Tantalum T520 (SMD) T530 (SMD) T530 (SMD) T530 (SMD) 6.3 V 4V 330 680 15mΩ 5mΩ 3800mA 7300mA 7,3×4,3×4,1 N/R (12) N/R (12) 2.5 V 1000 5mΩ 7300mA 7,3×4,3×4,1 N/R 597D, Tantalum (SMD) 10 V 330 35mΩ 2500mA 7,3×5,7×4,1 N/R (9) 1~5 N/R (13) 94SA, OS-CON (Radial) 16 V 470 20mΩ 6080mA 12 × 22 1 1~3 C ≥ 2 (10) 94SA477X0016GBP 94SVP OS-CON(SMD) 16 V 330 17mΩ 4500mA 10 × 12,7 2 2~3 C ≥ 1 (10) 94SVP337X06F12 Kemet, Ceramic X5R 16 V 10 2mΩ – 3225 1 ≥ 1 (15) A (10) C1210C106M4PAC (SMD) 6.3 V 47 2mΩ N/R (9) ≥ 1 (15) A (10) C1210C476K9PAC Murata, Ceramic X5R 6.3 V 100 2mΩ N/R (9) ≥ 1 (15) A (10) GRM32ER60J107M (SMD) 6.3 V 47 N/R (9) ≥ 1 (15) A (10) GRM32ER60J476M (15) (10) GRM32ER61E226K Vishay-Sprague – 3225 597D337X010E2T 25 V 22 1 ≥1 16 V 10 1 ≥ 1 (15) A (10) GRM32DR61C106K TDK, Ceramic X5R 6.3 V 100 N/R (9) ≥ 1 (15) A (10) C3225X5R0J107MT (SMD) 6.3 V 47 N/R (9) ≥ 1 (15) A (10) C3225X5R0J476MT 16 V 10 1 ≥ 1 (15) A (10) C3225X5R1C106MT0 16 V 22 1 ≥ 1 (15) A (10) C3225X5R1C226MT 2mΩ – 3225 A (9) N/R – Not recommended. The voltage rating does not meet the minimum operating limits. (10) Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection Capacitor Types: a. Type A = (100 < capacitance × ESR ≤ 1000) b. Type B = (1,000 < capacitance × ESR ≤ 5,000) c. Type C = (5,000 < capacitance × ESR ≤ 10,000) (11) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage. (12) N/R – Not recommended. The ESR value of this capacitor is below the required minimum when not using TurboTrans. (13) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher ESR capacitors can be used in conjunction with lower ESR capacitance. (14) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 50% of the working voltage. (15) Any combination of ceramic capacitor values is limited as listed in the Electrical Characteristics table. 16 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 TURBOTRANS TurboTrans™ Technology TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules. TurboTrans optimizes the transient response of the regulator with added external capacitance using a single external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The amount of output capacitance required to meet a target output voltage deviation will be reduced with TurboTrans activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the voltage deviation following a load transient will be reduced. Applications requiring tight transient voltage tolerances and minimized capacitor footprint area will benefit greatly from this technology. TurboTrans™ Selection Using TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin5) and the TurboTrans pin (pin8). The value of the resistor directly corresponds to the amount of output capacitance required. All T2 products require a minimum value of output capacitance whether or not TurboTrans is used. For the PTH08T230W, the minimum required capacitance is 200µF. When using TurboTrans, capacitors with a capacitance × ESR product below 10,000 µF×mΩ are required. (Multiply the capacitance (in µF) by the ESR (in mΩ) to determine the capacitance × ESR product.) See the Capacitor Selection section of the datasheet for a variety of capacitors that meet this criteria. Figure 12 through Figure 17 show the amount of output capacitance required to meet a desired transient voltage deviation with and without TurboTrans for several capacitor types; TypeA (e.g. ceramic), TypeB (e.g. polymer-tantalum), and TypeC (e.g. OS-CON). To calculate the proper value of RTT, first determine your required transient voltage deviation limits and magnitude of your transient load step. Next, determine what type of output capacitors will be used. (If more than one type of output capacitor is used, select the capacitor type that makes up the majority of your total output capacitance). Knowing this information, use the chart in Figure 12 through Figure 17 that corresponds to the capacitor type selected. To use the chart, begin by dividing the maximum voltage deviation limit (in mV) by the magnitude of your load step (in Amps). This gives a mV/A value. Find this value on the Y-axis of the appropriate chart. Read across the graph to the 'With TurboTrans' plot. From this point, read down to the X-axis which lists the minimum required capacitance, CO, to meet that transient voltage deviation. The required RTT resistor value can then be calculated using the equation or selected from the TurboTrans table. The TurboTrans tables include both the required output capacitance and the corresponding RTT values to meet several values of transient voltage deviation for 25%(1.5A), 50%(3A), and 75%(4.5A) output load steps. The chart can also be used to determine the achievable transient voltage deviation for a given amount of output capacitance. Selecting the amount of output capacitance along the X-axis, reading up to the 'With TurboTrans' curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output capacitance. The required RTT resistor value can be calculated using the equation or selected from the TurboTrans table. As an example, let's look at a 12-V application requiring a 45mV deviation during an 3A, 50% load transient. A majority of 330µF, 10mΩ ouput capacitors are used. Use the 12V, Type B capacitor chart, Figure 14. Dividing 45mV by 3A gives 15mV/A transient voltage deviation per amp of transient load step. Select 15mV/A on the Y-axis and read across to the 'With TurboTrans' plot. Following this point down to the X-axis gives us a minimum required output capacitance of approximately 850µF. The required RTT resistor value for 850µF can then be calculated or selected from Table 5. The required RTT resistor is 1.82 kΩ. To see the benefit of TurboTrans, follow the 15mV/A marking across to the 'Without TurboTrans' plot. Following that point down shows that you would need a minimum of 4000µF of output capacitance to meet the same transient deviation limit. This is the benefit of TurboTrans. A typical TurboTrans schematic is shown in Figure 18. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 17 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 PTH08T231W Type A Capacitors 12-V INPUT 5-V INPUT 40 40 30 30 Without TurboTrans Transient − mV/A 20 With TurboTrans 10 9 With TurboTrans 10 9 PTH08T231 Type A Ceramic Capacitors 8 20 PTH08T231 Type A Ceramic Capacitors 8 Figure 12. Capacitor Type A, 100 ≤ C(µF) x ESR(mΩ) ≤ 1000 (e.g. Ceramic) 3000 4000 5000 C − Capacitance − µF C − Capacitance − µF 2000 400 500 600 700 800 900 1000 100 4000 5000 3000 2000 400 500 600 700 800 900 1000 300 200 100 300 7 7 200 Transient − mV/A Without TurboTrans Figure 13. Capacitor Type A, 100 ≤ C(µF) x ESR(mΩ) ≤ 1000 (e.g. Ceramic) Table 4. Type A TurboTrans CO Values and Required RTT Selection Table Transient Voltage Deviation (mV) 12 V Input 5 V Input 25% load step (1.5 A) 50% load step (3 A) 75% load step (4.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 45 90 135 200 open 200 open 40 80 120 240 150 210 634 35 70 105 300 56.2 260 97.6 30 60 90 400 23.7 340 37.4 25 50 75 560 9.76 460 16.5 20 40 60 840 2.0 660 5.9 15 30 45 N/A N/A 1450 short RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation: 1 - (CO / 1000) RTT = 40 x (k W) 5 x (CO / 1000) -1 [ ] (2) Where CO is the total output capacitance in µF. CO values greater than or equal to 1000 µF require RTT to be a short, 0 Ω. To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. 18 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 PTH08T230W Type B Capacitors 12-V INPUT 5-V INPUT 60 60 50 50 40 40 Without TurboTrans 30 Transient − mV/A 20 With TurboTrans 10 9 8 20 With TurboTrans 10 9 8 7 C − Capacitance − µF 10000 3000 4000 5000 6000 2000 1000 300 400 500 600 700 100 10000 3000 4000 5000 6000 2000 1000 300 400 500 600 700 200 100 7 200 Transient − mV/A 30 Without TurboTrans C − Capacitance − µF Figure 14. Capacitor Type B, 1000 < C(µF) x ESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum) Figure 15. Capacitor Type B, 1000 < C(µF) x ESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum) Table 5. Type B TurboTrans CO Values and Required RTT Selection Table Transient Voltage Deviation (mV) 12 V Input 5 V Input 25% load step (1.5 A) 50% load step (3 A) 75% load step (4.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 75 150 225 200 open 200 open 60 120 180 260 100 270 82.5 50 100 150 320 45.3 330 41.2 40 80 120 420 21.0 430 19.6 30 60 90 600 8.06 610 7.68 25 50 75 740 3.83 760 3.40 20 40 60 980 0.205 1000 short 15 30 45 3800 short 4500 short RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation: 1 - (CO / 1000) RTT = 40 x (k W) 5 x (CO / 1000) -1 [ ] (3) Where CO is the total output capacitance in µF. CO values greater than or equal to 1000 µF require RTT to be a short, 0 Ω. To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 19 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 PTH08T230W Type C Capacitors 12-V INPUT 5-V INPUT 60 60 50 50 40 40 Without TurboTrans 30 Transient − mV/A 20 With TurboTrans 10 9 8 20 10 9 8 With TurboTrans C − Capacitance − µF C − Capacitance − µF Figure 16. Capacitor Type C, 5000 < C(µF) x ESR(mΩ) ≤ 10,000 (e.g. OS-CON) 10000 3000 4000 5000 6000 2000 1000 100 10000 3000 4000 5000 6000 2000 1000 300 400 500 600 700 200 100 300 400 500 600 700 7 7 200 Transient − mV/A 30 Without TurboTrans Figure 17. Capacitor Type C, 5000 < C(µF) x ESR(mΩ) ≤ 10,000 (e.g. OS-CON) Table 6. Type C TurboTrans CO Values and Required RTT Selection Table Transient Voltage Deviation (mV) 12 V Input 5 V Input 25% load step (1.5 A) 50% load step (3 A) 75% load step (4.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 75 150 225 200 open 200 open 60 120 180 230 205 250 121 50 100 150 300 56.2 310 49.9 40 80 120 390 25.5 400 24.3 30 60 90 570 9.31 580 8.87 25 50 75 720 4.32 730 4.12 20 40 60 960 0.422 980 0.205 15 30 45 3100 short 4000 short RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation: 1 - (CO / 1000) RTT = 40 x (k W) 5 x (CO / 1000) -1 [ ] (4) Where CO is the total output capacitance in µF. CO values greater than or equal to 1000 µF require RTT to be a short, 0 Ω. To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. 20 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 TurboTrans TM RTT 0 kW +Sense AutoTrack SYNC TT VI +Sense VI VO VO PTH08T230W INH/UVLO GND −Sense VoAdj CI RSET 1% 0.05 W 330 mF (Required) CO1 CO2 200 mF Ceramic (Required) 1200 mF Type B −Sense GND A. GND The value of RTT must be calculated using the total value of output capacitance. Figure 18. Typical TurboTrans Schematic Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 21 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 UNDERVOLTAGE LOCKOUT (UVLO) The PTH08T230/231W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This enables the module to provide a clean, monotonic powerup for the load circuit, and also limits the magnitude of current drawn from the regulator’s input source during the power-up sequence. The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit control is overridden, and the module does not produce an output. The hysteresis voltage, which is the difference between the ON and OFF threshold voltages, is set at 500 mV. The hysteresis prevents start-up oscillations, which can occur if the input voltage droops slightly when the module begins drawing current from the input source. The UVLO feature of the PTH08T230/231W module allows for limited adjustment of the ON threshold voltage. The adjustment is made via the Inhibit/UVLO control pin (pin 10) using a single resistor (see Figure 19). When pin 10 is left open circuit, the ON threshold voltage is internally set to its default value, which is 4.3 V. The ON threshold might need to be raised if the module is powered from a tightly regulated 12-V bus. Adjusting the threshold prevents the module from operating if the input bus fails to completely rise to its specified regulation voltage. Threshold Adjust Equation 5 determines the value of RUVLO required to adjust VTHD to a new value. The default value is 4.3 V, and it may be adjusted, but only to a higher value. RUVLO = 70.74 - VTHD VTHD - 4.26 kW (5) Calculated Values Table 7 shows a chart of standard resistor values for RUVLO for different values of the ON threshold (VTHD) voltage. Table 7. Standard RUVLO values for Various VTHD values VTHD (V) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 RUVLO (kΩ) 88.7 52.3 37.4 28.7 23.2 19.6 16.9 14.7 13.0 11.8 10.5 9.76 8.87 PTH08T230W VI 2 VI 10 + CI RUVLO Inhibit/ UVLO Prog GND 3 GND Figure 19. UVLO Implementation 22 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Soft-Start Power Up The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, VI (see Figure 20). VI (5 V/div) Track PTH08T230W VI VO (2 V/div) 2 VI GND CI II (2 A/div) 3 GND t - Time = 4 ms/div Figure 20. Defeating the Auto-Track Function Figure 21. Power-Up Waveform When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 2ms–10ms) before allowing the output voltage to rise. The output then progressively rises to the module’s setpoint voltage. Figure 21 shows the soft-start power-up characteristic of the PTH08T230W operating from a 12-V input bus and configured for a 3.3-V output. The waveforms were measured with a 6-A constant current load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power-up is complete within 20 ms. Overcurrent Protection For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, a module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Overtemperature Protection (OTP) A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases by about 10°C below the trip point. The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 23 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Output On/Off Inhibit For applications requiring output voltage on/off control, the PTH08T230/231W incorporates an output Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 22 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input has its own internal pull-up. An external pull-up should never be connected to the inhibit pin. The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for control. VO (2 V/div) VI 2 VI PTH08T230W II (1 A/div) 10 Inhibit / UVLO GND 3 CI VINH (2 V/div) Q1 BSS138 1 = Inhibit GND t - Time = 4 ms/div Figure 22. On/Off Inhibit Control Circuit Figure 23. Power-Up Response from Inhibit Control Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 15 ms. Figure 23 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 6-A constant current load. Remote Sense Differential remote sense improves the load regulation performance of the module by allowing it to compensate for any IR voltage drop between its output and the load in either the positive or return path. An IR drop is caused by the output current flowing through the small amount of pin and trace resistance. Connecting the +Sense (pin 5) and –Sense (pin 6) pins to the respective positive and ground reference of the load terminals improves the load regulation of the output voltage at the connection points. With the sense pins connected at the load, the difference between the voltage measured directly between the VO and GND pins, and that measured at the Sense pins, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 300mV. If the remote sense feature is not used at the load, connect the +Sense pin to VO (pin4) and connect the –Sense pin to the module GND (pin 3). The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. 24 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Smart Sync Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. Driving the Smart Sync pins with an external oscillator set to the desired frequency, synchronizes all connected modules to the selected frequency. The synchronization frequency can be higher or lower than the nominal switching frequency of the modules within the range of 240 kHz to 400 kHz (see Electrical Specifications table for frequency limits). Synchronizing modules powered from the same bus, eliminates beat frequencies reflected back to the input supply, and also reduces EMI filtering requirements. These are the benefits of Smart Sync. Power modules can also be synchronized out of phase to minimize source current loading and minimize input capacitance requirements. Figure 24 shows a standard circuit with two modules syncronized 180° out of phase using a D flip-flop. 0 o VI = 5 V VI Track SYNC TT +Sense VO1 PTH08T230W INH/UVLO SN74LVC2G74 GND VO -Sense VoAdj VCC CLR PRE CLK Q D Q CO1 CI1 330 mF RSET1 200 mF fclock = 2 x fmodules GND GND 180 o VI Track SYNC TT +Sense VO2 PTH08T240W INH/UVLO GND VO -Sense VoAdj CO2 CI2 330 mF RSET2 200 mF GND Figure 24. Typical SmartSync Circuit Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 25 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Smart Sync Input Voltage Limits The maximum input voltage allowed for proper synchronization is duty cycle limited. When using Smart Sync, the maximum allowable input voltage varies as a function of output voltage and switching frequency. Operationally, the maximum input voltage is inversely proportional to switching frequency. Synchronizing to a higher frequency causes greater restrictions on the input voltage range. For a given switching frequency, Figure 25 shows how the maximum input voltage varies with output voltage. For example, for a module operating at 400kHz and an output voltage of 1.2V, the maximum input voltage is 10V. Exceeding the maximum input voltage may cause in an increase in output ripple voltage and increased output voltage variation. As shown in Figure 25, input voltages below 6V can operate down to the minimum output voltage over the entire synchronization frequency range. See the Electrical Characteristics table for the synchronization frequency range limits. 15 240 kHz 14 VI - Input Voltage - V 13 12 11 400 kHz 10 350 kHz 9 300 kHz 8 7 6 5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 VO- Output Voltage - V Figure 25. Input Voltage vs Output Voltage Auto-Track™ Function The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP family, microprocessors, and ASICs. How Auto-Track™ Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. 26 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Typical Auto-Track™ Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See U3 in Figure 26. To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least 20 ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure 26 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of PTH08T230/231W modules. The output of the TL7712A supervisor becomes active above an input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 28 ms after the input voltage has risen above U3's voltage threshold, which is 10.95 V. The 28-ms time period is controlled by the capacitor C3. The value of 2.2 µF provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure 27 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1 and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively. VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure 28. Power down is normally complete before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the Auto-Track slew rate capability. Notes on Use of Auto-Track™ 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been applied. Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 27 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 RTT U1 AutoTrack TurboTrans +Sense VI = 12 V VI VO PTH08T210W VO 1 = 3.3V Inhibit / UVLOProg –Sense GND VoAdj + CO 1 CI 1 U3 RSET1 1.21 kW 8 VCC 7 SENSE 5 RESET 2 RESIN TL7712A 1 REF 6 RESET 3 RTT U2 CT AutoTrack GND Smart Sync 4 CREF 0.1 mF CT 2.2 mF RRST 10 kW VI TurboTrans +Sense PTH08T230W VO VO 2 = 1.8V Inhibit / UVLOProg –Sense GND VoAdj + CO 2 CI 2 RSET2 4.75 kW Figure 26. Sequenced Power Up and Power Down Using Auto-Track VTRK (1 V/div) VO1 (1 V/div) VO1 (1 V/div) VO2 (1 V/div) VO2 (1 V/div) t - Time = 20 ms/div Figure 27. Simultaneous Power Up With Auto-Track Control 28 Submit Documentation Feedback VTRK (1 V/div) t - Time = 400 ms/div Figure 28. Simultaneous Power Down With Auto-Track Control Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 Prebias Startup Capability A prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, these types of modules can sink as well as source output current. The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1), or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain conditions must be maintained(2). Figure 30 shows an application demonstrating the prebias startup capability. The startup waveforms are shown in Figure 29. Note that the output current (IO) is negligible until the output voltage rises above the voltage backfed through the intrinsic diodes. The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of two approaches must be followed when input power is applied to the module. The Auto-Track function must either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach ensures that the Track pin voltage is above the set-point voltage at start up. 1. Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise of the output voltage under the module’s internal soft-start control. Startup is complete when the output voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is lowest. 2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout the power-up and power-down sequence. 3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track pin to VI. VIN (1 V/div) VO (1 V/div) IO (2 A/div) t - Time = 4 ms/div Figure 29. Prebias Startup Waveforms Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 29 PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 3.3 V Track VI = 5 V +Sense Vo = 2.5 V VI VO PTH08T230W Io Inhibit GND Vadj -Sense VCCIO VCORE + CI 330 mF RSET 2.37 kW CO 200 mF ASIC Figure 30. Application Circuit Demonstrating Prebias Startup 30 Submit Documentation Feedback Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W PTH08T230W, PTH08T231W www.ti.com SLTS265F – NOVEMBER 2005 – REVISED MAY 2007 TRAY AND TAPE & REEL DRAWINGS Copyright © 2005–2007, Texas Instruments Incorporated Product Folder Link(s): PTH08T230W PTH08T231W Submit Documentation Feedback 31 PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty PTH08T230WAD ACTIVE DIP MOD ULE ECL 10 36 Pb-Free (RoHS) Call TI N / A for Pkg Type PTH08T230WAS ACTIVE DIP MOD ULE ECM 10 36 TBD Call TI Level-1-235C-UNLIM PTH08T230WAST ACTIVE DIP MOD ULE ECM 10 250 TBD Call TI Level-1-235C-UNLIM PTH08T230WAZ ACTIVE DIP MOD ULE BCM 10 36 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH08T230WAZT ACTIVE DIP MOD ULE BCM 10 250 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH08T231WAD ACTIVE DIP MOD ULE ECL 10 36 Pb-Free (RoHS) Call TI N / A for Pkg Type PTH08T231WAS ACTIVE DIP MOD ULE ECM 10 36 TBD Call TI Level-1-235C-UNLIM PTH08T231WAST ACTIVE DIP MOD ULE ECM 10 250 TBD Call TI Level-1-235C-UNLIM PTH08T231WAZ ACTIVE DIP MOD ULE BCM 10 36 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH08T231WAZT ACTIVE DIP MOD ULE BCM 10 250 Pb-Free (RoHS) Call TI Level-3-260C-168 HR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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