PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TURBOTRANS™ FEATURES • • • • • • • • • • • • • Up to 10-A Output Current 4.5-V to 14-V Input Voltage Wide-Output Voltage Adjust (0.69 V to 5.5 V) ±1.5% Total Output Voltage Variation Efficiencies up to 96% Output Overcurrent Protection (Nonlatching, Auto-Reset) Operating Temperature: –40°C to 85°C Safety Agency Approvals: – UL 1950, CSA 22.2 950, EN60950 VDE (Pending) On/Off Inhibit Differential Output Voltage Remote Sense Adjustable Undervoltage Lockout SmartSync Technology Auto-Track™ Sequencing • • TurboTrans™ Technology Designed to meet Ultra-Fast Transient Requirements up to 300 A/µs APPLICATIONS • • • Complex Multi-Voltage Systems Microprocessors Bus Drivers DESCRIPTION The PTH08T240W is a high-performance 10-A rated, non-isolated power module. This module represents the 2nd generation of the PTH series power modules which includes a reduced footprint and additional features. Operating from an input voltage range of 4.5 V to 14 V, the PTH08T240W requires a single resistor to set the output voltage to any value over the range, 0.69 V to 5.5 V. The wide input voltage range makes the PTH08T240W particularly suitable for advanced computing and server applications that utilize a loosely regulated 8-V to 12-V intermediate distribution bus. Additionally, the wide input voltage range increases design flexibility by supporting operation with tightly regulated 5-V, 8-V, or 12-V intermediate bus architectures. The module incorporates a comprehensive list of features. Output over-current and over-temperature shutdown protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™sequencing is a popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a power system. The PTH08T240W includes new patent pending technologies, TurboTrans™ and SmartSync. The TurboTrans feature optimizes the transient response of the regulator while simultaneously reducing the quantity of external output capacitors required to meet a target voltage deviation specification. Additionally, for a target output capacitor bank, TurboTrans can be used to significantly improve the regulators transient response by reducing the peak voltage deviation. SmartSync allows for switching frequency synchronization of multiple modules, thus simplifying EMI noise suppression tasks and/or reducing input capacitor RMS current requirements. The module uses double-sided surface mount construction to provide a low profile and compact footprint. Package options include both through-hole and surface mount configurations that are lead (Pb) - free and RoHS compatible. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Auto-Track, TurboTrans, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2006, Texas Instruments Incorporated PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. SmartSync Track TurboTranst 10 VI 2 Track 1 SYNC TT +Sense VI VO PTH08T240W Inhibit 11 INH/UVLO + RUVLO 1% 0.05 W (Opional) CI 220 µF (Required) CI2 22 µF (Optional) RTT 1% 0.05 W (Optional) 9 −Sense GND GND VOAdj 3 4 8 6 +Sense 5 VO 7 + RSET 1% 0.05 W (Required) L O A D CO 220 µF (Required) −Sense GND GND UDG−06005 A. RSET required to set the output voltage to a value higher than 0.69 V. See Electrical Characteristics table. B. When VO > 3.3 V the minimum required output capacitance increases to 330 µF. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS (Voltages are with respect to GND) UNIT VI Input voltage TA Operating temperature range Over VI range Twave Wave soldering temperature Treflow Solder reflow temperature Tstg Storage temperature Mechanical shock Mechanical vibration Track –0.3 to VI + 0.3 Surace temperature of module body or pins for 5 seconds maximum. Surface temperature of module body or pins (1) 2 PTH08T240WAH 235 PTH08T240WAD 260 PTH08T240WAS 235 (1) PTH08T240WAZ 260 (1) °C –40 to 125 Per Mil-STD-883D, Method 2002.3 1 mssec, 1/2 sine, mounted Mil-STD-883D, Method 2007.2 20-2000 Hz Weight Flammability V –40 to 85 TBD Suffix AH and AD TBD Suffix AS and AZ TBD 5 G grams Meets UL94V-O During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 ELECTRICAL CHARACTERISTICS TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 220 µF, CO = 220 µF, and IO = IO max (unless otherwise stated) PARAMETER Output current IO TEST CONDITIONS 0.7 V ≤ VO ≤ 3.6 V VI Input voltage range Over IO range VOADJ Output voltage adjust range Over IO range MIN 25°C, natural convection 0.69 ≤ VO≤ 1.2 4.5 11 × VO (1) 1.2 < VO≤ 3.6 4.5 14 3.6 < VO≤ 5.5 VO + 2 14 0.69 5.5 ILIM ±0.5 ttrTT ±0.3 %Vo ±3 mV Load regulation Over IO range ±2 Total output variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C IO = 10 A 94% RSET = 2.38 kΩ, VO = 2.5 V 92% RSET = 4.78 kΩ, VO = 1.8 V 90% RSET = 7.09 kΩ, VO = 1.5 V 88% RSET = 12.1 kΩ, VO = 1.2 V 87% RSET = 20.8 kΩ, VO = 1.0 V 85% %Vo 20-MHz bandwidth 10 mVPP Overcurrent threshold Reset, followed by auto-recovery 20 A Transient response 2.5 A/µs load step 50 to 100% IOmax VO = 2.5 V w/o Turbotrans CO = 220 µF, Type C Recovery time 35 µs VO over/undershoot 165 mV w/ TurboTrans CO = 2000 µF, Type C, RTT = 0 Ω Recovery time 130 µs VO over/undershoot 30 mV dVtrack/dt Track slew rate capability CO ≤ CO (max) UVLOADJ VI increasing, RUVLO = OPEN Adjustable Under-voltage lockout Vi decreasing, RUVLO = OPEN (pin 11) Hysterisis, RUVLO≤ 52.3 kΩ –130 (3) 1 4.3 4.0 Inhibit control (pin 11) Input low voltage (VIL) Input standby current Inhibit (pin 11) to GND, Track (pin 10) open fs Switching frequency Over VI and IO ranges fSYNC Synchronization (SYNC) frequency VSYNCH SYNC High-Level Input Voltage VSYNCL SYNC Low-Level Input Voltage tSYNC SYNC Minimum Pulse Width CI External input capacitance 4.45 4.2 V VI – 0.5 Open (4) -0.2 0.8 Input low current (IIL), Pin 11 to GND Iin µA V/ms 0.5 Input high voltage (VIH) (5) (2) VO Ripple (peak-to-peak) Pin to GND (4) mV ±1.5 RSET = 1.21 kΩ, VO = 3.3 V Track input current (pin 10) (3) V %Vo Over VI range IIL (2) V –40°C < TA < 85°C ∆VtrTT (1) (2) A Line regulaltion ttr ∆Vtr ±1 UNIT Temperature variation Efficiency η MAX 10 Set-point voltage tolerance VO TYP 0 -235 µA 5 mA 300 kHz 240 400 kHz 2 5.5 V 0.8 200 Nonceramic Ceramic V 220 V nSec (5) 22 (5) µF The maximum input voltage is duty cycle limited to (VO× 11) or 14 volts, whichever is less. The maximum allowable input voltage is a function of switching frequency, and may increase or decrease when the SmartSync feature is utilized. Please review the SmartSync section of the Application Information for further guidance. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/°C or better temperature stability. A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The open-circuit voltage is less than 8 Vdc. This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related application note. A 220 µF electrolytic input capacitor is required for proper operation. The electrolytic capacitor must be rated for a minimum of 500 mA rms of ripple current. Submit Documentation Feedback 3 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 ELECTRICAL CHARACTERISTICS (continued) TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 220 µF, CO = 220 µF, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS w/o TurboTrans CO Capacitance Value MIN Nonceramic w/ TurboTrans (6) Ceramic Equivalent series resistance (non-ceramic) External output capacitance 220 Capacitance Value (6) (7) (8) 4 Reliability Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign MAX 5000 TBD µF mΩ see table µF (6) (8) 10000 TBD UNIT (7) TBD Capacitance × ESR product (CO× ESR) MTBF TYP (8) µF×mΩ 106 Hr For VO≤ 3.3 V, a 220 µF external output capacitor is required for basic operation. When VO > 3.3 V the minimum output capacitance increase to 330 µF. The minimum output capacitance requirement increases when TurboTrans™ (TT) technology is utilized. See related Application Information for more guidance. This is the calculated maximum disregarding TurboTrans™ technology. When the TurboTrans™ feature is utilized, the minimum output capacitance must be increased. When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR capacitors are required for proper operation. See the application notes for further guidance. Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 TERMINAL FUNCTIONS TERMINAL NAME NO. DESCRIPTION VI 2 The positive input voltage power node to the module, which is referenced to common GND. VO 5 The regulated positive power output with respect to the GND. GND Inhibit (1) and UVLO Vo Adjust 3, 4 11 This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for the control inputs. The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin to GND (pin 3) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more information, see the Application Information section. 8 A 0.05 W 1% resistor must be directly connected between this pin and pin 7 (–Sense) to set the output voltage to a value higher than 0.69 V. The temperature stability of the resistor should be 100 ppm/°C (or better). The setpoint range for the output voltage is from 0.69 V to 5.5 V. If left open circuit, the output voltage will default to its lowest value. For further information, on output voltage adjustment see the related application note. The specification table gives the preferred resistor values for a number of standard output voltages. + Sense 6 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy, +Sense must be connected to VO, very close to the load. – Sense 7 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy, –Sense must be connected to GND (pin 4), very close to the load. 10 This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to VI. Track NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. For more information, see the related application note. TurboTrans™ 9 This input pin adjusts the transient response of the regulator. To activate the TurboTrans™ feature, a 1%, 50 mW resistor must be connected between this pin and pin 6 (+Sense) very close to the module. For a given value of output capacitance, a reduction in peak output voltage deviation is achieved by utililizing this feature. If unused, this pin must be left open-circuit. The resistance requirement can be selected from the TurboTrans™ resistor table in the Application Information section. External capacitance must never be connected to this pin unless the TurboTrans resistor value is a short, 0Ω. SmartSync 1 This input pin sychronizes the switching frequency of the module to an external clock frequency. The SmartSync feature can be used to sychronize the switching fequency of multiple PTH08T240W modules, aiding EMI noise suppression efforts. If unused, this pin should be connected to GND (pin 3). For more information, please review the Application Information section. (1) Denotes negative logic: Open = Normal operation, Ground = Function active 11 1 10 2 9 8 7 PTH08T240W (Top View) 3 4 6 5 Submit Documentation Feedback 5 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 TYPICAL CHARACTERISTICS (1) (2) CHARACTERISTIC DATA ( VI = 12 V) EFFICIENCY vs LOAD CURRENT OUTPUT RIPPLE vs LOAD CURRENT 100 POWER DISSIPATION vs LOAD CURRENT 16 4.0 14 3.5 VO = 2.5 V VO = 5.0 V VO = 3.3 V VO = 1.8 V 70 VO = 2.5 V VO = 1.2 V 60 50 40 30 VO = 5.0 V 12 10 8 VO = 3.3 V 6 4 VO = 1.8 V VO = 1.2 V 2 VI = 12 V 20 0 2 4 6 8 VO = 2.5 V 0 10 PD − Power Dissipation − W 80 VO − Output Voltage Ripple − mVPP η − Efficiency − % 90 IO − Output Current − A 2.5 VO = 5.0 V 2.0 1.5 1.0 2 VO = 1.2 V 0.5 VO = 1.8 V VI = 12 V 0 0 VO = 3.3 V 3.0 4 6 8 10 IO − Output Current − A Figure 1. Figure 2. 0 2 VI = 12 V 4 6 8 IO − Output Current − A 10 Figure 3. SAFE OPERATING AREA TA − Ambient Temperature − °C 90 400 LFM 80 Natural Convection 70 200 LFM 60 50 100 LFM 40 30 VI = 12 V VO = 3.3 V 20 0 2 4 6 8 10 IO − Output Current − A Figure 4. (1) (2) 6 The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, and Figure 3. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper. For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please refer to the mechanical specification for more information. Applies to Figure 4. Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 TYPICAL CHARACTERISTICS (1) (2) CHARACTERISTIC DATA ( VI = 5 V) EFFICIENCY vs LOAD CURRENT 10 VO = 3.3 V 2.5 VO − Output Voltage Ripple − mVPP η − Efficiency − % 80 VO = 0.69 V VO = 2.5 V VO = 0.9 V VO = 1.2 V 60 VO = 1.8 V 50 40 VO = 1.8 V 2.0 8 6 VO = 3.3 V 0 2 4 6 8 VO = 0.9 V 4 VO = 1.8 V VO = 1.2 V 1.0 VO = 0.69 V VO = 0.69 V 0.5 2 VO = 2.5 V 0 10 IO − Output Current − A VO = 2.5 V 1.5 VO = 1.2 V VO = 0.9 V VI = 5 V 30 VO = 3.3 V VI = 5 V 90 70 POWER DISSIPATION vs LOAD CURRENT PD − Power Dissipation − W 100 OUTPUT RIPPLE vs LOAD CURRENT VI = 5 V 0 2 4 6 8 IO − Output Current − A Figure 5. 0 10 Figure 6. 0 2 4 6 8 IO − Output Current − A 10 Figure 7. SAFE OPERATING AREA TA − Ambient Temperature − °C 90 80 Natural Convection 70 60 50 40 30 VI = 5 V VO = 3.3 V 20 0 2 4 6 8 10 IO − Output Current − A Figure 8. (1) (2) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 5, Figure 6, and Figure 7. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper. For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please refer to the mechanical specification for more information. Applies to Figure 8. Submit Documentation Feedback 7 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 APPLICATION INFORMATION CAPACITOR RECOMMENDATIONS FOR THE PTH08T240W POWER MODULE Input Capacitor (Required) The required input capacitance is 220-µF of electrolytic type. When VO > 3V , the 220 µF electrolytic capacitor must be rated for 700 mArms ripple current capability. For VO ≤ 3 V, the ripple current rating must be at least 450 mArms. The size, type and value of input capacitor is determined by the converter’s transient performance capability. This minimum value assumes that the converter is supplied with a responsive, low inductance input source. This source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground planes. For high-performance applications, or wherever the input source performance is degraded, 470 µF of input capacitance is recommended. The additional input capacitance above the minimum level insures an optimized performance. Ripple current (rms) rating, less than 100 mΩ of equivalent series resistance (ESR), and temperature are the main considerations when selecting input capacitors. The ripple current reflected from the input of the PTH08T240W module is moderate to low. Therefore any good quality, computer-grade electrolytic capacitor will have an adequate ripple current rating. Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability. No tantalum capacitors were found with a sufficient voltage rating to meet this requirement. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, Os-Con, poly-aluminum, and polymer-tantalum types should be considered. Adding one or two ceramic capacitors to the input attenuates high-frequency reflected ripple current. TurboTrans Output Capacitor The PTH08T240W requires a minimum output capacitance of 220 µF. The required capacitance above 220 µF will be determined by actual transient deviation requirements. TurboTrans allows the designer to optimize the capacitance load according to the system transient design requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. Capacitors with a capacitance (µF) × ESR (mΩ) product of ≤ 10,000 mΩ×µF are required. Working Example: A bank of 6 identical capacitors, each with a capacitance of 330 µF and 5 mΩ ESR, has a C × ESR product of 1650 µFxmΩ (330 µF × 5 mΩ). Using TurboTrans in conjunction with the high quality capacitors (capacitance (µF) × ESR (mΩ)) reduces the overall capacitance requirement while meeting the minimum transient amplitude level. Table 1 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column. Note: See the TurboTrans Technology Application Notes within this document for selection of specific capacitance. Non-TurboTrans Output Capacitor The PTH08T240W requires a minimum output capacitance of 220 µF. Non-TurboTrans applications must observe minimum output capacitance ESR limits. A combination of 200 µF of ceramic capacitors plus low ESR (15 mΩ to 30 mΩ) Os-Con electrolytic/tantalum type capacitors can be used. When using Polymer tantalum types, tantalum type, or Oscon types only, the capacitor ESR bank limit is 3 mΩ to 5 mΩ. (Note: no ceramic capacitors are required). This is necessary for the stable operation of the regulator. Additional capacitance can be added to improve the module's performance to load transients. High quality computer-grade electrolytic capacitors are recommended. Aluminum electrolytic capacitors provide adequate decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum, ceramic, or Os-Con type capacitors are necessary. 8 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 APPLICATION INFORMATION (continued) When using a combination of one or more non-ceramic capacitors, the calculated equivalent ESR should be no lower than 2 mΩ (4 mΩ when calculating using the manufacturer’s maximum ESR values). A list of preferred low-ESR type capacitors, are identified in Table 1. Ceramic Capacitors Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output their combined ESR is not critical as long as the total value of ceramic capacitors, with values between 10 µF and 100 µF, does not exceed 3000 µF (non-TurboTrans). In TurboTrans applications, when ceramic capacitors are used on the output bus, total capacitance including bulk and ceramic types is not to exceed 14,000 µF. Tantalum, Polymer-Tantalum Capacitors Tantalum type capacitors are only used on the output bus, and are recommended for applications where the ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are suggested over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are also less reliable due to their reduced power dissipation and surge current ratings. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. Capacitor Table Table 1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to ensure both optimum regulator performance and long capacitor life. Designing for Fast Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 2.5 A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional low ESR ceramic capacitor decoupling. Generally, with 50% load steps at > 100 A/µs, adding multiple 10 µF ceramic capacitors, 3225 case size, plus 10 × 1 µF, including numerous high frequency ceramics (≤ 0.1 µF) are all that is required to soften the transient higher frequency edges. Special attention is essential with regards to location, types, and position of higher frequency ceramic and lower ESR bulk capacitors. DSP, FPGA and ASIC vendors identify types, location and capacitance required for optimum performance of the high frequency devices. The details regarding the PCB layout and capacitor/component placement are important at these high frequencies. Low impedance buses and unbroken PCB copper planes with components located as close to the high frequency processor are essential for optimizing transient performance. In many instances additional capacitors may be required to insure and minimize transient aberrations. Submit Documentation Feedback 9 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 APPLICATION INFORMATION (continued) Table 1. Input/Output Capacitors (1) Capacitor Characteristics Capacitor Vendor, Type Series (Style) Working Value Voltage (µF) Max. ESR at 100 kHz Quantity Max Ripple Physical Current at Size (mm) 85°C (Irms) Output Bus Input Bus No TurboTrans TurboTrans (Cap Type) (2) Vendor Part No. Panasonic (Radial) 25 V 270 0.090Ω >755mA 10 × 12,5 ≥1 (3) ≥ 1 (4) N/R (5) EEUFC1E271 FC (Radial) 25 V 560 0.065Ω 1205 mA 12,5 × 15 ≥1 (3) ≥ 1 (4) N/R (5) EEUFC1E561S FC(SMD) 25 V 470 0.065Ω >1200 mA 12,5 × 16,5 ≥1 (3) ≥ 1 (4) N/R (5) EEVFC1E471LQ FK(SMD) 25 V 470 0.080Ω 850 mA 10 ×10,2 ≥1 (3) ≥ 1 (6) N/R (5) EEVFK1E471P PTB(SMD) Polymer Tantalum 6.3 V 330 0.025Ω 2600 mA 7,3x 4,3x 2.8 N/R (7) (8 ≥ 1 ~ ≤ 4 (4) C ≥ 2 (2) LXZ, Aluminum (Radial) 25 V 330 0.09Ω 760 mA 10 × 12,5 ≥1 (3) PS, Poly-Aluminum(Radial) 16 V 330 0.014Ω 5060 mA 10 × 12,5 ≥1 (3) ≥1~≤3 B ≥ 2 (2) 16PS330MJ12 PXA, Poly-Aluminum (SMD) 16 V 330 0.014Ω 5050 mA 10 × 12,2 ≥1 (3) ≥1~≤3 B ≥ 2 (2) PXA16VC331MJ12TP PS, Poly-Aluminum(Radial) 10 V 270 0.014Ω 4420 mA 8 × 11,5 N/R (7) (8 ≥ 1 ~≤ 2 B ≥ 2 (2) 10PS270MH11(VI:VO≥5.5V) (7) PXA, Poly-Aluminum(Radial) 10 V 330 0.014Ω 4420 mA 8 × 12 N/R (7) (8 ≥1~≤2 B ≥ 2 (2) PXA10VC331MH12 (VI:VO≥5.5V) (7) Nichicon, Aluminum 25 V 330 0.095Ω 750 mA 10 × 15 ≥1 (3) ≥ 1 (4) N/R (5) UPM1E331MPH6 HD (Radial) 25 V 220 0.072Ω 760 mA 8 × 11,5 ≥1 (3) ≥ 1 (4) N/R (5) UHD1E221MPR PM (Radial) 35 V 560 0.048Ω 1360 mA 16 × 15 ≥1 (3) ≥ 2 (4) N/R (5) UPM1V561MHH6 4000 mA 7,3 L×4,3 W ×4,2H N/R (7) (8 N/R (8) B ≥ 2 (2) United Chemi-Con Panasonic, Poly-Aluminum: (1) (2) (3) (4) (5) (6) (7) (8) (9) 10 2.0 V 390 0.005Ω ) ) ) ) ≥1 (4) N/R (5) 4PTB337MD6TER (VI:VO≥5.1V) (7) LXZ25VB331M10X12LL EEFSE0J391R(VO≤1.6V) (9) Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. RoHS, Lead-free and Material Details See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. Required capacitors with TurboTrans. See the TransTrans Application information for Capacitor Selection Capacitor Type Groups by ESR (Equivalent Series Resistance) : • Type A = (100 < capacitance × ESR ≤ 1000) • Type B = (1,000 < capacitance × ESR ≤ 5,000) • Type C = (5,001 < capacitance × ESR ≤ 10,000) In addition to the required input electrolytic capacitance , ≥ 20 µF ceramic capacitors are required to reduce the high-frequency reflected ripple current. Total bulk nonceramic capacitors on the output bus with ESR of ≥ 15mΩ to ≤ 30mΩ requires an additional ≥ 200 µF of ceramic capacitor. Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher ESR capacitors can be used in conjunction with lower ESR capacitance. Output bulk capacitor's maximum ESR is ≥ 30 mΩ. Additional ceramic capacitance of ≥ 200 µF is required. The voltage rating and derating of this capacitor only allows it to be used for voltages that are equal or less than 5.1 V. N/R – Not recommended. The voltage rating does not meet the minimum operating limits. The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage. Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 APPLICATION INFORMATION (continued) Table 1. Input/Output Capacitors (continued) Capacitor Characteristics Capacitor Vendor, Type Series (Style) Working Value Voltage (µF) Max. ESR at 100 kHz Quantity Max Ripple Physical Current at Size (mm) 85°C (Irms) Output Bus Input Bus No TurboTrans TurboTrans (Cap Type) (2) Vendor Part No. Sanyo TPE, Poscap (SMD) 10 V 330 0.025Ω 3000 mA 7,3 × 4,3 N/R (10) ( ≥1~≤3 C ≥ 2 (12) 10TPE330MF (VI:VO ≤ 5.1 V) (13) TPE Poscap(SMD) 2.5 V 470 0.007Ω 4400 mA 7,3 × 4,3 N/R (11) ≥1≤2 B ≥ 2 (12) 2R5TPE470M7(VO ≤ 1.8 V) (13) 11) TPD Poscap (SMD) 2.5 V 1000 0.005Ω 6100 mA 7,3 × 4,3 N/R (11) SEP, Os-Con (Radial) 16 V 330 0.016Ω >4700 mA 10 ×13 ≥1 (14) ≥1~≤3 B≥ SP Oscon ( Radial) 16 V 270 0.018 >4400 mA 10 × 11,5 ≥1 (14) ≥1~≤3 B ≥ 2 (12) 16SP270M SEPC, Os-Con (Radial) 16 V 270 0.011Ω >5000 mA 8 × 13 ≥1 (14) ≥1~≤2 B ≥ 2 (12) 16SEPC270M SVP, Os-Con (SMD) 16 V 330 0.016Ω 4700mA 10 × 12,6 ≥1 (14) ≥ 1 ~ ≤ 3 (15) B ≥ 2 (12) (15) 16SVP330M AVX, Tantalum, Series III TPM Multianode 10 V 10 V 330 330 0.040Ω 0.023Ω >1828 mA >3000 mA 7,3L×4,3W × 4,1 H N/R (11) N/R (11) ≥ 1 ~ ≤ 6 (15) ≥ 1 ~ ≤ 3 (15) N/R (16) C ≥ 2 (12) (15) TPSE337M010R0040(VO≥5V) (10) TPME337M010#0023(VO≥5V) (10) TPS Series III (SMD) 4V 1000 0.035Ω 2405 7,3L × 5,7W N/R (11) ≥ 1 ~ ≤ 5 (15) N/R (16) Kemet, Poly-Tantalum 10 V 330 0.025Ω 2600 mA 4,3 W N/R (11) ≥ 1~ ≤ 4 (15) C ≥ 2 (12) T520X337M010ASE025 (VI:VO≥5.5V) (10) T520 (SMD) 6.3 V 330 0.015Ω >3800 mA × 7,3 L N/R (10) ( ≥2~≤3 B ≥ 2 (12) T530X337M006ASE015 (VI:VO≥5.1V) (10) T530 (SMD) 4V 680 0.005Ω 7300 mA ×4H N/R (11) ≤1 B ≥ 1 (12) T530X687M004ASE005 (VO ≤ 3.5 V) (13) T530 (SMD) 2.5 V 1000 0.005Ω 7300 mA 4,3 w × 7,3 L N/R (11) ≤1 B ≥ 1 (12) T530X108M2R5ASE005 (VO ≤ 2.0 V) (13) 597D, Tantalum (SMD) 16 V 220 0.04Ω 2300 mA 7,2L×5,7W ×4,1H N/R (11) ≥1~≤5 C ≥ 2 (12) 597D227X16E2T (VI:VO≥5.5V) (10) 94SP, Os-con (Radial) 16 V 270 0.018Ω 4400mA 10 × 10,5 ≥1 (14) ≥1~≤3 C ≥ 2 (12) 94SP277X0016FBP 94SVP Os-Con(SMD) 16 V 330 0.017Ω >4500 mA 10 × 12,7 ≥1 (14) ≥1~≤3 B ≥ 2 (12) 94SVP337X016F12 Kemet, Ceramic X5R 16 V 10 0.002Ω – 3225 ≥2 (14) ≥ 1 (17) A (12) C1210C106M4PAC 11) ≤1 B≥ 1 (12) 2R5TPD1000M5(VO ≤ 1.8 V) (13) 2 (12) 16SEP330M TPSV108K004R0035 (VO ≤ 2.1 V) (13) Vishay-Sprague N/R (11) ≥ 1 (17) A (12) C1210C476K9PAC N/R (11) ≥ 1 (17) A (12) GRM32ER60J107M (SMD) 6.3 V 47 0.002Ω Murata, Ceramic X5R 6.3 V 100 0.002Ω (SMD) 6.3 V 47 N/R (11) ≥ 1 (17) A (12) GRM32ER60J476M 25 V 22 ≥ 1 (14) ≥ 1 (17) A (12) GRM32ER61E226K 16 V 10 ≥2 (14) ≥ 1 (17) A (12) GRM32DR61C106K TDK, Ceramic X5R 6.3 V 100 N/R (11) ≥ 1 (17) A (12) C3225X5R0J107MT (SMD) 6.3 V 47 N/R (11) ≥ 1 (17) A (12) C3225X5R0J476MT 16 V 10 ≥2 (14) ≥ 1 (17) A (12) C3225X5R1C106MT0 16 V 22 ≥1 (14) ≥ 1 (17) A (12) C3225X5R1C226MT 0.002Ω – – 3225 3225 (10) The voltage rating and derating of this capacitor only allows it to be used for voltages that are equal or less than 5.1 V. (11) N/R – Not recommended. The voltage rating does not meet the minimum operating limits. (12) Required capacitors with TurboTrans. See the TransTrans Application information for Capacitor Selection Capacitor Type Groups by ESR (Equivalent Series Resistance) : • Type A = (100 < capacitance × ESR ≤ 1000) • Type B = (1,000 < capacitance × ESR ≤ 5,000) • Type C = (5,001 < capacitance × ESR ≤ 10,000) (13) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage. (14) In addition to the required input electrolytic capacitance , ≥ 20 µF ceramic capacitors are required to reduce the high-frequency reflected ripple current. (15) Total bulk nonceramic capacitors on the output bus with ESR of ≥ 15mΩ to ≤ 30mΩ requires an additional ≥ 200 µF of ceramic capacitor. (16) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher ESR capacitors can be used in conjunction with lower ESR capacitance. (17) Maximum ceramic capacitance on the output bus is ≤ tbd µF. Any combination of the ceramic capacitor values is limited to tbd µF for non-TurboTrans applications. The total capacitance is limited to tbd µF which includes all ceramic and non-ceramic types. Submit Documentation Feedback 11 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 TurboTrans™ Technology TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules. TurboTrans optimizes the transient response of the regulator with added external capacitance using a single external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The amount of output capacitance required to meet a target output voltage deviation will be reduced with TurboTrans activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the voltage deviation following a load transient will be reduced. Applications requiring tight transient voltage tolerances and minimized capacitor footprint area will benefit greatly from this technology. TurboTrans™ Selection Utilizing TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin 6) and the TurboTrans pin (pin 9). The value of the resistor directly corresponds to the amount of output capacitance required. All T2 products require a minimum value of output capacitance whether or not TurboTrans is utilized. For the PTH08T240W, the minimum required capacitance is 220 µF. When using TurboTrans, capacitors with a capacitance × ESR product below 10,000 µF×mΩ are required. (Multiply the capacitance (in µF) by the ESR (in mΩ) to determine the capacitance × ESR product.) See the Capacitor Selection section of the datasheet for a variety of capacitors that meet this criteria. Figure 9 thru Figure 13 show the amount of output capacitance required to meet a desired transient voltage deviation with and without TurboTrans for several capacitor types; Type A (e.g. ceramic), Type B (e.g. polymer-tantalum), and Type C (e.g. OS-CON). To calculate the proper value of RTT, first determine your required transient voltage deviation limits and magnitude of your transient load step. Next, determine what type of output capacitors will be used. (If more than one type of output capacitor is used, select the capacitor type that makes up the majority of your total output capacitance.) Knowing this information, use the chart in Figure 9 thru Figure 13 that corresponds to the capacitor type selected. To use the chart, begin by dividing the maximum voltage deviation limit (in mV) by the magnitude of your load step (in Amps). This gives a mV/A value. Find this value on the Y-axis of the appropriate chart. Read across the graph to the 'With TurboTrans' plot. From this point, read down to the X-axis which lists the minimum required capacitance, CO, to meet that transient voltage deviation. The required RTT resistor value can then be calculated using the equation or selected from the TurboTrans table. The TurboTrans tables include both the required output capacitance and the corresponding RTT values to meet several values of transient voltage deviation for 25% (2.5 A), 50% (5 A), and 75% (7.5 A) output load steps. The chart can also be used to determine the achievable transient voltage deviation for a given amount of output capacitance. By selecting the amount of output capacitance along the X-axis, reading up to the desired 'With TurboTrans'' curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output capacitance. The required RTT resistor value can be calculated using the equation or selected from the TurboTrans table. As an example, let's look at a 12-V application requiring a 50 mV deviation during an 5 A, 50% load transient. A majority of 330 µF, 10 mA ouput capacitors will be used. Use the 12-V, Type B capacitor chart, Figure 10. Dividing 50 mV by 5 A gives 10 mV/A transient voltage deviation per amp of transient load step. Select 10 mV/A on the Y-axis and read across to the 'With TurboTrans'' plot. Following this point down to the X-axis gives a minimum required output capacitance of approximately 680 µF. The required RTT resistor value for 680 µF can then be calculated or selected from Table 3. The required RTT resistor is approximately 7.32 kΩ. To see the benefit of TurboTrans, follow the 10 mV/A marking across to the 'Without TurboTrans' plot. Following that point down shows that you would need a minimum of 3000 µF of output capacitance to meet the same transient deviation limit. This is the benefit of TurboTrans. 12 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 6 5 Transient - mV/A 4 3 2 6000 7000 8000 9000 10000 4000 5000 3000 2000 600 700 800 900 1000 1 C - Capacitance - mF Figure 9. Capacitor Type A, 100 ≤ C(µF)xESR(mΩ) ≤ 1000 (e.g. Ceramic) Table 2. Type A TurboTrans CO Values and Required RTT Selection Table Transient Voltage Deviation (mV) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (Ω) tbd tbd open tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd short 25% load step (2.5 A) 50% load step (5 A) 75% load step (7.5 A) tbd tbd tbd tbd tbd tbd RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 1 R TT + TBD (1) Where CO is the total output capacitance in µF. CO values greater than or equal to TBD µF require RTT to be a short, 0Ω. To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. Submit Documentation Feedback 13 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Type B Capacitor 12-V Input Type B Capacitor 5-V Input 30 30 WIth TurboTrans Without TurboTrans VO − Output Voltage Ripple − mVPP 10 9 8 7 6 5 4 3 WIth TurboTrans Without TurboTrans 20 10 9 8 7 6 5 4 4000 5000 6000 3000 2000 1000 200 400 500 2 10000 4000 5000 6000 3000 2000 1000 400 500 300 200 2 10000 3 300 Transient − mV/A 20 IO − Output Current − A C − Capacitance − µF Figure 10. Cap Type B, 1000 < C(µF)xESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum) Figure 11. Cap Type B, 1000 < C(µF)xESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum) Table 3. Type B TurboTrans CO Values and Required RTT Selection Table Transient Voltage Deviation (mV) 12-V Input 5-V Input 25% load step (2.5 A) 50% load step (5 A) 75% load step (7.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 55 110 165 220 open 220 open 40 80 120 330 57.6 360 42.2 35 70 105 400 30.9 450 23.7 30 60 90 510 16.2 560 12.7 25 50 75 680 7.32 750 5.49 20 40 60 1000 1.58 1050 0.536 15 30 45 2100 short 2600 short 10 20 30 10500 short exceeds limit — RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 2. For VO > 3.3 V please contact TI for CO and RTT values. R TT + 40 ƪ1 * ǒCOń1100Ǔƫ ƪǒC Oń220Ǔ * 1ƫ (kW) For V O v 3.3 V, CO(min) + 220 mF (2) Where CO is the total output capacitance in µF. CO values greater than or equal to 1100 µF require RTT to be a short, 0Ω. (RTT results in a negative value when CO > 1100 µF). To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. 14 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Type C Capacitor 12-V Input Type C Capacitor 5-V Input 30 10000 200 4000 5000 6000 500 IO − Output Current − A 2000 2 10000 2 3000 3 2000 3 1000 4 300 4 1000 5 500 5 10 9 8 7 6 300 Transient − mV/A 20 10 9 8 7 6 200 VO − Output Voltage Ripple − mVPP 20 WIth TurboTrans Without TurboTrans 3000 WIth TurboTrans Without TurboTrans 4000 5000 6000 30 C − Capacitance − µF Figure 12. Cap Type C, 5000 < C(µF)xESR(mΩ) ≤ 10,000 (e.g. Os-Con) Figure 13. Cap Type C, 5000 < C(µF)xESR(mΩ) ≤ 10,000 (e.g. Os-Con) Table 4. Type C TurboTrans CO Values and Required RTT Selection Table Transient Voltage Deviation (mV) 12-V Input 5-V Input 25% load step (2.5 A) 50% load step (5 A) 75% load step (7.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 75 150 225 220 open 250 1300 60 120 180 270 294 330 133 45 90 135 400 68.1 480 45.3 35 70 105 580 31.6 700 21.5 30 60 90 720 20.0 860 13.7 25 50 75 950 11.8 1150 7.68 20 40 60 1300 5.23 1550 2.61 15 30 45 2000 short 2800 short 10 20 30 7400 short exceeds limit — RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 3 . For VO > 3.3 V please contact TI for CO and RTT values. R TT + 40 ƪǒǒǒ5 ƪ1 * ǒCOń1980Ǔƫ ƫ C OǓ ) 880Ǔń1980Ǔ * 1 (kW) For VO v 3.3 V (3) Where CO is the total output capacitance in µF. CO values greater than or equal to 1980 µF require RTT to be a short, 0Ω. (RTT results in a negative value when CO > 1980 µF). To ensure stability, the value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. Submit Documentation Feedback 15 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 TurboTrans 10 1 VI AutoTrack TurboTrans +Sense Smart Sync 2 PTH08T240W VI 11 Inhibit/ Prog UVLO 3 4 6 +Sense 5 VO VO −Sense GND CI 220 mF (Required) RTT 0 kW 9 7 VOAdj 8 RSET 1% 0.05 W L O A D COTT 1320 mF Type B (Required) −Sense GND GND Figure 14. TurboTrans™ with Minimum Capacitance Requirement Without TurboTrans 100 mV/div With TurboTrans 100 mV/div 2.5 A/ms 50% Load Step Figure 15. TurboTrans Waveform 16 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 ADJUSTING THE OUTPUT VOLTAGE OF THE PTH08T240W WIDE-OUTPUT ADJUST POWER MODULE The Vo Adjust control (pin 8) sets the output voltage of the PTH08T240W. The adjustment range of the PTH08T240W is 0.69 V to 5.5 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the Vo Adjust and – Sense pins. Table 5 gives the standard value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. For other output voltages, the value of the required resistor can either be calculated using the following formula, or simply selected from the range of values given in Table 6. Figure 16 shows the placement of the required resistor. RSET = 10 kW x 0.69 - 1.43 kW VO - 0.69 (4) Table 5. Standard Values of RSET for Standard Output Voltages VO (Standard) RSET (Standard Value) VO (Actual) 169 Ω 5.01 V 3.3 V 1.21 kΩ 3.30 V 2.5 V 2.37 kΩ 2.51 V 1.8 V 4.75 kΩ 1.81 V 1.5 V 7.15 kΩ 1.49 V 12.1 kΩ 1.20 V 20.5 kΩ 1.00 V 681 kΩ 0.700 V 5.0 V 1.2 V 1V (2) (2) 0.7 V (1) (2) (1) (2) The minimum input voltage is (VO + 2) V. The maximum input voltage is (VO× 11) or 14 V, whichever is less. The maximum allowable input voltage is a function of switching frequency and may increase or decrease when the Smart Sync feature is utilized. Please review the Smart Sync application section for further guidance. +Sense PTH08T240W VO −Sense GND 3 GND 4 6 +Sense 5 VO 7 VOAdj 8 RSET 1% 0.05 W CO −Sense GND (1) Use a 0.05 W resistor. The tolerance should be 1%, with temperature stability of 100 ppm/°C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 8 and 7 using dedicated PCB traces. (2) Never connect capacitors from VO Adjust to either + Sense, GND, or VO. Any capacitance added to the VO Adjust pin affects the stability of the regulator. Figure 16. Vo Adjust Resistor Placement Submit Documentation Feedback 17 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Table 6. Output Voltage Set-Point Resistor Values VO Required RSET VO Required RSET 0.700 (1) 681 kΩ 1.950 4.05 kΩ 0.750 (1) 113 kΩ 2.100 3.46 kΩ 0.800 (1) 61.3 kΩ 2.250 2.99 kΩ 0.850 (1) 41.7 kΩ 2.400 2.61 kΩ 0.900 (1) 31.4 kΩ 2.500 2.38 kΩ 0.950 (1) 25.1 kΩ 2.700 2.00 kΩ 1.000 (1) 20.8 kΩ 2.850 1.76 kΩ 1.050 (1) 17.8 kΩ 3.000 1.56 kΩ 1.100 (1) 15.4 kΩ 3.150 1.38 kΩ 1.150 (1) 13.6 kΩ 3.300 1.21 kΩ 1.200 (1) 12.1 kΩ 3.450 1.07 kΩ 10.9 kΩ 3.600 941 Ω 1.250 (1) (2) 1.300 9.88 kΩ 3.750 (2) 1.350 9.03 kΩ 3.900 (2) 720 Ω 1.400 8.29 kΩ 4.100 (2) 593 Ω 1.450 7.65 kΩ 4.200 (2) 536 Ω 455 Ω 825 Ω 1.500 7.09 kΩ 4.350 (2) 1.550 6.59 kΩ 4.500 (2) 381 Ω 1.600 6.15 kΩ 4.650 (2) 312 Ω 249 Ω 1.650 5.76 kΩ 4.800 (2) 1.700 5.40 kΩ 5.000 (2) 171 Ω 1.750 5.08 kΩ 5.100 (2) 135 Ω 83 Ω 1.800 4.78 kΩ 5.250 (2) 1.850 4.52 kΩ 5.400 (2) 35 Ω 1.900 4.27 kΩ 5.500 (2) 5Ω The maximum input voltage is (VO× 11) or 14 V, whichever is less. The maximum allowable input voltage is a function of switching frequency and may increase or decrease when the Smart Sync feature is utilized. Please review the Smart Sync application section for further guidance. For VO > 3.6 V, the minimum input voltage is (VO + 2) V. ADJUSTING THE UNDERVOLTAGE LOCKOUT (UVLO) OF THE PTH08T240W POWER MODULES The PTH08T240W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This enables the module to provide a clean, monotonic powerup for the load circuit, and also limits the magnitude of current drawn from the regulator’s input source during the power-up sequence. The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit control is overridden, and the module does not produce an output. The hysterisis voltage, which is the difference between the ON and OFF threshold voltages, is set at 500 mV. The hysterisis prevents start-up oscillations, which can occur if the input voltage droops slightly when the module begins drawing current from the input source. UVLO Adjustment The UVLO feature of the PTH08T240W module allows for limited adjustment of the ON threshold voltage. The adjustment is made via the Inhbit/UVLO Prog control pin (pin 11). When pin 11 is left open circuit, the ON threshold voltage is internally set to its default value, which is 4.3 volts. When the ON threshold is adjusted higher than 5 volts, the default hysterisis setting is 500 mV. This ensures that the module produces a regulated output when the minimum input voltage is applied (see specifications). The ON threshold might need to be raised if the module is powered from a tightly regulated 12-V bus. This prevents it from operating if the input bus fails to completely rise to its specified regulation voltage. 18 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 VI 2 VI PTH08T240W 11 Inhibit/ UVLO Prog GND 3 4 RUVLO CI GND Figure 17. Undervoltage Lockout Adjustment Resistor Placement Equation 5 determines the value of RTHD required to adjust VTHD to a new value. The default value is 4.3 V, and it may only be adjusted to a higher value. R UVLO + 9690 * ǒ137 ǒ137 VIǓ VIǓ * 585 (kW) (5) Calculated Values Table 7 shows a chart of standard resistor values for RUVLO for different options of the on-threshold (VTHD) voltage. For most applications, only the on-threshold voltage should need to be adjusted. In this case select only a value for RUVLO from right-hand column. Table 7. Calculated Values of RUVLO for Various Values of VTHD VTHD RUVLO 7.0 V 23.2 kΩ 7.5 V 19.6 kΩ 8.0 V 16.9 kΩ 8.5 V 14.7 kΩ 9.0 V 13.0 kΩ 9.5 V 11.8 kΩ 10.0 V 10.5 kΩ 10.5 V 9.76 kΩ 11.0 V 8.87 kΩ FEATURES OF THE PTH/PTV FAMILY OF NONISOLATED WIDE OUTPUT ADJUST POWER MODULES Soft-Start Power Up The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, VI (see Figure 18). Submit Documentation Feedback 19 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 14 Track VI 2 VI PTH08T240W GND 3,4 CI GND Figure 18. Track Pin Connection When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 2 ms–10 ms) before allowing the output voltage to rise. VI (5 V/div) VO (2 V/div) II (2 A/div) t − Time − 4 ms/div Figure 19. Power-Up Waveform The output then progressively rises to the module’s setpoint voltage. Figure 19 shows the soft-start power-up characteristic of the PTH08T240W operating from a 12-V input bus and configured for a 3.3-V output. The waveforms were measured with a 10-A constant current load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power-up is complete within 15 ms. 20 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Overcurrent Protection For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, the module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Overtemperature Protection (OTP) A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases by about 10°C below the trip point. The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for the worst-case conditions of ambient temperature and airflow. On/Off Inhibit For applications requiring output voltage on/off control, the PTH08T240W incorporates an Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 20 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input has its own internal pull-up. An external pull-up resistor should never be used with the inhibit pin. The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for control. VI 2, 6 VI PTH08T240W 11 Inhibit/ UVLO CI 1 = Inhibit GND 3,4 Q1 BSS 138 GND Figure 20. On/Off Inhibit Control Circuit Submit Documentation Feedback 21 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 15 ms. Figure 21 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The turn off of Q1 corresponds to the rise in the waveform, Q1 VDS. The waveforms were measured with a 16-A constant current load. VO (2 V/div) II (2 A/div) VINH (2 V/div) t − Time − 4 ms/div Figure 21. Power-Up Response from Inhibit Control Remote Sense Products with this feature incorporate one or two remote sense pins. Remote sensing improves the load regulation performance of the module by allowing it to compensate for any IR voltage drop between its output and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace resistance. To use this feature simply connect the Sense pins to the corresponding output voltage node, close to the load circuit. If a sense pin is left open-circuit, an internal low-value resistor (15-Ω or less) connected between the pin and the output node, ensures the output remains in regulation. With the sense pin connected, the difference between the voltage measured directly between the VO and GND pins, and that measured at the Sense pins, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 V. The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. 22 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Smart Sync Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. Driving the Smart Sync pins with an external oscillator set to the desired frequency, synchronizes all connected modules to the selected frequency. The synchronization frequency can be higher or lower than the nominal switching frequency of the modules within the range of 240 kHz to 400 kHz (see Electrical Specifications table for frequency limits). Synchronizing modules powered from the same bus, eliminates beat frequencies reflected back to the input supply, and also reduces EMI filtering requirements. These are the benefits of Smart Sync. Power modules can also be synchronized out of phase to minimize source current loading and minimize input capacitance requirements. Figure 22 shows a standard circuit with two modules syncronized 180° out of phase using a D flip-flop. 0 o Track SYNC VI = 5 V TT +Sense VI VO1 VO PTH08T220W SN74LVC2G74 –Sense INH / UVLO GND VOAdj Vcc CLR PRE CLK Q Ci1 330 mF RSET1 Co1 220 mF fclock = 2 X fmodules Q D GND GND 180 o Track SYNC TT +Sense VI VO2 VO PTH08T240W –Sense INH / UVLO GND VOAdj Ci2 220 mF RSET2 Co2 220 mF GND Figure 22. Smart Sync Schematic Submit Documentation Feedback 23 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 The maximum input voltage allowed for proper synchronization is duty cycle limited. When using Smart Sync, the maximum allowable input voltage varies as a function of output voltage and switching frequency. Operationally, the maximum input voltage is inversely proportional to switching frequency. Synchronizing to a higher frequency causes greater restrictions on the input voltage range. For a given switching frequency, Figure 23 shows how the maximum input voltage varies with output voltage. For example, for a module operating at 400 kHz and an output voltage of 1.2 V, the maximum input voltage is 10 V. Exceeding the maximum input voltage may cause in an increase in output ripple voltage and increased output voltage variation. As shown in Figure 23, input voltages below 6 V can operate down to the minimum output voltage over the entire synchronization frequency range. See the Electrical Characteristics table for the synchronization frequency range limits. INPUT VOLTAGE vs OUTPUT VOLTAGE 15 14 VI − Input Voltage − V 13 12 11 fSW = 400 kHz 10 9 fSW = 350 kHz fSW = 300 kHz 8 7 fSW = 240 kHz 6 5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 VO − Output Voltage − V Figure 23. Auto-Track™ Function The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP family, microprocessors, and ASICs. How Auto-Track™ Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. 24 Submit Documentation Feedback PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 Typical Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See U3 in Figure 24. To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least 20 ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure 24 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of PTH08T240W modules. The output of the TL7712A supervisor becomes active above an input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 28 ms after the input voltage has risen above U3's voltage threshold, which is 4.3 V. The 28-ms time period is controlled by the capacitor CT. The value of 2.2 µF provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure 25 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1 and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively. VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure 26. Power down is normally complete before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the Auto-Track slew rate capability. Notes on Use of Auto-Track™ 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled, the output voltage rises according to its softstart rate after input power has been applied. 6. The Auto-Track pin should never be used to regulate the module's output voltage for long-term, steady-state operation. Submit Documentation Feedback 25 PTH08T240W www.ti.com SLTS264A – NOVEMBER 2005 – REVISED MARCH 2006 RTT U1 AutoTrack TurboTrans Smart +Sense Sync VI = 12 V VI VO PTH08T240W VO1 = 3.3 V Inhibit/ UVLO Prog −Sense VOAdj GND + CO1 CI1 U3 7 2 1 3 RSET1 1.62 kW 8 V CC SENSE RESET 5 RESIN TL7712A REF RESET 6 AutoTrack TurboTrans Smart +Sense Sync GND 4 CREF 0.1 mF CT 2.2 mF RTT U2 CT RRST 10 kW VI VO PTH08T220W VO2 = 1.8 V Inhibit/ UVLO Prog −Sense VOAdj GND + CO2 CI2 RSET2 4.75 kW Figure 24. Sequenced Power Up and Power Down Using Auto-Track VTRK (1 V/div) VTRK (1 V/div) VO1 (1 V/div) VO1 (1 V/div) VO2 (1 V/div) VO2 (1 V/div) t − Time − 20 ms/div t − Time − 400 ms/div Figure 25. Simultaneous Power Up With Auto-Track Control 26 Submit Documentation Feedback Figure 26. Simultaneous Power Down With Auto-Track Control PACKAGE OPTION ADDENDUM www.ti.com 7-Feb-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty PTH08T240WAD ACTIVE DIP MOD ULE EBS 11 49 Pb-Free (RoHS) Call TI N / A for Pkg Type PTH08T240WAH ACTIVE DIP MOD ULE EBS 11 49 TBD Call TI N / A for Pkg Type PTH08T240WAS ACTIVE DIP MOD ULE EBT 11 49 TBD Call TI N / A for Pkg Type PTH08T240WAST ACTIVE DIP MOD ULE EBT 11 250 TBD Call TI N / A for Pkg Type PTH08T240WAZ ACTIVE DIP MOD ULE EBT 11 49 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH08T240WAZT ACTIVE DIP MOD ULE EBT 11 250 Pb-Free (RoHS) Call TI Level-3-260C-168 HR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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