TXS4558 www.ti.com SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 Dual-SIM Card Power Supply with Level Translator and Dedicated Dual LDO Check for Samples: TXS4558 FEATURES 1 SIM2_CLK SIM2_RST SIM2_I/O EN2 VSEL2 20 19 18 17 16 CLKRUN2 VCC 2 14 CLKRUN1 VBATT 3 13 CSEL VSIM1 4 12 VSEL1 SIM1_CLK 5 11 En1 CLK 10 9 RST GND 8 • 15 I/O • 1 7 • VSIM2 SIM1_I/O • RUK PACKAGE (TOP VIEW) 6 • Level Translator – VCC Range of 1.65 V to 3.3 V – VBATT Range of 2.3V to 5.5V Low-Dropout (LDO) Regulator – 50-mA LDO Regulator With Enable – 1.8-V or 2.95-V Selectable Output Voltage – Very Low Dropout: 100 mV (Max) at 50 mA Control and Communication Through GPIO Interface with Baseband Processor Isolated Clock Stop Mode for both SIM1 and SIM2 cards ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-B) – 500-V Charged-Device Model (C101) – 8kV HBM for SIM pins Package – 20-Pin QFN (3 mm x 3 mm) SIM1_RST • NOTE: Exposed center thermal pad must be electrically connected to Ground. DESCRIPTION The TXS4558 is a complete dual-supply standby Smart Identity Module (SIM) card solution for interfacing wireless baseband processors with two individual SIM subscriber cards to store data for mobile handset applications. It is a custom device which is used to extend a single SIM/UICC interface to be able to support two SIM’s/UICC’s. The device complies with ISO/IEC Smart-Card Interface requirements as well as GSM and 3G mobile standards. It includes a high-speed level translator capable of supporting Class-B (2.95 V) and Class-C (1.8 V) interfaces, two low-dropout (LDO) voltage regulators that have output voltages that are selectable between 2.95-V Class-B and 1.8-V Class-C interfaces. Simple GPIO inputs are used to switch between the two SIM cards and to put it into different modes. The voltage-level translator has two supply voltage pins. VCC sets the reference for the baseband interface and can be operated from 1.65 V to 3.3 V. VSIM1 and VSIM2 are programmed to either 1.8 V or 2.95 V, each supplied by an independent internal LDO regulator. The integrated LDO accepts input battery voltages from 2.3 V to 5.5 V and outputs up to 50 mA to the B-side circuitry and external Class-B or Class-C SIM card. The TXS4558 also incorporates shutdown sequence for the SIM card pins based on the ISO 7816-3 specification for SIM cards. The device also has 8kV HBM protection for the SIM card pins and standard 2kV HBM protection for all the other pins. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TXS4558 SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 85°C (1) QFN – RUK ORDERABLE PART NUMBER TOP-SIDE MARKING TXS4558RUKR ZTG Tape and reel For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) INTERFACING THE SIM CARD VCC VBATT 3V/1.8V SIM Card 3V or 1.8V, 50mA Control I/P’s LDO Control Logic Baseband Vcc GND RST Vpp CLK I/O NC NC RST Translator I/O MUX CLK 3V/1.8V SIM Card 3V or 1.8V, 50mA LDO Vcc GND RST Vpp CLK I/O NC NC Translator PIN FUNCTIONS (1) NO. (1) (2) 2 NAME TYPE (2) POWER DOMAIN DESCRIPTION 1 VSIM2 O VBATT 1.8 V/2.95 V supply voltage to SIM2 2 VCC P — 1.8-V power supply for device operation and I/O buffers toward baseband 3 VBATT P — Battery power supply 4 VSIM1 O VBATT 1.8 V/2.95 V supply voltage to SIM1 5 SIM1CLK O VSIM1 SIM1 clock 6 SIM1RST O VSIM1 SIM1 reset 7 SIM1I/O I/O VSIM1 SIM1 data 8 I/O I/O VCC UICC/SIM data 9 RST I VCC UICC/SIM reset from baseband 10 CLK I VCC UICC/SIM clock 11 EN1 I VCC Enable pin for SIM1 interface 12 VSEL1 I VCC Select pin for 1.8V or 2.95V LDO1 output 13 CSEL I VCC Channel select between SIM1 or SIM2 Thermal Pad must be electrically connected to Ground Plane. G = Ground, I = Input, O = Output, P = Power Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 TXS4558 www.ti.com SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 PIN FUNCTIONS(1) (continued) NO. TYPE (2) NAME POWER DOMAIN DESCRIPTION 14 CLKRUN1 I VCC Select pin for SIM1 Clock stop mode 15 CLKRUN2 I VCC Select pin for SIM2 Clock stop mode 16 VSEL2 I VCC Select pin for 1.8V or 2.95V LDO2 output 17 EN2 I VCC Enable pin for SIM2 interface 18 SIM2I/O I/O VSIM2 SIM2 data 19 SIM2RST O VSIM2 SIM2 reset 20 SIM2CLK O VSIM2 SIM2 clock TRUTH TABLE CSEL VSEL1 VSEL2 SELECTED CARD VSIM1 VSIM2 0 0 0 1 1.8 V 1.8 V 0 0 1 1 1.8 V 2.95 V 0 1 0 1 2.95 V 1.8 V 0 1 1 1 2.95 V 2.95 V 1 0 0 2 1.8 V 1.8 V 1 0 1 2 1.8 V 2.95 V 1 1 0 2 2.95 V 1.8 V 1 1 1 2 2.95 V 2.95 V ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT LEVEL TRANSLATOR VCC VI VO VO Supply voltage range Input voltage range Voltage range applied to any output in the high-impedance or power-off state Voltage range applied to any output in the high or low state –0.3 4.0 VCC-port –0.5 4.6 VSIMx-port –0.5 4.6 Control inputs –0.5 4.6 VCC-port –0.5 4.6 VSIMx-port –0.5 4.6 Control inputs –0.5 4.6 VCC-port –0.5 4.6 VSIMx-port –0.5 4.6 Control inputs –0.5 4.6 V V V V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current Continuous current through VCCA or GND Tstg ±50 mA ±100 mA Storage temperature range –65 150 °C Input voltage range –0.3 6 V LDO VBAT VOUT Output voltage range –0.3 6 V TJ Junction temperature range –55 150 °C Tstg Storage temperature range –55 150 °C 2 kV 500 V ESD rating (host side) Human-Body Model (HBM) Charged-Device Model (CDM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 3 TXS4558 SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS (1) MIN MAX UNIT LEVEL TRANSLATOR VCC Supply voltage VIH VIL High-level input voltage Applies to pins: EN1, EN2,RST, CLK, I/O, CLKRUN1, Low-level input voltage CLKRUN2, VSEL1, VSEL2, CSEL Δt/Δv Input transition rise or fall rate TA Operating free-air temperature (1) 1.7 3.3 V VCC × 0.7 3.3 V 0 VCC × 0.3 –40 V 5 ns/V 85 °C All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. ELECTRICAL CHARACTERISTICS — LEVEL TRANSLATOR over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VSIM1 VSIM2 SIM1_RST IOH = –100 µA, Push-Pull SIM1_I/O VSIM1 × 0.8 1.7 V to 3.3 V IOH = –100 µA, Push-Pull SIM2_CLK 1.8 V / 2.95 V, (Supplied by LDO) 1.8 V / 2.95 V, (Supplied by LDO) VSIM2 × 0.8 V VSIM2 × 0.8 SIM2_I/O IOH = –10 µA, Open-Drain VSIM2 × 0.8 I/O IOH = –10 µA, Open-Drain VCC × 0.8 SIM1_RST VSIM1 × 0.2 IOL = 1 mA, Push-Pull SIM1_CLK SIM1_I/O IOL = 1 mA, Push-Pull SIM2_I/O IOL = 1 mA, Open-Drain I/O IOL = 1 mA, Open-Drain Control inputs Cio 1.8 V / 2.95 V (Supplied by LDO) 1.8 V / 2.95 V (Supplied by LDO) VSIM2 × 0.2 V VSIM2 × 0.2 0.3 0.3 VI = EN1,EN2, CLKRUN1, CSEL, CLKRUN2, VSEL1, VSEL2, VI = VCCI, IO = 0 I/O 1.7 V to 3.3 V 1.8 V / 2.95 V (Supplied by LDO) 1.8 V / 2.95 V (Supplied by LDO) ±1 µA 1.7 V to 3.3 V 1.8 V / 2.95 V (Supplied by LDO) 1.8 V / 2.95 V (Supplied by LDO) ±5 µA SIM_I/O port 8 VSIMx port 8 pF Ci (1) 0.3 1.7 V to 3.3 V SIM2_CLK ICC VSIM1 × 0.2 IOL = 1 mA, Open-Drain SIM2_RST II UNIT VSIM1 × 0.8 IOH = –10 µA, Open-Drain SIM2_RST VOL MAX VSIM1 × 0.8 SIM1_CLK VOH TYP (1) MIN Control inputs VI = VCC or GND 4 pF All typical values are at TA = 25°C. LDO ELECTRICAL CHARACTERISTICS PARAMETER VBAT MIN TYP (1) TEST CONDITIONS Input voltage VSIM1,2 Output voltage VDO Dropout voltage 2.3 2.85 2.95 3.05 Class-C Mode , 0 mA < ISIM1,2 < 50 mA 1.7 1.8 1.9 IOUT = 50 mA 100 VSIM1 = 2.95 V, VSIM2 = 0, ISIM1 = 0 µA 40 50 VSIM1 = 1.8 V, VSIM2 = 0, ISIM1 = 0 µA 40 50 Operating current ISHDN Shutdown current (IGND) VENx ≤ 0.4 V, (VSIMx + VDO) ≤ VBAT ≤ 5.5 V, TJ = 85°C IOUT(SC) Short-circuit current RL = 0 Ω COUT Output Capacitor 1 f = 1 kHz 50 f = 10 kHz 40 PSRR Power-supply rejection ratio VBAT = 3.15 V, VSIM1,2 = 1.8 V or 2.95 V, COUT = 1 µF, IOUT = 10 mA TSTR VSIM1,2 Start-up time VSIM1,2 = 1.8 V or 3 V, IOUT = 50 mA, COUT = 1 µF TJ Operating junction temperature 4 5.5 Class-B Mode , 0 mA < ISIM1,2 < 50 mA IVBAT (1) MAX –40 UNIT V V mV µA µA 145 mA 1 µF dB 400 µS 125 °C All typical values are at TA = 25°C. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 TXS4558 www.ti.com SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 GENERAL ELECTRICAL CHARACTERISTICS PARAMETER TEST CONDITIONS RI/OPU I/O pull-up RSIMPU SIM_I/O pull-up SIM enabled and selected with CSEL SIM_I/O pull-down Active pull-downs are connected to the VSIM regulator output to the SIM_CLK, SIM_RST, SIM_I/O when EN = 0 RSIMPD MIN TYP MAX 16 20 24 UNIT kΩ 7.4 8.0 8.7 kΩ 2 kΩ SWITCHING CHARACTERISTICS – VSIMx = 1.8 V or 2.95 V Supplied by Internal LDO over recommended operating free-air temperature range (unless otherwise noted) PARAMETER trA trB TEST CONDITIONS VCC = 1.8 V ± 0.15 V MIN MAX UNIT I/O 1 µs SIMx_RST 1 µs 50 ns SIMx_CLK CL = 50 pF SIMx_I/O fmax SIMx_CLK Duty Cycle SIMx_CLK 40% 100 ns 25 MHz 60% OPERATING CHARACTERISTICS TA = 25°C, VSIMx = 1.8 V PARAMETER Cpd (1) (1) TEST CONDITIONS Class C (CLK, RST) VCC-port input, VSIMx-port output Class B (CLK, RST) VCC-port input, VSIMx-port output CLASS C (IO) VCC-port input, VSIMx-port output CLASS B (IO) VCC-port input, VSIMx-port output TYP UNIT 12.7 pF CL = 0 f = 5 MHz tr = tf = 1 ns 15.4 10.8 pF 20.3 Power dissipation capacitance per transceiver Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 5 TXS4558 SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 www.ti.com PIN FUNCTION PIN NAME PIN NUMBER PIN FUNCTION VCC 2 Power supply and voltage reference for device operation and I/O buffers toward baseband. VBATT 3 This is the battery power supply for the TXS4558. VSIM1, VSIM2 1,4 1.8 V/2.95 V supply voltage for the respective SIM1 and SIM2. These outputs are activated through the EN1 and EN2 pins and set to be 1.8V or 2.95V through VSEL1 and VSEL2. SIMCLK, SIM2CLK 5, 20 These are voltage level shifted CLK signals for connection to SIM1 and SIM2. Functionality while the corresponding SIM is not selected via CSEL is controlled by CLKRUN1 and CLKRUN2 control pins. SIM1RST, SIM2RST 6, 19 These are voltage level shifted RST signals for connection to SIM1 and SIM2. Their output level when de-selected is latched at the last state. SIM1IO, SIM2IO 7, 18 These are voltage level shifted IO signals for connection to SIM1 and SIM2. These are bi-directional data signals. IO 8 Microcontroller side data IO pin. The IO pin provides the bidirectional communication path to the SIM cards. The SIMxIO communicating with IO is selected by CSEL. RST 9 Microcontroller side reset RST pin input. RST provides signals directly to the selected SIM SIMxRST. When a SIM interface is deselected with CSEL, the last RST value is held at the SIMxRST. CLK 10 The CLK pin supplies the clock signal to the cards. It is level shifted and transmitted directly to the SIMxCLK pin of the selected card. If CLKRUNx is HIGH, the clock signal will be transmitted to the SIMxCLK pin, regardless of whether that card is selected. EN1, EN2 11, 17 EN1 and EN2 enable and disable the power supply to SIM1 and SIM2, and the corresponding interface. VSEL1, VSEL2 12, 16 These pins set the VSIM1 and VSIM2 voltages and the corresponding interface IO voltages. When VSELx is low, VSIMx is 1.8V. When VSELx is high, VSIMx is 2.95V. 13 CSEL selects which SIM is activated and communicates with the baseband. When CSEL is low, SIM1 is active. When CSEL is high, SIM2 is active. 14, 15 The CLKRUN1 and CLKRUN2 control the functionality of the SIM1CLK and SIM2CLK pins when their corresponding SIM cards are deselected using CSEL. When CLKRUNx is high, the CLK signal is transmitted to the corresponding SIMxCLK, even when the card is deselected with CSEL. When CLKRUNx is low, the SIMxCLK signal is brought low when the corresponding SIM is deselected with CSEL. CSEL CLKRUN1, CLKRUN2 Exposed Center Pad 6 21 This center pad must be connected to ground. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 TXS4558 www.ti.com SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 OPERATION Clock Run Mode SIMS have varying requirements for the SIM CLK. Using CLKRUN, the user can decide if the SIMxCLK pin continuously transmits the CLK signal, or is brought low when the SIM is deselected with CSEL. If CLKRUNx is LOW, the SIMxCLK is brought LOW two clock cycles after the SIMx is deselected with CSEL. If SIMxCLK is high, the CLK transmits to the SIMxCLK, even if the SIMx is deselected with CSEL. CSEL When a channel is deselected using the CSEL pin, the SIMxRST state is latched, the SIMxIO becomes high impedance and SIMxCLK function is dependent on CLKRUNx. Operation Activation/Deactivation When the EN1, EN2 pin is brought high, the device performs the activation sequence for the corresponding SIM interface. Each SIM interface is activated independently based on its EN IO. Activation Sequence 1. The device holds SIMxIO, SIMxCLK and SIMxRST low. 2. VSIMx is activated and powered. 3. The device waits for the VSIMx output to reach the correct voltage. Once this voltage is reached, SIMxIO, and SIMxRST are enabled. 4. The SIMxCLK is activated on the 2nd rising edge after the SIMxIO is enabled. When the ENx pin is brought low, the device performs the deactivation sequence for the corresponding SIM interface. Deactivation Sequence, Deactivation Sequence 1. SIMxRST is deactivated and set low. 2. Two clock cycles after EN is brought LOW, the SIMxCLK is disabled and brought LOW. If the CLK is not active, SIMxCLK is disabled and brought low approximately 9us after ENx is brought low. 3. Approximately 9us after the ENx is brought LOW, SIMxIO is disabled and set LOW. 4. After SIMxIO is brought LOW, the VSIMx is deactivated and unpowered. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 7 TXS4558 SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 www.ti.com APPLICATION INFORMATION The LDO’s included on the TXS4558 achieve ultra-wide bandwidth and high loop gain, resulting in extremely high PSRR at very low headroom (VBAT – VSIM1/2). The TXS4558 provides fixed regulation at 1.8V or 2.95V. Low noise, GPIO enable and low ground pin current make it ideal for portable applications. The device offers current limit and thermal protection, and is fully specified from –40°C to 125°C. VSIM1 VDDIO TXS4558 VBAT 1 μF GND VSIM2 1μF 0.1μF 1 μF Figure 1. Typical Application Circuit for TXS4558 Input and Output Capacitor Requirements It is good analog design practice to connect a 1.0 µF low equivalent series resistance (ESR) capacitor across the input supply (VBAT) near the regulator. Also, a 0.1µF is required for the logic core supply (VCC). This capacitor will counteract reactive input sources and improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or if the device is located several inches from the power source. The LDO’s are designed to be stable with standard ceramic capacitors of values 1.0 µF or larger. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR should be <1.0 Ω. Output Noise In most LDO’s, the bandgap is the dominant noise source. To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. Internal Curent Limit The TXS4558 internal current limit helps protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in a current limit state for extended periods of time. The PMOS pass element in the TXS4558 has a built-in body diode that conducts current when the voltage at VSIM1/2 exceeds the voltage at VBAT. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate. Dropout Voltage The TXS4558 uses a PMOS pass transistor to achieve low dropout. When (VBAT – VSIM1/2) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO will approximately scale with output current because the PMOS device behaves like a resistor in dropout. Startup The TXS4558 uses a quick-start circuit which allows the combination of very low output noise and fast start-up times. 8 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 TXS4558 www.ti.com SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 Transient Response As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but increases duration of the transient response. Minimum Load The TXS4558 is stable and well-behaved with no output load. Traditional PMOS LDO regulators suffer from lower loop gain at very light output loads. The TXS4558 employs an innovative low-current mode circuit to increase loop gain under very light or no-load conditions, resulting in improved output voltage regulation performance down to zero output current. THERMAL INFORMATION Thermal Protection Thermal protection disables the output when the junction temperature rises to approximately +160°C, allowing the device to cool. When the junction temperature cools to approximately +140°C the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage because of overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heat sink. For reliable operation, junction temperature should be limited to +125°C maximum. To estimate the margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least +35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the TXS4558 has been designed to protect against overload conditions. It was not intended to replace proper heat sinking. Continuously running the TXS4558 into thermal shutdown will degrade device reliability. TYPICAL CHARACTERISTICS 110 -80 100 1.8 V Vsim 90 -70 VDO - Dropout Voltage - mV PSRR - Power Supply Rejection Ratio - dB -90 -60 -50 2.95 V Vsim -40 -30 -20 85°C Vsim 70 60 50 40 -40°C Vsim 30 20 -10 0 100 80 25°C Vsim 10 1000 10000 100000 f - Frequency - Hz Figure 2. PSRR 1000000 0 0 5 10 15 20 25 30 35 40 IOUT - Output Current - mA 45 50 Figure 3. Dropout Voltage vs Output Current Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 9 TXS4558 SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 www.ti.com 0 IO = 50 mA -0.2 -0.4 -100 mA, Vsim DVOUT - Output Voltage - % DVOUT - Output Voltage - % TYPICAL CHARACTERISTICS (continued) 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 -1.4 -1.6 -1.8 -2 -2.2 -2.4 -40 -30 -20 -10 -50 mA, Vsim -0.6 -40°C Vsim 85°C Vsim -0.8 -1 -1.2 -1.4 25°C Vsim -1.6 -1.8 0 -2 0 10 20 30 40 50 60 70 80 5 10 TA - Temperature - °C Figure 4. Output Voltage vs Temperature, Class-B/C 50 0 0 -0.2 -40°C Vsim IO = 50 mA -0.4 -0.2 DVOUT - Output Voltage - % DVOUT - Output Voltage - % 45 Figure 5. Load Regulation, Iout = 50 mA, Class-C 0.2 -0.4 -0.6 25°C Vsim -0.8 85°C Vsim -1 -1.2 -1.4 -1.6 -0.6 -0.8 -40°C Vsim -1 -1.2 25°C Vsim -1.4 -1.6 85°C Vsim -1.8 -2 IO = 50 mA -1.8 -2 0 5 10 15 20 25 30 35 40 IOUT - Output Current - mA 45 Figure 6. Load Regulation, Iout = 50 mA, Class-B 10 15 20 25 30 35 40 IOUT - Output Current - mA -2.2 50 -2.4 2.7 3.1 3.5 3.9 4.3 VBAT - V 4.7 5.1 5.5 Figure 7. Line Regulation, Iout = 50 mA, Class-C Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 TXS4558 www.ti.com SLLSE93A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 TYPICAL CHARACTERISTICS (continued) 330 0 300 DVOUT - Output Voltage - % -0.4 -40°C Vsim 270 IOUT(SC) - Output Current - mA -0.2 IO = 50 mA -0.6 -0.8 25°C Vsim -1 85°C Vsim -1.2 -1.4 -1.6 -1.8 240 210 25°C Vsim 150 120 90 60 -2.2 30 Figure 8. Line Regulation, Iout = 50 mA, Class-B 85°C Vsim 180 -2 -2.4 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VBAT - V -40°C Vsim 0 2.7 3.1 3.5 3.9 4.3 VBAT - V 4.7 5.1 5.5 Figure 9. Current Limit vs Input Voltage, Class-B/C 150 -50 mA, Vsim IGND - Ground Current - mA 120 90 60 30 -100 mA, Vsim 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 TA - ºC Figure 10. Ground Current vs Temperature, Class-C Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TXS4558 11 PACKAGE OPTION ADDENDUM www.ti.com 23-Aug-2012 PACKAGING INFORMATION Orderable Device TXS4558RUKR Status (1) ACTIVE Package Type Package Drawing WQFN RUK Pins Package Qty 20 3000 Eco Plan (2) Green (RoHS & no Sb/Br) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TXS4558RUKR Package Package Pins Type Drawing WQFN RUK 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3000 330.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.1 8.0 W Pin1 (mm) Quadrant 12.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 22-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TXS4558RUKR WQFN RUK 20 3000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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