IRF IRFB4212PBF

PD - 96918A
IRFB4212PbF
DIGITAL AUDIO MOSFET
Features
• Key parameters optimized for Class-D audio
amplifier applications
• Low RDSON for improved efficiency
• Low QG and QSW for better THD and improved
efficiency
• Low QRR for better THD and lower EMI
• 175°C operating junction temperature for
Key Parameters
VDS
100
RDS(ON) typ. @ 10V
72.5
V
m:
Qg typ.
15
nC
Qsw typ.
8.3
nC
RG(int) typ.
2.2
Ω
TJ max
175
°C
ruggedness
D
• Can deliver up to 150W per channel into 4Ω load in
half-bridge topology
G
S
TO-220AB
Description
This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes
the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode
reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance
factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175°C operating junction
temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient,
robust and reliable device for ClassD audio amplifier applications.
Absolute Maximum Ratings
Parameter
Max.
Units
V
VDS
Drain-to-Source Voltage
100
VGS
Gate-to-Source Voltage
±20
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V
18
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V
13
IDM
Pulsed Drain Current c
57
PD @TC = 25°C
Power Dissipation f
60
PD @TC = 100°C
Power Dissipation f
30
TJ
Linear Derating Factor
Operating Junction and
TSTG
Storage Temperature Range
W
0.4
-55 to + 175
Soldering Temperature, for 10 seconds
W/°C
°C
300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
A
10lbxin (1.1Nxm)
Thermal Resistance
Parameter
Typ.
Max.
RθJC
Junction-to-Case f
–––
2.5
RθCS
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient f
0.50
–––
–––
62
RθJA
Units
°C/W
Notes  through … are on page 2
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1
9/16/05
IRFB4212PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Typ. Max. Units
Conditions
BV DSS
Drain-to-Source Breakdown Voltage
100
–––
–––
∆ΒV DSS/∆T J
Breakdown Voltage Temp. Coefficient
–––
0.09
–––
V/°C Reference to 25°C, ID = 1mA
R DS(on)
Static Drain-to-Source On-Resistance
–––
58
72.5
mΩ
V GS(th)
Gate Threshold Voltage
3.0
–––
5.0
V
∆V GS(th)/∆T J
Gate Threshold Voltage Coefficient
–––
-13
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
20
µA
–––
–––
250
IGSS
Gate-to-Source Forward Leakage
–––
–––
200
Gate-to-Source Reverse Leakage
–––
–––
-200
g fs
Forward Transconductance
11
–––
–––
Qg
V
V GS = 0V, ID = 250µA
V GS = 10V, ID = 13A
V DS = 100V, V GS = 0V
V DS = 100V, V GS = 0V, T J = 125°C
nA
V GS = 20V
V GS = -20V
S
V DS = 50V, ID = 13A
Total Gate Charge
–––
15
23
Q gs1
Pre-Vth Gate-to-Source Charge
–––
3.3
–––
Q gs2
Post-Vth Gate-to-Source Charge
–––
1.4
–––
Q gd
Gate-to-Drain Charge
–––
6.9
–––
ID = 13A
Q godr
Gate Charge Overdrive
–––
3.4
–––
See Fig. 6 and 19
Q sw
Switch Charge (Q gs2 + Q gd)
–––
8.3
–––
R G(int)
Internal Gate Resistance
–––
2.2
–––
e
V DS = V GS, ID = 250µA
V DS = 80V
nC
V GS = 10V
Ω
e
td(on)
Turn-On Delay Time
–––
7.7
–––
V DD = 50V, V GS = 10V
tr
Rise Time
–––
28
–––
ID = 13A
td(off)
Turn-Off Delay Time
–––
14
–––
tf
Fall Time
–––
3.9
–––
C iss
Input Capacitance
–––
550
–––
C oss
Output Capacitance
–––
66
–––
C rss
Reverse Transfer Capacitance
–––
35
–––
C oss
Effective Output Capacitance
–––
350
–––
V GS = 0V, V DS = 0V to 80V
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
LS
Internal Source Inductance
–––
7.5
–––
ns
R G = 2.5Ω
V GS = 0V
pF
V DS = 50V
ƒ = 1.0MHz,
nH
See Fig.5
D
6mm (0.25in.)
from package
G
S
and center of die contact
Avalanche Characteristics
Parameter
E AS
Single Pulse Avalanche Energy
IAR
Avalanche Current
E AR
Repetitive Avalanche Energy
g
d
Typ.
Max.
Units
–––
25
mJ
See Fig. 14, 15, 17a, 17b
g
A
mJ
Diode Characteristics
Parameter
IS @ T C = 25°C Continuous Source Current
Min.
Typ. Max. Units
Conditions
MOSFET symbol
–––
–––
18
–––
–––
57
showing the
integral reverse
ISM
(Body Diode)
Pulsed Source Current
V SD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
V
p-n junction diode.
T J = 25°C, IS = 13A, V GS = 0V
trr
Reverse Recovery Time
–––
41
62
ns
T J = 25°C, IF = 13A
Q rr
Reverse Recovery Charge
–––
69
100
nC
di/dt = 100A/µs
c
A
Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
‚ Starting TJ = 25°C, L = 0.32mH, RG = 25Ω, IAS = 13A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
e
e
„ Rθ is measured at TJ of approximately 90°C.
… Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive
avalanche information
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IRFB4212PbF
100
100
BOTTOM
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
10
6.0V
≤ 60µs PULSE WIDTH
Tj = 25°C
BOTTOM
6.0V
10
≤ 60µs PULSE WIDTH
Tj = 175°C
1
1
0.1
1
10
100
0.1
VDS , Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
100.0
3.0
10.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current(Α)
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
TJ = 175°C
TJ = 25°C
1.0
VDS = 50V
≤ 60µs PULSE WIDTH
0.1
2
4
6
8
ID = 13A
VGS = 10V
2.5
2.0
1.5
1.0
0.5
10
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
10000
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
20
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1000
Ciss
Coss
100
Crss
ID= 13A
VDS = 80V
16
VDS= 50V
VDS= 20V
12
8
4
0
10
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
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0
5
10
15
20
25
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
3
IRFB4212PbF
1000
10.0
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
100.0
TJ = 175°C
1.0
TJ = 25°C
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
100µsec
10
1msec
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
DC
0.1
0.1
0.0
0.5
1.0
1
1.5
10
100
1000
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
20
VGS(th) Gate threshold Voltage (V)
5.0
ID , Drain Current (A)
16
12
8
4
4.0
ID = 250µA
3.0
0
2.0
25
50
75
100
125
150
175
-75
-50
-25
TJ , Junction Temperature (°C)
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.1
0.01
0.20
0.10
0.05
τJ
0.02
0.01
R1
R1
τJ
τ1
τ1
R2
R2
τ2
R3
R3
τC
τ
τ2
τ3
τ3
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
Ri (°C/W)
R4
R4
τ4
τ4
τi (sec)
0.0489
0.00000
0.3856
0.000062
1.3513
0.001117
0.7140
0.013125
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
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120
0.5
EAS, Single Pulse Avalanche Energy (mJ)
RDS (on), Drain-to -Source On Resistance (Ω)
IRFB4212PbF
ID = 13A
0.4
0.3
0.2
TJ = 125°C
0.1
TJ = 25°C
0.0
6
8
10
12
14
ID
3.2A
5.7A
BOTTOM 13A
TOP
100
80
60
40
20
0
16
25
VGS, Gate-to-Source Voltage (V)
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13. Maximum Avalanche Energy Vs. Drain Current
10
Duty Cycle = Single Pulse
Avalanche Current (A)
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
30
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 13A
25
20
15
10
5
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
5
IRFB4212PbF
D.U.T
Driver Gate Drive
ƒ
-
‚
„
-
-
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
*

•
•
•
•
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
RG
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
D.U.T
RG
VGS
20V
DRIVER
L
VDS
tp
+
V
- DD
IAS
tp
A
0.01Ω
I AS
Fig 17a. Unclamped Inductive Test Circuit
LD
Fig 17b. Unclamped Inductive Waveforms
VDS
VDS
90%
+
VDD -
10%
D.U.T
VGS
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
Fig 18a. Switching Time Test Circuit
tr
td(off)
tf
Fig 18b. Switching Time Waveforms
Id
Vds
Vgs
L
DUT
0
VCC
Vgs(th)
1K
Qgs1 Qgs2
Fig 19a. Gate Charge Test Circuit
6
Qgd
Qgodr
Fig 19b Gate Charge Waveform
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IRFB4212PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS SEMBLED ON WW 19, 2000
IN T HE AS S EMBLY LINE "C"
Note: "P" in as s embly line pos ition
indicates "Lead - Free"
INTERNATIONAL
RECT IFIER
LOGO
AS SEMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WEEK 19
LINE C
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 9/05
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