DG808BC45 Gate Turn-off Thyristor DS5914-1.1 January 2009 (LN26575) KEY PARAMETERS FEATURES Double Side Cooling High Reliability In Service High Voltage Capability Fault Protection Without Fuses High Surge Current Capability Turn-off Capability Allows Reduction in ITCM VDRM I(AV) dVD/dt* dIT/dt 3000A 4500V 780A 1000V/µs 400A/µs Equipment Size and Weight. Low Noise Emission Reduces Acoustic Cladding Necessary For Environmental Requirements APPLICATIONS Variable speed AC motor drive inverters (VSDAC) including Traction drives Uninterruptable Power Supplies High Voltage Converters Choppers Welding Induction Heating DC/DC Converters Outline type code: C (See Package Details for further information) Fig. 1 Package outline VOLTAGE RATINGS Type Number Repetitive Peak Off-state Voltage VDRM (V) Repetitive Peak Reverse Voltage VRRM (V) DG808BC45 4500 16 Conditions Tvj = 125°C, IDM =100mA, IRRM = 50mA CURRENT RATINGS Symbol Parameter ITCM Repetitive peak controllable on-state current IT(AV) Mean on-state current IT(RMS) RMS on-state current Conditions VD = 66%VDRM, Tj = 125°C, dIGQ/dt = 40A/s, CS = 4 F THS = 80°C, Double side cooled. Half sine 50Hz THS = 80°C, Double side cooled. Half sine 50Hz Max. Units 3000 A 780 A 1225 A 1/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR SURGE RATINGS Symbol ITSM 2 It Parameter Test Conditions Max. Units Surge (non repetitive) on-state current 10ms half sine. Tj = 125°C 16.0 kA 10ms half sine. Tj = 125°C 1.28 MA s VD = 3000V, IT = 3000A, Tj = 125°C, IFG > 40A, Rise time > 1.0 s 400 A/s To 66% VDRM; RGK 1.5, Tj = 125°C 100 V/s To 66% VDRM; VRG -2V, Tj = 125°C 1000 V/s 200 nH 2 I t for fusing diT/dt Critical rate of rise of on-state current dVD/dt Rate of rise of off-state voltage LS Peak stray inductance in snubber circuit 2 o IT = 3000A, VD = VDRM, Tj = 125 C, dIGQ = 40A/us, CS = 4.0uF GATE RATINGS Symbol Parameter Test Conditions Min. Max. Units This value may exceeded during turn-off - 16 V VRGM Peak reverse gate voltage IFGM Peak forward gate current - 100 A Average forward gate power - 20 W Peak reverse gate power - 24 kW PFG(AV) PRGM diGQ/dt Rate of rise of reverse gate current 30 60 A/s tON(min) Minimum permissible on time 50 - s tOFF(min) Minimum permissible off time 100 - s THERMAL AND MECHANICAL RATINGS Symbol Rth(j-hs) Parameter Thermal resistance – junction to heatsink surface Test Conditions Double side cooled Min. Max. Units DC - 0.014 °C/W Anode DC - 0.0233 °C/W Cathode DC - 0.035 °C/W Per contact - 0.0036 °C/W -40 125 °C Single side cooled Rth(c-hs) Contact thermal resistance Clamping force 36.0kN With mounting compound Tvj Virtual junction temperature On-state (conducting) Top/Tstg Operating junction/storage temperature range -40 125 °C Clamping force 28.0 44.0 kN Fm 2/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR CHARACTERISTICS o Tj =125 C unless stated otherwise Symbol Parameter Test Conditions Min. Max. Units VTM) On-state voltage At 3000A peak, IG(ON) = 10A d.c. - 3.75 V IDM Peak off-state current VDRM = 4500V, VRG = 0V - 100 mA IRRM Peak reverse current VRRM = 16V - 50 mA VGT Gate trigger voltage VD = 24V, IT = 100A, Tj = 25 C o - 1.2 V IGT Gate trigger current VD = 24V, IT = 100A, Tj = 25 C o - 3.5 A IRGM Reverse gate cathode current VRGM = 16V, No gate/cathode resistor - 10 mA EON Turn-on Energy VD = 3000V - 2860 mJ td Delay time IT = 3000A, dIT/dt = 300A/µs - 2.1 µs tr Rise time IFG = 40A, rise time < 1.0µs - 4.8 µs Turn-off energy - 12000 mJ tgs Storage time - 25 µs tgf Fall time IT = 3000A, VDM = VDRM 2 µs tgq Gate controlled turn-off time Snubber Cap Cs = 4.0µC 27 µs QGQ Turn-off gate charge diGQ/dt = 40A/us 12000 µC QGQT Total turn-off gate charge 24000 µC IGQM Peak reverse gate current 800 A EOFF - - 3/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR 10 9 1.6 8 1.4 7 1.2 6 VGT 1 5 0.8 4 0.6 3 IGT 0.4 2 0.2 1 0 -50 -25 0 25 50 Gate trigger current IGT - (A) Gate trigger voltage VGT - (V) 1.8 3500 0 75 100 125 150 Instantaneous on-state current I T - (A) 2 Measured under pulse conditions. IG(ON) = 10A Half sine wave 10ms 3000 Tj=25oC 2500 2000 Tj=125oC 1500 1000 500 0 1 o Junction temperature Tj - ( C) 1.5 2 2.5 3 3.5 4 Instantaneous on-state voltage VTM - (V) Fig.2 Maximum gate trigger voltage/current vs junction temperature Fig.3 On-state characteristics Maximum permissible turn-off current I TCM - (A) 4000 3500 3000 2500 2000 Conditions: Tj = 125 oC VDM = VDRM dIGQ = 40A/us 1500 1000 500 0 0 2 4 6 8 Snubber capacitance CS - (uF) Fig.4 Maximum dependence of ITCM on CS Fig.5 Maximum (limit) transient thermal impedancedouble side cooled 4/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR 3500 35 30 25 20 15 10 2500 VD = 2000V 2000 1500 VD = 1000V 1000 0 0.001 0.01 0.1 0 1 Fig.6 Surge (non-repetitive) on-state current vs time 4500 3000 V D = 3000V 1500 V D = 2000V 1000 500 Conditions: IT = 3000A;Tj = 125oC CS = 4.0uF;RS = 10 Ohms IFGM = 40A;diFG /dt = 40A/us 3000 2500 2000 3000 Fig.7 Turn-on energy vs on-state current Turn-on energy loss EON - (mJ) (mJ) 3500 2000 3500 Conditions: Tj = 125oC; IT = 3000A Cs = 4.0uF Rs = 10 Ohms dIT /dt = 300A/uS dIFG/dt = 40A/uS 4000 1000 On-state current IT -(A) Pulse duration - (s) ON - VD = 3000V 500 5 0 0.0001 Turn-on energy loss E Conditions: o Tj = 125 C; IFGM = 40A Cs = 4.0uF; Rs = 10 Ohms dIT/dt = 300A/uS dIFG/dt = 40A/uS 3000 Turn-on energy loss EON - (mJ) Peak half sine wave on-state current - (kA) 40 2500 VD = 3000V 2000 VD = 2000V 1500 1000 VD = 1000V 500 V D = 1000V 0 0 0 20 40 60 80 100 Peak forward gate current IFGM - (A) Fig.8 Turn-on energy vs forward gate current 0 100 200 300 400 Rate of rise of on-state current diT/dt - (A/us) Fig.9 Turn-on energy vs rate of rise of on-state current 5/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR 10 5 Turn-on delay time, td, and rise time, tr - (us) Turn-on delay time, td, and rise time, tr - (us) 6 rise time Conditions: Tj = 125oC; IFGM = 40A Cs = 4.0uF; Rs = 10 Ohms diT/dt = 300A/uS Vd = 2000V 4 3 2 delay time 1 Conditions: IT = 3000A 9 7 6 rise time 5 4 3 2 delay time 1 0 0 0 500 1000 1500 2000 2500 0 3000 20 40 60 80 Peak forward gate current IFGM - (A) On-state current IT - (A) Fig.10 Delay and rise time vs on-state current Fig.11 Delay and rise time vs peak forward gate current 14000 13000 Conditions: Tj = 125oC Cs = 4.0uF diGQ/dt = 40A/uS 12000 10000 VDM = 100% VDRM 8000 VDM = 75% VDRM 6000 VDM = 50% VDRM 4000 2000 Turn-off energy per pulse EOFF - (mJ) Turn-off energy per pulse EOFF - (mJ) Tj = 125oC Cs = 4.0uF Rs = 10 Ohms diT/dt = 300A/uS diFG/dt = 40A/uS VD = 3000V 8 12000 VDM = 100% VDRM 11000 10000 VDM = 75% VDRM 9000 Conditions: Tj = 125oC Cs = 4.0uF IT = 3000A 8000 7000 6000 VDM = 50% VDRM 5000 0 0 1000 2000 3000 4000 On-state current, IT - (A) Fig.12 Turn-off energy vs on-state current 20 30 40 50 60 Rate of rise of reverse gate current dIGQ/dt - (A/us) Fig.13 Turn-off energy loss vs rate of rise of reverse gate current 6/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR 30 CS = 3 uF 12000 10000 CS = 2 uF 8000 6000 Conditions : Tj = 125 oC VDM = VDRM dIGQ/dt = 40 A/us 4000 2000 Conditions : Cs = 4 uF dIGQ/dt = 40 A/us 25 CS = 4uF CS = 2.5 uF Gate storage time Tgs - (us) Turn-off energy per pulse EOFF - (mJ) 14000 Tj = 25 oC 20 15 10 5 0 0 0 1000 2000 3000 4000 0 On-state current IT - (A) 1000 2000 3000 4000 On-state current IT - (A) Fig.14 Turn-off energy vs on-state current Fig.15 Gate storage time vs on-state current 40 2.5 Conditions: IT = 3000A Cs = 4.0uF 30 Tj = 125 oC 25 Tj = 25 oC 15 0 40 50 Rate of rise of reverse gate current dIGQ/dt - (A/us) Fig.16 Gate storage time vs rate of rise of reverse gate current Tj = 25 oC 1 0.5 30 Tj = 125 oC 1.5 20 20 Conditions: Cs = 4.0uF diGQ/dt = 40A/uS 2 Gate fall time tgf - (us) 35 Gate storage time t gs - (us) Tj = 125 oC 0 1000 2000 3000 4000 On-state current IT - (A) Fig.17 Gate fall time vs on-state current 7/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR 2.5 900 2.3 Peak reverse gate current IGQM - (A) Conditions: IT = 3000A Cs = 4.0uF 2.4 2.2 Gate fall time tgf - (us) 2.1 2 1.9 Tj = 125 oC 1.8 1.7 1.6 1.5 1.4 1.3 1.2 Tj = 25 oC Conditions: Cs = 4.0uF diGQ/dt = 40A/uS 800 700 Tj = 125 oC 600 500 Tj = 25 oC 400 300 1.1 1 20 30 40 50 Rate of rise of reverse gate current dIGQ/dt (A/us) 200 60 0 2000 3000 4000 On-state current IT - (A) Fig.18 Gate fall time vs rate of rise of reverse gate current Fig.19 Peak reverse gate current vs on-state current 850 14000 Conditions: IT = 3000A Cs = 4.0uF 800 Tj = 125oC 775 750 725 Tj = 25oC 700 675 650 Tj = 125oC Conditions: Cs = 4.0uF diGQ/dt = 40A/uS 12000 Turn-off gate charge QGQ - (uC) 825 Peak reverse gate current IGQM - (A) 1000 Tj = 25oC 10000 8000 6000 4000 2000 625 600 20 25 30 35 40 45 50 55 60 65 Rate of rise of reverse gate current dIGQ/dt - (A/us) Fig.20 Reverse gate current vs rate of rise of reverse gate current 0 0 1000 2000 3000 4000 On-state current IT - (A) Fig.21 Turn-off gate charge vs on-state current 8/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR 15000 1000 Turn-off gate charge Q GQ - (uC) 14000 Rate of rise of off-state voltage dv/dt - (V/us) Conditions: IT = 3000A Cs = 4.0uF 13000 Tj = 125oC 12000 11000 10000 Tj = 25oC 9000 8000 20 30 40 50 Rate of rise of reverse gate current dIGQ/dt - (A/us) Fig.22 Turn-off charge vs rate of rise of reverse gate current Tj = 125oC 900 800 VD = 2250V 700 600 500 400 300 200 100 VD = 3000V 0 0.1 1 10 100 1000 Gate cathode resistance RGK - (Ohms) Fig.23 Rate of rise of off-state voltage vs gate cathode resistance 9/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR Fig.24 General switching waveforms 10/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR PACKAGE DETAILS For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise. DO NOT SCALE. Nominal weight: 1400g Clamping force: 31.5 ±10% Lead length: 600mm Package outline type code: C Fig.31 Package outline 11/12 www.dynexsemi.com DG808BC45 SEMICONDUCTOR POWER ASSEMBLY CAPABILITY The Power Assembly group was set up to provide a support service for those customers requiring more than the basic semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages and current capability of our semiconductors. We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today. The Assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of our customers. Using the latest CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete Solution (PACs). HEATSINKS The Power Assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to optimise the performance of Dynex semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow rates) is available on request. For further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or Customer Services. Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be followed. http://www.dynexsemi.com e-mail: [email protected] HEADQUARTERS OPERATIONS DYNEX SEMICONDUCTOR LTD Doddington Road, Lincoln Lincolnshire, LN6 3LF. United Kingdom. Tel: +44(0)1522 500500 Fax: +44(0)1522 500550 CUSTOMER SERVICE Tel: +44(0)1522 502753 / 502901. Fax: +44(0)1522 500020 Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRODUCED IN UNITED KINGDOM. This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company’s conditions of sale, which are available on request. All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners. 12/12 www.dynexsemi.com