SiP32413, SiP32414 Vishay Siliconix Dual 2 A, 1.2 V, Slew Rate Controlled Load Switch DESCRIPTION FEATURES SiP32413 and SiP32414 are slew rate controlled load switches that is designed for 1.1 V to 5.5 V operation. The devices guarantee low switch on-resistance at 1.2 V input. They feature a controlled soft-on slew rate of typical 150 µs that limits the inrush current for designs of capacitive load or noise sensitive loads. The devices feature a low voltage control logic interface (On/ Off interface) that can interface with low voltage digital control without extra level shifting circuit. The SiP32414 also integrates output discharge switches that enable fast shutdown load discharge. When the switches are off, they provide the reverse blocking to prevent high current flowing into the power source. Both the SiP32413 and SiP32414 are available in TDFN8 2 mm x 2mm package. Each switch in each device can support over 2 A of continuous current. • • • • • • 1.1 V to 5.5 V operation voltage range 62 mΩ typical from 2 V to 5 V Low RON down to 1.2 V Slew rate controlled turn-on: 150 µs at 3.6 V Fast shutdown load discharge for SiP32414 Low quiescent current < 1 µA when disabled 6.7 µA at VIN = 1.2 V • Switch off reversed blocking • Compliant to RoHS directive 2002/95/EC • Halogen-free according to IEC 61249-2-21 definition APPLICATIONS • • • • • • Cellular phones Portable media players Digital camera GPS Computers Portable instruments and healthcare devices TYPICAL APPLICATION CIRCUIT VIN IN OUT VOUT SiP32413, SiP32414 (for one switch) C IN 4.7 µF C OUT 0.1 µF CNTRL CNTRL GND GND GND Figure 1 - SiP32413, SiP32414 Typical Application Circuit Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 www.vishay.com 1 SiP32413, SiP32414 Vishay Siliconix ORDERING INFORMATION Temperature Range Package Marking Part Number - 40 °C to 85 °C TDFN8 2 mm x 2 mm AA SiP32413DNP-T1-GE4 AB SiP32414DNP-T1-GE4 Note: x = Lot Code ABSOLUTE MAXIMUM RATINGS Parameter Limit Supply Input Voltage (VIN) - 0.3 to 6 Enable Input Voltage (VEN) - 0.3 to 6 Output Voltage (VOUT) Unit V - 0.3 to VIN + 0.3 Maximum Continuous Switch Current (IMAX) 2.4 Maximum Pulsed Current (IDM) VIN (Pulsed at 1 ms, 10 % Duty Cycle) A 3 ESD Rating (HBM) 4000 V Junction Temperature (TJ) - 40 to 125 °C Thermal Resistance (θJA)a 84 °C/W Power Dissipation (PD)a, b 655 mW Notes: a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout. b. Derate 11.9 mW/°C above TA = 70 °C, see PCB layout. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Parameter Limit Unit Input Voltage Range (VIN) 1.1 to 5.5 V Operating Temperature Range - 40 to 85 °C www.vishay.com 2 Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 SiP32413, SiP32414 Vishay Siliconix SPECIFICATIONS Parameter Operating Voltagec Quiescent Current Symbol VIN IQ Test Conditions Unless Specified VIN = 5.0 V, TA = - 40 °C to 85 °C (Typical values are at TA = 25 °C) Limits - 40 °C to 85 °C Min.a 1.1 Typ.b - Max.a 5.5 VIN = 1.2 V, CNTRL = active - 6.7 14 VIN = 1.8 V, CNTRL = active - 14 24 VIN = 2.5 V, CNTRL = active - 25 40 VIN = 3.6 V, CNTRL = active - 40 60 VIN = 4.3 V, CNTRL = active - 52 75 VIN = 5.0 V, CNTRL = active - 71 99 CNTRL = inactive, OUT = open - - 1 Off Supply Current IQ(off) Off Switch Current IDS(off) CNTRL = inactive, OUT = 0 - - 1 IRB VOUT = 5.5 V, VIN = 1.2 V,VEN = inactive - - 10 VIN = 1.2 V, IL = 100 mA, TA = 25 °C - 66 76 Reverse Blocking Current On-Resistance RDS(on) VIN = 1.8 V, IL = 100 mA, TA = 25 °C - 62 72 VIN = 2.5 V, IL = 100 mA, TA = 25 °C - 62 72 VIN = 3.6 V, IL = 100 mA, TA = 25 °C - 62 72 VIN = 4.3 V, IL = 100 mA, TA = 25 °C - 62 72 72 VIN = 5.0 V, IL = 100 mA, TA = 25 °C On-Resistance Temp.-Coefficient CNTRL Input Low Voltagec - 62 - 3900 - VIN = 1.2 V - 0.5 0.3 VIN = 1.8 V - 0.72 0.4d VIN = 2.5 V - 0.87 0.5d VIN = 3.6 V - 1.0 0.6d VIN = 4.3 V - 1.08 0.7d VIN = 5.0 V - TCRDS VIL Unit V µA mΩ ppm/°C 1.15 0.8d VIN = 1.2 V 0.9 d 0.54 - VIN = 1.8 V 1.2d 0.78 - VIN = 2.5 V 1.4 d 0.96 - VIN = 3.6 V 1.6d 1.2 - VIN = 4.3 V 1.7d 1.32 - VIN = 5.0 V 1.8 1.45 - ISINK VEN = 5.5 V - - 1 µA Output Pulldown Resistance RPD CNTRL = inactive, TA = 25 °C (SiP32414 only) - 217 280 Ω - 140 210 VIN = 3.6 V, RLOAD = 10 Ω, TA = 25 °C 80 150 220 - 0.27 1 CNTRL Input High Voltagec EN Input Leakage VIH Output Turn-On Delay Time td(on) Output Turn-On Rise Time t(on) Output Turn-Off Delay Time td(off) V µs Notes: a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. For VIN outside this range consult typical EN threshold curve. d. Not tested, guarantee by design. Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 www.vishay.com 3 SiP32413, SiP32414 Vishay Siliconix PIN CONFIGURATION OUT1 8 1 IN1 GND 7 2 CNTRL1 GND 6 3 CNTRL2 OUT2 5 4 IN2 Bottom View Figure 2 - TDFN8 2 mm x 2 mm Package PIN DESCRIPTION Pin Number Name 1 IN1 Function 2 CNTRL1 Side 1 control input 3 CNTRL2 Side 2 control input 4 IN2 5 OUT2 This pin is the side 2 n-channel MOSFET source connection. Bypass to ground throught a 0.1 µF capacitor 6 GND Ground connection 7 GND Ground connection 8 OUT1 This pin is the side 1 n-channel MOSFET source connection. Bypass to ground throught a 0.1 µF capacitor This pin is the side 1 n-channel MOSFET drain connection. Bypass to ground through a 2.2 µF capacitor This pin is the side 2 n-channel MOSFET drain connection. Bypass to ground through a 2.2 µF capacitor TRUTH TABLE SiP32413 TRUTH TABLE SiP32414 CNTRL1 CNTRL2 SW1 SW2 CNTRL1 CNTRL2 SW1 SW2 0 0 ON OFF 0 0 OFF OFF 0 1 ON ON 0 1 OFF ON 1 0 OFF OFF 1 0 ON OFF 1 1 OFF ON 1 1 ON ON TYPICAL CHARACTERISTICS internally regulated, 25 °C, unless otherwise noted 100 90 80 IQ - Quiescent Current (µA) IQ - Quiescent Current (µA) 80 60 40 20 VIN = 5 V 70 60 50 VIN = 3.6 V 40 30 20 VIN = 1.2 V 10 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) Figure 3 - Quiescent Current vs. Input Voltage www.vishay.com 4 0 - 40 - 20 0 20 40 60 80 100 Temperature (°C) Figure 4 - Quiescent Current vs. Temperature Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 SiP32413, SiP32414 Vishay Siliconix TYPICAL CHARACTERISTICS internally regulated, 25 °C, unless otherwise noted 100 0.7 SiP32413 SiP32413 IQ(off) - Off Switch Current (nA) IQ(off) - Off Supply Current (nA) 0.6 0.5 0.4 0.3 0.2 10 1 VIN = 5 V VIN = 3.6 V 0.1 VIN = 1.2 V 0.01 0.1 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.001 - 40 5.5 - 20 0 VIN (V) 40 60 80 100 Figure 6 - SiP32414 Off Supply Current vs. Temperature Figure 5 - SiP32413 Off Supply Current vs. VIN 1000 1.4 SiP32414 SiP32414 IQ(OFF) - Off Supply Current (nA) 1.2 IQ(OFF) - Off Supply Current (nA) 20 Temperature (°C) 1.0 0.8 0.6 0.4 0.2 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 100 10 VIN = 5 V 1 VIN = 3.6 V 0.1 0.01 VIN = 1.2 V 0.001 - 40 5.5 - 20 0 20 40 60 80 100 Temperature (°C) VIN (V) Figure 8 - SiP32414 Off Supply Current vs. Temperature Figure 7 - SiP32414 Off Supply Current vs. VIN 1.0 1000 0.8 IDS(on) - Off Switch Current (nA) IDS(off) - Off Switch Current (nA) 0.9 0.7 0.6 0.5 0.4 0.3 0.2 100 10 VIN = 5 V 1 VIN = 3.6 V 0.1 0.01 VIN = 1.2 V 0.1 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) Figure 9 - Off Swith Current vs. Input Voltage Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 0.001 - 40 - 20 0 20 40 60 80 100 Temperature (°C) Figure 10 - Off Swith Current vs. Temperature www.vishay.com 5 SiP32413, SiP32414 Vishay Siliconix 72 75 70 70 RDS - On-Resistance (mΩ) RDS - On-Resistance (mΩ) TYPICAL CHARACTERISTICS internally regulated, 25 °C, unless otherwise noted IO = 2 A 68 IO = 1.5 A IO = 1 A 66 64 62 IO = 0.5 A 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 60 55 50 40 - 40 5.5 - 20 0 40 60 80 VIN (V) Temperature (°C) Figure 12 - RDS(on) vs. Temperature 100 235 500 450 RPD - Output Pulldown Resistance (Ω) SiP32414 only VIN = VOUT 400 350 300 250 200 150 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SiP32414 only VOUT = VIN = 5 V 230 225 220 215 210 205 - 40 100 5.5 - 20 0 VIN (V) 40 60 80 100 Figure 14 - SiP32414 Output Pull Down vs. Temperature 1000 1000 VIN = 1.2 V VOUT = 5 V VCNTRL = inactive VIN = 1.2 V VCNTRL = inactive IIN - Input Current (nA) 100 20 Temperature (°C) Figure 13 - SiP32414 Output Pull Down vs. Input Voltage IIN - Input Current (nA) 20 Figure 11 - RDS(on) vs. Input Voltage 550 RPD - Output Pulldown Resistance (Ω) 65 45 IO = 0.1 A 60 1.0 IO = 0.1 A VIN = 5 V 10 1 100 0.1 0.01 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VOUT (V) Figure 15 - Reverse Blocking Current vs. Output Voltage www.vishay.com 6 10 - 40 - 20 0 20 40 60 80 100 Temperature (°C) Figure 16 - Reverse Blocking Current vs. Temperature Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 SiP32413, SiP32414 Vishay Siliconix 1.6 160 1.5 150 1.4 td(on) - Turn-On Delay Time (µs) CNTRL - Threshold Voltage (V) TYPICAL CHARACTERISTICS internally regulated, 25 °C, unless otherwise noted 1.3 1.2 1.1 1.0 0.9 VIH 0.8 VIL 0.7 0.6 VIN = 5 V CL = 0.1 µF RL = 10 Ω 140 130 120 110 100 90 80 70 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 60 - 40 5.5 - 20 0 VIN (V) 80 100 0.22 VIN = 5 V CL = 0.1 µF RL = 10 Ω td(off) - Turn-Off Delay Time (µs) t(on) - Turn-On Rise Time (µs) 60 Figure 18 - Turn-On Delay Time vs. Temperature 220 200 40 Temperature (°C) Figure 17 - CNTRL Threshold Voltage vs. Input Voltage 210 20 190 180 170 160 150 VIN = 5 V CL = 0.1 µF RL = 10 Ω 0.20 0.18 0.16 0.14 0.12 140 130 - 40 - 20 0 20 40 60 80 100 0.10 - 40 - 20 0 20 40 60 80 100 Temperature (°C) Temperature (°C) Figure 19 - Rise Time vs. Temperature Figure 20 - Turn-Off Delay Time vs. Temperature TYPICAL WAVEFORMS VCNTRL (2 V/div.) VCNTRL (2 V/div.) RL = 7.2 Ω CL = 0.1 µF RL = 7.2 Ω CL = 0.1 µF VOUT (1 V/div.) IOUT (200 mA/div.) VOUT (1 V/div.) IOUT (200 mA/div.) Time (100 µs/div.) Time (1 µs/div.) Figure 21 - SiP32413 Channel 1 Switching (VIN = 3.6 V, RL = 7.2 Ω) Figure 22 - SiP32413 Channel 1 Turn-Off (VIN = 3.6 V, RL = 7.2 Ω) Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 www.vishay.com 7 SiP32413, SiP32414 Vishay Siliconix VCNTRL (2 V/div.) VCNTRL (2 V/div.) RL = 10 Ω CL = 0.1 µF RL = 10 Ω CL = 0.1 µF VOUT (2 V/div.) VOUT (2 V/div.) IOUT (200 mA/div.) IOUT (200 mA/div.) Time (100 µs/div.) Time (1 µs/div.) Figure 23 - SiP32413 Channel 1 Switching (VIN = 5 V, RL = 10 Ω) Figure 24 - SiP32413 Channel 1 Turn-Off (VIN = 5 V, RL = 10 Ω) VCNTRL (2 V/div.) VCNTRL (2 V/div.) RL = 7.2 Ω CL = 0.1 µF RL = 7.2 Ω CL = 0.1 µF VOUT (1 V/div.) IOUT (200 mA/div.) VOUT (1 V/div.) IOUT (200 mA/div.) Time (1 µs/div.) Time (100 µs/div.) Figure 25 - SiP32413 Channel 2 and SiP32414 Switching (VIN = 3.6 V, RL = 7.2 Ω) VCNTRL (2 V/div.) Figure 26 - SiP32413 Channel 2 and SiP32414 Turn-Off (VIN = 3.6 V, RL = 7.2 Ω) VCNTRL (2 V/div.) RL = 10 Ω CL = 0.1 µF RL = 10 Ω CL = 0.1 µF VOUT (2 V/div.) VOUT (2 V/div.) IOUT (200 mA/div.) IOUT (200 mA/div.) Time (100 µs/div.) Time (1 µs/div.) Figure 27 - SiP32413 Channel 2 and SiP32414 Switching (VIN = 5 V, RL = 10 Ω) Figure 28 - SiP32413 Channel 2 and SiP32414 Turn-Off (VIN = 5 V, RL = 10 Ω) www.vishay.com 8 Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 SiP32413, SiP32414 Vishay Siliconix BLOCK DIAGRAM Reverse Blocking IN1 CNTRL1 OUT1 Logic Control Charge Pump Turn On Slew Rate Control + GND + CNTRL2 Logic Control Charge Pump Turn On Slew Rate Control IN2 SiP32414 only OUT2 Reverse Blocking Figure 29 - Functional Block Diagram PCB LAYOUT Top Bottom Figure 26 - PCB Layout for TDFN8 2 mm x 2 mm (board size: 1.2 inch x 1.3 inch) Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 www.vishay.com 9 SiP32413, SiP32414 Vishay Siliconix DETAILED DESCRIPTION SiP32413 and SiP32414 are dual n-channel power MOSFETs designed as high side load switch with slew rate control to prevent in-rush current. Once enable the device charge pumps the gate of the power MOSFET to 5 V gate to source voltage while controlling the slew rate of the turn on time. The mostly constant gate to source voltage keeps the on resistance low through out the input voltage range. For SiP32414, when disable the output discharge circuit turns on to help pull the output voltage to ground more quickly. For both parts, in disable mode, the reverse blocking circuit is activated to prevent current from going back to the input in case the output voltage is higher than the input voltage. Input voltage is needed for the reverse blocking circuit to work properly, it can be as low as VIN(min). APPLICATION INFORMATION Input Capacitor While bypass capacitors on the inputs are not required, 2.2 µF or larger capacitors for CIN is recommended in almost all applications. The bypass capacitors should be placed as physically close as possible to the device’s input to be effective in minimizing transients on the input. Ceramic capacitors are recommended over tantalum because of their ability to withstand input current surges from low impedance sources such as batteries in portable devices. Output Capacitor A 0.1 µF capacitor or larger across VOUT and GND is recommended to insure proper slew operation. COUT may be increased without limit to accommodate any load transient condition with only minimal affect on the turn on slew rate time. There are no ESR or capacitor type requirement. package. To obtain the highest power dissipation (and a thermal resistance of 84) the power pad of the device should be connected to a heat sink on the printed circuit board. The maximum power dissipation in any application is dependant on the maximum junction temperature, TJ(max.) = 125 °C, the junction-to-ambient thermal resistance for the TDFN4 1.2 mm x 1.6 mm package, θJ-A = 84 °C/W, and the ambient temperature, TA, which may be formulaically expressed as: P (max.) = T J (max.) - T A θJ- A = 125 - TA 84 It then follows that, assuming an ambient temperature of 70 °C, the maximum power dissipation will be limited to about 655 mW. So long as the load current is below the 2.0 A limit, the maximum continuous switch current becomes a function two things: the package power dissipation and the RDS(ON) at the ambient temperature. As an example let us calculate the worst case maximum load current at TA = 70 °C. The worst case RDS(ON) at 25 °C occurs at an input voltage of 1.2 V and is equal to 75 mΩ. The RDS(ON) at 70 °C can be extrapolated from this data using the following formula: RDS(ON) (at 70 °C) = RDS(ON) (at 25 °C) x (1 + TC x ΔT) Where TC is 3400 ppm/°C. Continuing with the calculation we have RDS(ON) (at 70 °C) = 75 mΩ x (1 + 0.0034 x (70 °C - 25 °C)) = 86.5 mΩ The maximum current limit is then determined by P (max.) Control The CNTRL pins are compatible with both TTL and CMOS logic voltage levels. I LOAD (max.) < Protection Against Reverse Voltage Condition Both SiP32413 and SiP32414 contain reverse blocking circuitries to protect the current from going to the input from the output in case where the output voltage is higher than the input voltage when the main switch is off. Supply voltages as low as the minimum required input voltage are necessary for these circuitries to work properly. which in case is 2.75 A, assuming one switch turn on at a time. Under the stated input voltage condition, if the 2.75 A current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. R DS(ON ) Thermal Considerations SiP32413 and SiP32414 are designed to maintain constant output load current. Due to physical limitations of the layout and assembly of the device the maximum switch current is 2.4 A, as stated in the Absolute Maximum Ratings table. However, another limiting characteristic for the safe operating load current is the thermal power dissipation of the Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71437. www.vishay.com 10 Document Number: 71437 S11-0366-Rev. A, 07-Mar-11 Package Information Vishay Siliconix CASE OUTLINE FOR TDFN8 2 x 2 Index Area (D/2 x E/2) A A3 A1 D 1 8 2 7 MILLIMETERS 6 DIM. MIN. NOM. MAX. MIN. NOM. A 0.50 0.55 0.60 0.020 0.022 0.024 A1 0.00 - 0.05 0.000 - 0.002 E A3 6 3 0.152 REF 5 Top View 0.05 C 7 Side View D2 0.006 REF 0.18 0.23 0.28 0.007 0.009 0.011 D 1.95 2.00 2.05 0.077 0.079 0.081 D2 0.75 0.80 0.85 0.030 0.031 0.033 0.50 BSC 0.020 BSC E 1.95 2.00 2.05 0.077 0.079 0.081 E2 1.40 1.45 1.50 0.055 0.057 0.059 K - 0.20 - - 0.008 - L 0.30 0.35 0.40 0.012 0.014 0.016 ECN: C11-0033 Rev. A, 07-Feb-11 DWG: 5997 L 5 Note 1. All dimensions are in millimeters which will govern. b Pin 1 Indicator (Optional) MAX. b e 4 INCHES 1 7 2 6 3 6. Applied only for terminals. e 2. Max. package warpage is 0.05 mm. 8 5 7. Applied for exposed pad and terminals. 4 3. Max. allowable burrs is 0.076 mm in all directions. E2 4. Pin #1 ID on top will be laser/ink marked. 5. Dimension applies to meatlized terminal and is measured between 0.20 mm and 0.25 mm from terminal tip. K K Bottom View Document Number: 67493 Revison: 07-Feb-11 www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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