TI TPS22966DPUT

TPS22966
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
Dual Channel, Ultra-Low Resistance Load Switch
Check for Samples: TPS22966
FEATURES
1
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
Integrated dual channel load switch
Input voltage range: 0.8V to 5.5V
Ultra low RON resistance
– RON = 18mΩ at VIN = 5V (VBIAS = 5V)
– RON = 18mΩ at VIN = 3.6V (VBIAS = 5V)
– RON = 18mΩ at VIN = 1.8V (VBIAS = 5V)
6A maximum continuous switch current per
channel
Low quiescent current
– 80µA (both channels)
– 60µA (single channel)
Low control input threshold enables use of
1.2-V/1.8-V/2.5-V/3.3-V logic
Configurable rise time
Quick Output Discharge (QOD)
SON 14-pin package with Thermal Pad
ESD performance tested per JESD 22
– 2KV HBM and 1KV CDM
The TPS22966 is a small, ultra-low RON, dual
channel load switch with controlled turn on. The
device contains two N-channel MOSFETs that can
operate over an input voltage range of 0.8V to 5.5V
and can support a maximum continuous current of 6A
per channel. Each switch is independently controlled
by an on/off input (ON1 and ON2), which is capable
of interfacing directly with low-voltage control signals.
In TPS22966, a 220-Ω on-chip load resistor is added
for quick output discharge when switch is turned off.
The TPS22966 is available in a small, space-saving
2mm x 3mm 14-SON package (DPU) with integrated
thermal pad allowing for high power dissipation. The
device is characterized for operation over the free-air
temperature range of –40°C to 85°C.
Table 1. Feature List
RON TYPICAL at 3.6 V (VBIAS = 5V)
18 mΩ
RISE TIME(1)
Adjustable
(2)
QUICK OUTPUT DISCHARGE
Yes
MAXIMUM OUTPUT CURRENT (per
channel)
6A
APPLICATIONS
GPIO ENABLE
Active High
•
•
•
•
•
•
•
OPERATING TEMP
–40°C to 85°C
Ultrabook™
Notebooks/Netbooks
Tablet PC
Consumer electronics
Set-top boxes/Residental gateways
Telecom systems
Solid State Drives (SSD)
OFF
CIN
(2) This feature discharges output of the switch to GND through a
220-Ω resistor, preventing the output from floating.
VOUT1
VIN 1
Dual
Power
Supply
(1) See Application Information section for CT value vs. rise time.
ON1
CL
RL
CT1
ON
CT2
or
GND
VBIAS
Dual
DC/DC
converter
VOUT2
VIN2
OFF
CIN
ON2
CL
ON
TPS22966
GND
GND
Figure 1. Typical Application
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
TPS22966
SLVSBH4A – JUNE 2012 – REVISED JULY 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
ORDERABLE PART NO.
TOP-SIDE MARKING/STATUS
-40°C to 85°C
TA
DPU
Tape and reel 3000 units
PACKAGE
TPS22966DPUR
RB966
-40°C to 85°C
DPU
Tape and reel 250 units
TPS22966DPUT
RB966
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1) (2)
VALUE
UNIT (2)
VIN1,2
Input voltage range
–0.3 to 6
V
VOUT1,2
Output voltage range
–0.3 to 6
V
VON1,2
Input voltage range
–0.3 to 6
V
IMAX
Maximum continuous switch current
6
A
IPLS
Maximum pulsed switch current, pulse <300 µs, 2% duty cycle
8
A
–40 to 85
°C
125
°C
–65 to 150
°C
300
°C
(3)
TA
Operating free-air temperature range
TJ
Maximum junction temperature
TSTG
Storage temperature range
TLEAD
Maximum lead temperature (10-s soldering time)
ESD
Electrostatic discharge
protection
(1)
(2)
(3)
Human-Body Model (HBM)
2000
Charged-Device Model (CDM)
1000
V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the
maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (θJA × PD(max))
THERMAL INFORMATION
THERMAL METRIC (1)
TPS22966
DPU (14 PINS)
θJA
Junction-to-ambient thermal resistance
52.3
θJCtop
Junction-to-case (top) thermal resistance
45.9
θJB
Junction-to-board thermal resistance
11.5
ψJT
Junction-to-top characterization parameter
0.8
ψJB
Junction-to-board characterization parameter
11.4
θJCbot
Junction-to-case (bottom) thermal resistance
6.9
(1)
2
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
UNIT
VIN1,2
Input voltage range
0.8
VBIAS
V
VBIAS
Bias voltage range
2.5
5.5
V
VON1,2
ON voltage range
0
VIN
V
VOUT1,2
Output voltage range
VIN
V
VIH
High-level input voltage, ON
VBIAS = 2.5 V to 5.5 V
1.2
5.5
V
VIL
Low-level input voltage, ON
VBIAS = 2.5 V to 5.5 V
0
0.5
V
CIN1,2
(1)
Input capacitor
1
(1)
µF
Refer to Application Information section.
ELECTRICAL CHARACTERISTICS
Unless otherwise note the specification in the following table applies over the operating ambient temperature –40°C ≤ TA ≤
85°C (full) and VBIAS = 5.0 V. Typical values are for TA = 25°C. (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX
UNIT
POWER SUPPLIES AND CURRENTS
IIN(VBIAS-ON)
VBIAS quiescent current (both
channels)
IOUT1 = IOUT2 = 0,
VIN1,2 = VON1,2 = VBIAS = 5.0 V
Full
80
IIN(VBIAS-ON)
VBIAS quiescent current (single
channel)
IOUT1 = IOUT2 = 0, VON2 = 0V
VIN1,2 = VON1 = VBIAS = 5.0 V
Full
60
IIN(VBIAS-OFF) VBIAS shutdown current
VON1,2 = GND, VOUT1,2 = 0 V
Full
VIN1,2 = 5.0 V
IIN(VIN-OFF)
VIN1,2 off-state supply current (per
channel)
VON1,2 = GND,
VOUT1,2 = 0 V
ION
ON pin input leakage current
VON = 5.5 V
VIN1,2 = 3.3 V
VIN1,2 = 1.8 V
Full
VIN1,2 = 0.8 V
120
µA
2
2.1
8
0.3
3
0.07
2
0.04
1
Full
µA
1
µA
µA
µA
RESISTANCE CHARACTERISTICS
VIN = 5.0 V
VIN = 3.3 V
RON
ON-state resistance
IOUT = –200 mA,
VBIAS = 5.0 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
RPD
Output pulldown resistance
VIN = 5.0 V, VON = 0V, IOUT = 15 mA
25°C
18
Full
25°C
27
18
Full
25°C
18
18
18
25
27
18
Full
Full
25
27
Full
25°C
25
27
Full
25°C
25
27
Full
25°C
25
25
27
220
300
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mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
Ω
3
TPS22966
SLVSBH4A – JUNE 2012 – REVISED JULY 2012
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ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the specification in the following table applies over the operating ambient temp –40°C ≤ TA ≤ 85°C
(full) and VBIAS = 2.5 V. Typical values are for TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX
UNIT
POWER SUPPLIES AND CURRENTS
IIN(VBIAS-ON)
VBIAS quiescent current (both
channels)
IOUT1 = IOUT2 = 0,
VIN1,2 = VON1,2 = VBIAS = 2.5 V
Full
IIN(VBIAS-ON)
VBIAS quiescent current (single
channel)
IOUT1 = IOUT2 = 0, VON2 = 0V
VIN1,2 = VON1 = VBIAS = 2.5 V
Full
VON1,2 = GND, VOUT1,2 = 0 V
Full
IIN(VBIAS-OFF) VBIAS shutdown current
IIN(VIN-OFF)
VIN1,2 off-state supply current (per
channel)
VON1,2 = GND,
VOUT1,2 = 0 V
ON pin input leakage current
37
2
0.13
3
VIN1,2 = 1.8 V
0.07
2
0.05
2
0.04
1
VIN1,2 = 1.2 V
Full
VON = 5.5 V
µA
µA
VIN1,2 = 2.5 V
VIN1,2 = 0.8 V
ION
25
Full
1
µA
µA
µA
RESISTANCE CHARACTERISTICS
VIN = 2.5 V
VIN = 1.8 V
RON
ON-state resistance
IOUT = –200 mA,
VBIAS = 2.5 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
RPD
4
Output pulldown resistance
VIN = 2.5 V, VON = 0V, IOUT = 1 mA
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25°C
22
Full
25°C
30
21
Full
25°C
20
20
27
29
19
Full
Full
27
29
Full
25°C
28
30
Full
25°C
28
27
29
260
300
mΩ
mΩ
mΩ
mΩ
mΩ
Ω
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
SWITCHING CHARACTERISTIC MEASUREMENT INFORMATION
VIN
VOUT
CIN = 1μF
ON
+
-
(A)
ON
CL
RL
OFF
VBIAS
GND
TPS22966
GND
GND
Single channel shown for clarity.
TEST CIRCUIT
VON
50%
50%
tOFF
tON
VOUT
50%
50%
tf
tr
90%
VOUT
90%
10%
10%
tD
tON /t OFF WAVEFORMS
(A) Rise and fall times of the control signal is 100ns.
Figure 2. Test Circuit and tON/tOFF Waveforms
SWITCHING CHARACTERISTICS
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
VIN = VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
tOFF
Turn-off time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1210
6
tR
VOUT rise time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1370
tF
VOUT fall time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2
tD
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
460
µs
VIN = 0.8 V, VON = VBIAS = 5V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
550
tOFF
Turn-off time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
170
tR
VOUT rise time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
325
tF
VOUT fall time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
16
tD
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
400
µs
VIN = 2.5V, VON = 5 V, VBIAS = 2.5V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2050
tOFF
Turn-off time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
5
tR
VOUT rise time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2275
tF
VOUT fall time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2.5
tD
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
990
µs
VIN = 0.8 V, VON = 5 V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1300
tOFF
Turn-off time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
130
tR
VOUT rise time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
875
tF
VOUT fall time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
16
tD
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
870
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5
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FUNCTIONAL BLOCK DIAGRAM
VIN1
ON1
Control
Logic
CT1
VOUT1
GND
VBIAS
Charge Pump
VOUT2
CT1
ON2
Control
Logic
VIN2
Figure 3. Functional Block Diagram
Table 2. FUNCTIONAL TABLE
6
ONx
VINx to VOUTx
VOUTx to GND
L
Off
On
H
On
Off
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
DPU PACKAGE
1
14
14
1
VIN1
VOUT1
VOUT1
VIN1
VIN1
VOUT1
VOUT1
VIN1
ON1
CT 1
CT 1
ON1
VBIAS
GND
GND
ON2
CT2
CT2
ON2
VIN2
VOUT2
VOUT2
VIN2
VIN2
VOUT2
VOUT2
VIN2
Top View
VBIAS
Bottom View
PIN TABLE
TPS22966
DPU
PIN NAME
I/O
DESCRIPTION
1
VIN1
I
Switch #1 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS.
2
VIN1
I
Switch #1 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS.
3
ON1
I
Active high switch #1 control input. Do not leave floating.
4
VBIAS
I
Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5V to 5.5V.
See Application Information section.
5
ON2
I
Active high switch #2 control input. Do not leave floating.
6
VIN2
I
Switch #2 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS.
7
VIN2
I
Switch #2 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS.
8
VOUT2
O
Switch #2 output.
9
VOUT2
O
Switch #2 output.
10
CT2
O
Switch #2 slew rate control. Can be left floating.
11
GND
–
Ground
12
CT1
O
Switch #1 slew rate control. Can be left floating.
13
VOUT1
O
Switch #2 output.
14
VOUT1
O
Switch #2 output.
15
Thermal Pad
O
Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Application
Information for layout guidelines.
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TYPICAL CHARACTERISTICS
VBIAS vs. QUIESCENT CURRENT
(BOTH CHANNELS)
VBIAS vs. QUIESCENT CURRENT
(SINGLE CHANNEL)
100
95
90
85
70
−40C
25C
85C
70C
60
80
55
75
50
IIN_VBIAS (µA)
IIN_VBIAS (µA)
70
65
60
55
50
45
40
25
10
2.5 2.75
40
35
25
30
15
45
30
35
20
−40C
25C
85C
70C
65
20
VIN1=VIN2=VBIAS, VON1=VON2=5V, VOUT=Open
SW1= On, SW2=On
3
3.25 3.5 3.75 4 4.25 4.5 4.75
VBIAS (V)
5
VIN1=VIN2=VBIAS, VON1=VON2=5V, VOUT=Open
SW1 = Off, SW2 = On
15
10
2.5 2.75
5.25 5.5
3
3.25 3.5 3.75 4 4.25 4.5 4.75
VBIAS (V)
5
G069
G069
VBIAS vs. SHUTDOWN CURRENT
(BOTH CHANNELS)
VIN vs. OFF-STATE SUPPLY CURRENT
(SINGLE CHANNEL)
3
1.2
−40C
25C
85C
70C
2.5
−40C
25C
85C
70C
VBIAS=5.5V, VON=0V, VOUT = 0V
2
IINOFF_VIN (µA)
IINOFF_VBIAS (µA)
1
5.25 5.5
0.8
0.6
1.5
1
0.4
0.5
VIN1=VIN2=VBIAS, VON1=VON2=0V, VOUT=0V
0.2
2.5 2.75
3
3.25 3.5 3.75 4 4.25 4.5 4.75
VBIAS (V)
5
5.25 5.5
0
0.8 1.2 1.6
G070
8
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2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G067
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TYPICAL CHARACTERISTICS (continued)
TEMPERATURE vs. RON
(VBIAS = 2.5V, SINGLE CHANNEL)
TEMPERATURE vs. RON
(VBIAS = 5.5V, SINGLE CHANNEL)
26
25
24
23
22
VIN =0.8V
VIN =1.05
VIN =1.2
VIN=1.5V
VIN = 1.8V
VIN = 2.5V
VIN =0.8V
VIN =1.05
VIN =1.2
VIN=1.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.3V
VIN =3.6V
VIN=4.2V
VIN=5V
VN=5.5V
21.5
21
20.5
20
19.5
19
Ron (mΩ)
Ron (mΩ)
22
21
20
18.5
18
17.5
17
19
16.5
18
16
15.5
17
15
16
14.5
VBIAS =2.5V, IOUT=−200mA
15
−40
−15
10
35
Temperature (°C)
60
VBIAS =5.5V, IOUT=−200mA
14
−40
85
−15
10
35
Temperature (°C)
60
G063
G064
VIN vs. RON
(VBIAS = 2.5V, SINGLE CHANNEL)
VIN vs. RON
(VBIAS = 5.5V, SINGLE CHANNEL)
26
25
24
85
22
−40C
85C
25C
70C
VBIAS =5.5V, IOUT = −200mA
21
23
20
22
Ron (mΩ)
Ron (mΩ)
19
21
20
19
18
17
18
17
−40C
85C
25C
70C
16
16
15
15
VBIAS =2.5V, IOUT = −200mA
14
0.8
1.05
1.3
1.55
1.8
VIN (V)
2.05
2.3
2.5
14
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G060
G061
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TYPICAL CHARACTERISTICS (continued)
VIN vs. RON
(TA = 25°C, SINGLE CHANNEL)
VIN vs. RPD
(VBIAS = 5.5V, SINGLE CHANNEL)
23
216
Temperature=25C, IOUT=−200mA
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS= 4.2V
VBIAS = 5V
VBIAS = 5.5V
22.5
22
21.5
IPD=1mA, VBIAS=5.5V, VON=0V
−40C
85C
25C
70C
212
20.5
Rpd (Ω)
Ron (mΩ)
21
20
208
19.5
19
18.5
204
18
17.5
17
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
200
0.8 1.2 1.6
4.4 4.8 5.2 5.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G062
G065
VON vs. VOUT
(TA = 25°C, SINGLE CHANNEL)
VIN vs. tD
(VBIAS = 2.5V, CT = 1nF)
2.4
1300
VIN=2V, Tempeature = 25C
1250
2.2
VBIAS = 2.5V
CT = 1nf
1200
2
1150
1.8
1100
1050
1.4
tD (µs)
VOUT (V)
1.6
1.2
950
900
1
850
0.8
800
VBIAS = 2.5V
VBIAS=3.3V
VBIAS=3.6V
VBIAS=4.2
VBIAS=5V
VBIAS=5.5V
0.6
0.4
0.2
0
1000
0
0.25
0.5
0.75
1
1.25 1.5
VON (V)
1.75
2
2.25
750
650
2.5
600
0.8
G066
10
−40C
25C
70C
85C
700
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1
1.2
1.4
1.6
1.8
VIN (V)
2
2.2
2.4
2.6
G030
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
TYPICAL CHARACTERISTICS (continued)
VIN vs. tD
(VBIAS = 5.5V, CT = 1nF)
VIN vs. tF
(VBIAS = 2.5V, CT = 1nF)
24
650
VBIAS = 5.5V, CT = 1nf
VBIAS = 2.5V
CT = 1nf
600
−40C
25C
70C
85C
20
550
500
tFall (µs)
tD (µs)
16
450
12
8
400
−40C
25C
70C
85C
350
300
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4
0
0.8
4.4 4.8 5.2 5.5
1
1.2
1.4
1.6
1.8
VIN (V)
2
2.2
2.4
2.6
G035
G036
VIN vs. tF
(VBIAS = 5.5V, CT = 1nF)
VIN vs. tOFF
(VBIAS = 2.5V, CT = 1nF)
24
160
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
20
−40C
25C
70C
85C
150
140
130
120
110
16
tOff (µs)
tFall (µs)
100
12
90
80
70
60
8
50
40
30
4
20
10
0
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
VBIAS = 2.5V
CT = 1nf
0
0.8
1
1.2
1.4
1.6
1.8
VIN (V)
2
2.2
2.4
G041
G042
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11
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
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TYPICAL CHARACTERISTICS (continued)
VIN vs. tOFF
(VBIAS = 5.5V, CT = 1nF)
VIN vs. tON
(VBIAS = 2.5V, CT = 1nF)
2500
250
225
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
200
−40C
25C
70C
85C
2400
2300
2200
2100
175
2000
tOn (µs)
tOff (µs)
150
125
100
1900
1800
1700
1600
75
1500
50
1400
1300
25
VBIAS = 2.5V
CT = 1nf
1200
0
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
1100
0.8
4.4 4.8 5.2 5.6
1
1.2
1.4
1.6
1.8
VIN (V)
2
2.2
2.4
2.6
G047
G048
VIN vs. tON
(VBIAS = 5.5V, CT = 1nF)
VIN vs. tR
(VBIAS = 2.5V, CT = 1nF)
1600
1500
1400
2800
−40C
25C
70C
85C
−40C
25C
70C
85C
2450
1300
2100
1100
tRise (µs)
tOn (µs)
1200
1000
900
1750
1400
800
700
600
1050
VBIAS = 5.5V
CT = 1nf
500
400
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
VBIAS= 2.5V
CT = 1nf
4.4 4.8 5.2 5.6
700
0.8
G053
12
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1
1.2
1.4
1.6
1.8
VIN (V)
2
2.2
2.4
2.6
G061
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TPS22966
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
TYPICAL CHARACTERISTICS (continued)
VIN vs. tR
(VBIAS = 5.5V, CT = 1nF)
VBIAS vs. tR
(VIN = 2.5V, CT = 1nF)
2000
1750
3000
−40C
25C
70C
85C
2500
1500
2250
2000
1250
tRise (µs)
tRise (µs)
−40C
25C
70C
85C
2750
1000
1750
1500
1250
750
1000
500
750
VBIAS = 5.5V
CT = 1nf
250
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
VIN = 2.5V
CT = 1nf
500
2.5 2.8
3
3.2 3.5 3.8 4 4.2 4.5 4.8
VBIAS (V)
5
5.2 5.5
G059
G061
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TPS22966
SLVSBH4A – JUNE 2012 – REVISED JULY 2012
www.ti.com
TYPICAL AC SCOPE CAPTURES @ TA = 25ºC, CT = 1nF
14
TURN-ON RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-ON RESPONSE TIME
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-ON RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-ON RESPONSE TIME
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-OFF RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-OFF RESPONSE TIME
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
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TYPICAL AC SCOPE CAPTURES @ TA = 25ºC, CT = 1nF (continued)
TURN-OFF RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-OFF RESPONSE TIME
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
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TPS22966
SLVSBH4A – JUNE 2012 – REVISED JULY 2012
www.ti.com
APPLICATION INFORMATION
ON/OFF CONTROL
The ON pins control the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic threshold. It can be used with any microcontroller with 1.2-V or higher GPIO voltage. This pin cannot
be left floating and must be tied either high or low for proper functionality.
INPUT CAPACITOR (OPTIONAL)
To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce
the voltage drop during high-current application. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.
OUTPUT CAPACITOR (OPTIONAL)
Due to the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL
greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current
flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip
caused by inrush currents during startup.
VIN and VBIAS VOLTAGE RANGE
For optimal RON performance, make sure VIN ≤ VBIAS. The device will still be functional if VIN > VBIAS but it will
exhibit RON greater than what is listed in the ELECTRICAL CHARACTERISTICS table. See Figure 4 for an
example of a typical device. Notice the increasing RON as VIN exceeds VBIAS voltage. Be sure to never exceed
the maximum voltage rating for VIN and VBIAS.
50
47
42
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS= 4.2V
VBIAS = 5V
VBIAS = 5.5V
Temperature=25C, IOUT=−200mA
Ron (mΩ)
37
32
27
22
17
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G062
Figure 4. RON vs. VIN (VIN > VBIAS, Single Channel)
16
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
ADJUSTABLE RISE TIME
A capacitor to GND on the CT pins sets the slew rate for each channel. An approximate formula for the
relationship between CT and slew rate is (the equation below accounts for 10% to 90% measurement on VOUT
and does NOT apply for CT = 0pF. Use table below to determine rise times for when CT = 0pF):
SR = 0.32 ´ CT + 13.7
(1)
Where,
SR = slew rate (in µs/V)
CT = the capacitance value on the CT pin (in pF)
The units for the constant 13.7 is in µs/V.
Rise time can be calculated by multiplying the input voltage by the slew rate. The table below contains rise time
values measured on a typical device. Rise times shown below are only valid for the power-up sequence where
VIN and VBIAS are already in steady state condition, and the ON pin is asserted high.
RISE TIME (µs) 10% - 90%, CL = 0.1µF, CIN = 1µF, RL = 10Ω
TYPICAL VALUES at 25°C, 25V X7R 10% CERAMIC CAP
CTx (pF)
5V
3.3V
1.8V
1.5V
1.2V
1.05V
0.8V
0
124
88
63
60
53
49
42
220
481
323
193
166
143
133
109
470
855
603
348
299
251
228
175
1000
1724
1185
670
570
469
411
342
2200
3328
2240
1308
1088
893
808
650
4700
7459
4950
2820
2429
1920
1748
1411
10000
16059
10835
6040
5055
4230
3770
3033
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
www.ti.com
BOARD LAYOUT AND THERMAL CONSIDERATIONS
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance.
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use the
following equation:
PD(max) =
TJ(max) - TA
QJA
(2)
Where:
PD(max) = maximum allowable power dissipation
TJ(max) = maximum allowable junction temperature (125°C for the TPS22966)
TA = ambient temperature of the device
ΘJA = junction to air thermal impedance. See Thermal Information section. This parameter is highly
dependent upon board layout.
The figure below shows an example of a layout. Notice the thermal vias located under the exposed thermal pad
of the device. This allows for thermal diffusion away from the device.
VOUT1 capacitor
VIN1 capacitor
VIN2 capacitor
CT1 capacitor
Thermal
relief vias
CT2 capacitor
VOUT2 capacitor
18
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SLVSBH4A – JUNE 2012 – REVISED JULY 2012
REVISION HISTORY
Changes from Original (June 2012) to Revision A
Page
•
Updated VBIAS vs. QUIESCENT CURRENT (BOTH CHANNELS) Y-axis Units. .................................................................. 8
•
Updated VBIAS vs. QUIESCENT CURRENT (SINGLE CHANNEL) Y-axis Units. ................................................................. 8
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PACKAGE OPTION ADDENDUM
www.ti.com
9-Jul-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
TPS22966DPUR
ACTIVE
WSON
DPU
14
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS22966DPUT
ACTIVE
WSON
DPU
14
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPS22966DPUR
WSON
DPU
14
3000
180.0
8.4
2.25
3.25
1.05
4.0
8.0
Q1
TPS22966DPUT
WSON
DPU
14
250
180.0
8.4
2.25
3.25
1.05
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS22966DPUR
WSON
DPU
14
3000
210.0
185.0
35.0
TPS22966DPUT
WSON
DPU
14
250
210.0
185.0
35.0
Pack Materials-Page 2
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