AT1005

PHASE CONTROL THYRISTOR
AT1005
Repetitive voltage up to
Mean on-state current
Surge current
1800 V
1450 A
22 kA
FINAL SPECIFICATION
nov 14 - ISSUE : 04
Symbol
Characteristic
Tj
[°C]
Conditions
Value
Unit
BLOCKING
V
RRM
Repetitive peak reverse voltage
125
1800
V
V
RSM
Non-repetitive peak reverse voltage
125
1900
V
V
DRM
Repetitive peak off-state voltage
125
1800
I
RRM
Repetitive peak reverse current
V=VRRM
125
50
mA
I
DRM
Repetitive peak off-state current
V=VDRM
125
50
mA
V
CONDUCTING
I
T (AV)
Mean on-state current
180° sin, 50 Hz, Th=55°C, double side cooled
1450
A
I
T (AV)
Mean on-state current
180° sin, 50 Hz, Tc=85°C, double side cooled
1190
A
I
TSM
Surge on-state current
sine wave, 10 ms
22,4
kA
2509 x1E3
A²s
125
I² t
I² t
without reverse voltage
V
T
On-state voltage
On-state current =
V
T(TO)
Threshold voltage
125
0,92
V
T
On-state slope resistance
125
0,260
mohm
r
2900 A
25
1,75
V
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM up to 1580 A, gate 10V 5ohm
125
200
A/µs
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
125
500
V/µs
td
Gate controlled delay time, typical
VD=100V, gate source 25V, 10 ohm , tr=.5 µs
25
1,1
µs
tq
Circuit commutated turn-off time, typical
dV/dt = 20 V/µs linear up to 75% VDRM
250
µs
Q rr
Reverse recovery charge
di/dt=-20 A/µs, I= 1050 A
I rr
Peak reverse recovery current
VR= 50 V
125
µC
I
H
Holding current, typical
VD=5V, gate open circuit
25
300
mA
I
L
Latching current, typical
VD=5V, tp=30µs
25
700
mA
25
3,5
V
mA
A
GATE
V
GT
Gate trigger voltage
VD=5V
I
GT
Gate trigger current
VD=5V
25
300
V
GD
Non-trigger gate voltage, min.
VD=VDRM
125
0,25
V
V
FGM
Peak gate voltage (forward)
30
V
I
FGM
Peak gate current
10
A
V
RGM
Peak gate voltage (reverse)
P
GM
Peak gate power dissipation
P
G
Average gate power dissipation
R
th(j-h)
Thermal impedance, DC
Junction to heatsink, double side cooled
R
th(c-h)
Thermal impedance
Case to heatsink, double side cooled
T
F
j
Operating junction temperature
Mounting force
Mass
Pulse width 100 µs
5
V
150
W
2
W
MOUNTING
ORDERING INFORMATION : AT1005 S 18
standard specification
VDRM&VRRM/100
26
°C/kW
6
°C/kW
-30 / 125
18.0 / 22.0
500
°C
kN
g
AT1005 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
nov 14 - ISSUE : 04
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
80
30°
60°
70
90°
120°
DC
180°
60
50
0
500
1000
1500
2000
IF(AV) [A]
PF(AV) [W]
3000
2500
180°
DC
120°
90°
2000
60°
30°
1500
1000
500
0
0
500
1000
IF(AV) [A]
1500
2000
AT1005 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
nov 14 - ISSUE : 04
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
30°
80
60°
70
90°
120°
60
180°
50
0
500
1000
1500
2000
IF(AV) [A]
PF(AV) [W]
3000
180°
2500
90°
2000
120°
60°
30°
1500
1000
500
0
0
500
1000
IF(AV) [A]
1500
2000
AT1005 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
nov 14 - ISSUE : 04
ON-STATE CHARACTERISTIC
Tj = 125 °C
SURGE CHARACTERISTIC
Tj = 125 °C
4500
25
4000
20
3000
2500
ITSM [kA]
On-state Current [A]
3500
2000
15
10
1500
1000
5
500
0
0,6
1,1
1,6
2,1
0
1
On-state Voltage [V]
10
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
30,0
Zth j-h [°C/kW]
25,0
20,0
15,0
10,0
5,0
0,0
0,001
0,01
0,1
1
t[s]
10
100
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
Distributed by
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm
and roughness < 2 µm.
In the interest of product improvement POSEICO SpA reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
100