REVISIONS LTR DESCRIPTION A Make changes to notes 2, 3 and add note 4 as specified under paragraph 6.3. Update document paragraphs to current requirements. - ro DATE APPROVED 15-05-14 C. SAFFLE CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV A A PAGE 18 19 REV STATUS OF PAGES REV A A A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA 08-05-13 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 MICROCIRCUIT, LINEAR, BRUSHLESS DC MOTOR CONTROLLER, MONOLITHIC SILICON APPROVED BY ROBERT M. HEBER SIZE CODE IDENT. NO. A REV AMSC N/A TITLE DWG NO. V62/08624 16236 A PAGE 1 OF 19 5962-V054-15 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance brushless DC motor controller microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/08624 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 Circuit function UC2625-EP Brushless DC motor controller 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins X Y 28 28 JEDEC PUB 95 Package style MS-011 MS-013-AE Plastic dual-in-line Plastic surface mount 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator A B C D E Z DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 2 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage (VCC) ................................................................................................................ +20 V Power supply voltage (PWR VCC) ........................................................................................... PWM IN voltage ....................................................................................................................... E/A IN+, E/A IN- voltage .......................................................................................................... ISENSE1, ISENSE2 voltage .................................................................................................... OV-COAST, DIR, SPEED-IN, SSTART, QUAD SEL voltage .................................................. H1, H2, H3 voltage .................................................................................................................. PU output voltage .................................................................................................................... PU output current ..................................................................................................................... PD output current ..................................................................................................................... E/A OUT output current ........................................................................................................... ISENSE output current .............................................................................................................. TACH-OUT output current ....................................................................................................... VREF output current ................................................................................................................. +20 V -0.3 V to 6 V -0.3 V to 12 V -1.3 V to 6 V -0.3 V to 8 V -0.3 V to 12 V -0.3 V to 50 V +200 mA continuous 200 mA continuous 10 mA -10 mA 10 mA -50 mA continuous Operating junction temperature range (TJ) .............................................................................. -55C to +125C Power dissipation (PD) : Case X ................................................................................................................................. Case Y ................................................................................................................................. Storage temperature (TSTG) ...................................................................................................... Thermal resistance, junction to case (JC) : Case X ................................................................................................................................. Case Y ................................................................................................................................. Thermal resistance, junction to ambient (JA) : Case X ................................................................................................................................. Case Y ................................................................................................................................. 1.49 W 1.18 W +150C 25C/W 21.2C/W 67C/W 84.4C/W 1.4 Recommended operating conditions. 3/ Supply voltage (VCC) ............................................................................................................... +12 V Operating free-air temperature range (TA) ............................................................................... -55C to +125C 1/ 2/ 3/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Currents are positive into and negative out of the specified terminal. Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 3 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 – Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201-2107). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Conditions 2/ Test Temperature TA Symbol Device type Limits Min Supply current IS -55C to +125C 01 VCC turn-on threshold voltage VTHON -55C to +125C 01 VCC turn-off threshold voltage VTHOFF -55C to +125C Unit Max 30.0 mA 8.65 9.55 V 01 7.75 8.55 V -55C to +125C 01 1.65 1.85 V OVERVOLTAGE / COAST section OV-COAST inhibit threshold voltage OV-COAST restart threshold voltage OV-COAST hysteresis voltage VITH VRTH TA = +25C -55C to +125C 01 1.535 1.75 V VHYS TA = +25C -55C to +125C 01 0.05 0.155 V IIN TA = +25C -55C to +125C 01 -10 10 A VLTH -55C to +125C 01 0.8 1.25 V VHTH -55C to +125C 01 1.6 2.0 V -55C to +125C 01 -400 -120 A -55C to +125C 01 0.8 3.0 V QSHYS +25C 01 70 typical mV DIR hysteresis voltage DHYS +25C 01 0.6 typical V QUAD SEL input current IINQS +25C 01 -30 150 A DIR input current IINDIR +25C 01 -30 30 A OV-COAST input current LOGIC INPUTS section H1, H2, H3 low threshold voltage H1, H2, H3 high threshold voltage H1, H2, H3 input current QUAD SEL, DIR threshold voltage QUAD SEL hysteresis voltage IINH To 0 V VTH See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 5 TABLE I. Electrical performance characteristics – Continued. 1/ Conditions 2/ Test Temperature TA Symbol Device type Limits Unit Min Max PWM AMP / COMPARATOR section E/A IN+, E/A IN- input current IINE/A To 2.5 V +25C 01 -5.0 5.0 A IINPWM To 2.5 V +25C 01 0 30 A Error amp input offset voltage VINOF 0 V VCOMMON 3 V +25C 01 -10 10 mV Error amp voltage gain AV +25C 01 70 E/A OUT voltage range VR +25C 01 0.25 3.50 0.25 4.55 -16 -5 -17.5 -5 PWM IN input current -55C to +125C S START pull-up current ISSPU To 0 V +25C 01 -55C to +125C S START discharge current ISSD S START restart threshold voltage ISSR To 2.5 V dB V A +25C 01 0.1 3.0 mA +25C 01 0.1 0.3 V CURRENT AMP section Gain A/V ISENSE1 = 0.3 V, ISENSE2 = 0.5 V to 0.7 V +25C 01 1.75 2.15 V/V Level shift voltage VLS ISENSE1 = 0.3 V, ISENSE2 = 0.3 V +25C 01 2.4 2.65 V Peak current threshold voltage VPI ISENSE1 = 0 V, force ISENSE2 +25C 01 0.14 0.26 V Over current threshold voltage VOI ISENSE1 = 0 V, force ISENSE2 +25C 01 0.26 0.36 V ISENSE1, ISENSE2 input current IIIS At 0 V +25C 01 -850 0 A ISENSE1, ISENSE2 offset current IOFIS At 0 V +25C 01 12 A ISENSE1, ISENSE2 voltage range VRIS +25C 01 2 V -1 See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 6 TABLE I. Electrical performance characteristics – Continued. 1/ Conditions 2/ Test Temperature TA Symbol Device type Limits Unit Min Max 4.7 5.3 V 0.2 V 280 s TACHOMETER / BRAKE section TACH-OUT high level voltage VTOH 10 k to 2.5 V -55C to +125C 01 TACH-OUT low level voltage VTOL 10 k to 2.5 V -55C to +125C 01 On time tO +25C 01 170 On time change with temp tO -55C to +125C 01 0.1 % typical RC-BRAKE input current IIN +25C 01 -4.0 Threshold to brake, RC-BRAKE VTHB -55C to +125C 01 0.8 Brake to hysteresis, RC-BRAKE VTHH +25C 01 SPEED-IN threshold voltage VTHS -55C to +125C 01 220 290 mV SPEED-IN input current IINS +25C 01 -30 30 A -55C to +125C 01 2.50 V -55C to +125C 01 2.45 V VOL, 1 mA -55C to +125C 01 0.4 V VOL, 50 mA -55C to +125C 01 0.8 V +25C 01 To 0 V mA 1.2 V 0.09 typical V LOW SIDE DRIVERS section VOH, -1 mA, down from VCC VOH, -50 mA, down from VCC Rise / fall time tr, tf 10 % to 90 % slew time, into 1 nF 50 typical ns See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 7 TABLE I. Electrical performance characteristics – Continued. 1/ Conditions 2/ Test Temperature TA Symbol Device type Limits Min Unit Max HIGH SIDE DRIVERS section VOL, 1 mA -55C to +125C 01 0.4 V VOL, 50 mA -55C to +125C 01 1.8 V 30 A Leakage current IL VOUT = 50 V +25C 01 Fall time tf 10 % to 90 % slew time, 50 mA load +25C 01 +25C 01 50 typical ns OSCILLATOR section Frequency -55C to +125C 40 60 30 80 4.9 5.1 4.7 5.3 kHz REFERENCE section Output voltage VOUT Iref = 0 mA +25C 01 -55C to +125C V Load regulation VRLOAD 0 mA to –20 mA load +25C 01 -40.0 Line regulation VRLINE VCC = 10 V to 18 V +25C 01 -10 10 mV Short circuit current IOS -55C to +125C 01 50 150 mA Output turn on delay +25C 01 1 typical s Output turn off delay +25C 01 1 typical s mV MISCELLANEOUS section 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Unless otherwise specified, PWR-VCC = VCC = 12 V, ROSC = 20 k to VREF, COSC = 2 nF, RTACH = 33 k, CTACH = 10 nF, and all outputs unloaded. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 8 Case X FIGURE 1. Case outlines. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 9 Case X – continued. Dimensions Inches Symbol Millimeters Min Max Min Max A --- .200 --- 5.08 b .015 .021 0.38 0.53 b1 .060 TYP 1.52 TYP c .010 NOM 0.25 NOM D 1.410 e 1.450 35.81 .100 BSC 36.83 2.54 BSC E .520 .560 13.21 14.22 E1 .590 .610 14.99 15.49 L .125 --- 3.18 --- Q .020 --- 0.51 --- n 28 28 NOTES: 1. Controlling dimensions are inch. Millimeter dimensions are given for reference only. 2. Falls within JEDEC MS-011. FIGURE 1. Case outlines – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 10 Case Y FIGURE 1. Case outlines – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 11 Case Y - continued Dimensions Inches Symbol Millimeters Min Max Min Max A --- .104 --- 2.65 A1 .004 .012 0.10 0.30 b .012 .020 0.31 0.51 c .008 .013 0.20 0.33 D .697 .713 17.70 18.10 e .050 BSC 1.27 BSC E .291 .299 7.40 7.60 E1 .393 .419 9.97 10.63 L .016 .050 0.40 1.27 n 28 28 NOTES: 1. Controlling dimensions are inch. Millimeter dimensions are given for reference only. 2. Body dimensions do not include mold flash or protrusion not to exceed .006 inch (0.15 mm). 3. Falls within JEDEC MS-013 variation AE. FIGURE 1. Case outlines – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 12 Device type 01 Case outlines X and Y Terminal number Terminal symbol 1 E/A IN+ 2 VREF 3 ISENSE 4 ISENSE1 5 ISENSE2 6 DIR 7 SPEED IN 8 H1 9 H2 10 H3 11 PWR VCC 12 PDC 13 PDB 14 PDA 15 GND 16 PUC 17 PUB 18 PUA 19 VCC 20 TACH OUT 21 RC BAKE 22 QUAD SEL 23 OV COAST 24 SSTART 25 RC OSC 26 PWM IN 27 E/A OUT 28 E/A IN- FIGURE 2. Terminal connections. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 13 Terminal symbol I/O Description DIR, SPEEDIN The position decoder logic translates the Hall signals and the DIR signal to the correct driver signals (PUs and PDs). To prevent output stage damage, the signal on DIR is first loaded into a direction latch, then shifted through a two bit register. As long as SPEED-IN is less than 250 mV, the direction latch is transparent. When SPEED-IN is higher than 250 mV, the direction latch inhibits all changes indirection. SPEED-IN can be connected to TACH OUT through a filter, so that the direction latch is only transparent when the motor is spinning slowly, and has too little stored energy to damage power devices. Additional circuitry detects when the input and output of the direction latch are different, or when the input and output of the shift register are different, and inhibits all output drives during that time. This can be used to allow the motor to coast to a safe speed before reversing. The shift register ensures that direction can not be changed instantaneously. The register is clocked by the PWM oscillator, so the delay between direction changes is always going to be between one and two oscillator periods. At 40 kHz, this corresponds to a delay of between 25 s and 50 s. Regardless of output stage, 25 s deadtime should be adequate to ensure no overlap cross conduction. Toggling DIR causes an output pulse on TACH OUT regardless of motor speed. E/A IN(+), E/A IN(-), E/A OUT, PWM IN E/A IN(+) and E/A(-) are not internally committed to allow for a wide variety of uses. They can be connected to the ISENSE, TACH OUT through a filter, to an external command voltage, to a D/A converter for computer control, or to another op amp for more elegant feedback loops. The error amplifier is compensated for unity gain stability, so E/A OUT can be tied to E/A IN(-) for feedback and major loop compensation. E/A OUT and PWM IN drive the PWM comparator. For voltage mode PWM systems. PWM IN can be connected to RC-OSC. The PWM comparator clears the PWM latch, commanding the outputs to chop. The error amplifier can be biased off by connecting E/A IN(-) to a higher voltage than E/A IN(+). When biased off, E/A OUT appears to the application as a resistor to ground. E/A OUT can then be driven by an external amplifier. GND All thresholds and outputs are referred to the GND pin except for the PD and PU outputs. FIGURE 2. Terminal connections – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 14 Terminal symbol I/O Description H1, H2, H3 The three shaft position sensor inputs consists of hysteresis comparators with input pullup resistors. Logic thresholds meet TTL specifications and can be driven by 5 V CMOS, 12 V CMOS, NMOS, or open collectors. Connect these inputs to motor shaft position sensors that are positioned 120 electrical degrees apart. If noisy signals are expected, zener clamp and filter these inputs with 6 V zeners and an RC filter. Suggested filtering components are 1 k and 2 nF. Edge skew in the filter is not a problem, because sensors normally generate modified gray code with only one output changing at a time, but rise and fall times must be shorter than 20 s for the correct tachometer operation. Motors with 60 electrical degree position sensor coding can be used if one or two of the position sensor signals is inverted. ISENSE1, ISENSE2, ISENSE3 The current sense amplifier has a fixed gain of approximately two. It also has a built in level shift of approximately 2.5 V. The signal appearing on ISENSE is: ISENSE = 2.5 V + (2 x ABS ( ISENSE1 – ISENSE2 )). ISENSE1 and SENSE2 are interchangeable and can be used as differential inputs. The differential signal applied can be as high as 0.5 V before saturation. If spikes are expected on ISENSE or ISENSE2, they are best filtered by a capacitor from ISENSE to ground. Filtering this way allows first signal inversions to be correctly processed by the absolute value circuit. The peak current comparator allows the PWM to enter a current limit mode with current in the windings never exceeding approximately 0.2 V / RSENSE. The over current comparator provides a fail safe shutdown in the unlikely case of current exceeding 0.3 V / RSENSE. Then, softstart is commanded, and all outputs are turned off until high current condition is removed. It is often essential to use some filter driving ISENSE1 and ISENSE2 to reject extreme spikes and to control slew rate. Reasonable starting values for filter components might be 250 series resistors and a 5 nF capacitor between ISENSE1 and ISENSE2. Input resistors should be kept small and matched to maintain gain accuracy. OV COAST This input can be used as an over voltage shut down input as a coast input, or both. This input can be driven by TTL, 5 V CMOS, or 12 V CMOS. PDA, PDB, PDC These outputs can drive the gates of N channel power MOSFETs directly or they can drive the bases of power darlingtons if some form of current limiting is used. They are meant to drive low side power devices in high current output stages. Current available from these pins can peak as high as 0.5 A. These outputs feature a true totem pole output stage. Beware of exceeding device power dissipation limits when using these outputs for high continuous currents. These outputs pull high to turn a “low side” device on active high. PUA, PUB, PUC These outputs are open collector, high voltage drivers that are meant to drive high side power devices in high current output stages. These are active low outputs, meaning that these outputs pull low to command a high side device on. These outputs can drive low voltage PNP darlingtons and P channel MOSFETs directly, and can drive any voltage device using external change pump techniques, transformer signal coupling, cascade level shift transistors, or opto isolated drive (high speed opto devices are recommended). FIGURE 2. Terminal connections – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 15 Terminal symbol I/O Description PWR VCC This supply pin carries the current sourced by the PD outputs. When connecting PD outputs directly to the bases of power darlingtons, the PWR VCC pin can be current limited with a resistor. Darlington outputs can also be “Baker Clamped” with diodes from collectors back to PWR VCC. QUAD SEL The device can chop power devices in their two modes, referred to as “two quadrant” (quad sel low) and “four quadrant” (quad sel high). When two quadrant chopping, the pulldown power devices are chopped by the output of the PWM latch while the pullup drivers remain on. The load chops into one communication diode, and except for back-EMF, will exhibit slow discharge current and faster charge current. Two quadrant chopping can be more efficient than four quadrant. When four quadrant chopping, all power drivers are chopped by the PWM latch, causing the load current to flow into two diodes during chopping. This mode exhibits better control of load current when current is low, and is preferred in servo systems for equal control over acceleration and deceleration. The QUAD SEL input has no effect on operation during braking. Each time the TACH OUT pulses, the capacitor tied to RC BRAKE discharges from approximately 3.33 V down to 1.67 V through a resistor. The tachometer pulse with is approximately T = 0.67 RT CT, where RT and CT are resistor and capacitor from RC BRAKE to ground. Recommended values for RT are 10 k to RC BRAKE RC OSC 500 k, and recommended values for CT are 1 nF to 100 nF, allowing times between 5 s and 10 ms. Best accuracy and stability are achieved with values in the centers of those ranges. RC BRAKE also has another function. If RC BRAKE pin is pulled below the brake threshold, the device enters brake mode. This mode consists of turning off all three high side devices, enabling all three low side devices, and disabling the tachometer. The only things that inhibit low side device operation in braking are low supply, exceeding peak current, OV COAST command, and the PWM comparator signal. The last of these means that if current sense is implemented such that the signal in the current sense amplifier is proportional to braking current, the low side devices will brake the motor the current control. Simpler current sense connections result in uncontrolled braking and potential damage to the power devices. The RC OSC pin sets oscillator frequency by means of timing resistor ROSC from the RC OSC pin to VREF and capacitor COSC from RC OSC to ground. Resistors 10 k to 100 k and capacitors 1 nF to 100 nF works the best, but frequency should always be below 500 kHz. Oscillator frequency is approximately: F = 2 / (ROSC x COSC ). Additional components can be added to this device to cause it to operate as a fixed off time PWM rather than a fixed frequency PWM, using the RC OSC pin to select the monostable time constant. The voltage on the RC OSC pin is normally a ramp a about 1.2 V peak to peak, centered at approximately 1.6 V. This ramp can be used for voltage mode PWM control, or can be used for slope compensation in current mode control. FIGURE 2. Terminal connections – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 16 Terminal symbol I/O Description SSTART Ant time that VCC drops below threshold or the sensed current exceeds the over current threshold, the soft start latch is set. When set, it turns on a transistor that pulls down on SSTART. Normally, a capacitor is connected to this pin, and the transistor will completely discharge the capacitor. A comparator senses when the NPN transistor has completely discharged the capacitor, and allows the soft start latch to clear when the fault is removed. When the fault is removed, the soft start capacitor charges from the on chip current source. SSTART clamps the output of the error amplifier, not allowing the error amplifier output voltage to exceed SSTART regardless of input. The ramp on RC OSC can be applied to PWM and compared to E/A OUT. With SSTART discharged below 0.2 V and the ramp minimum being approximately 1.0 V, the PWM keeps the PWM latch cleared and the outputs off. As SSTART rises, the PWM comparator begins to duty cycle modulate the PWM latch until the error amplifier inputs overcome the clamp. This provides for a safe and orderly motor start up from an off or fault condition. A 51 k resistor is added between VREF and SSTART to ensure switching. TACH OUT Any change in the H1, H2, or H3 inputs loads data from these inputs into the position sensor latches. At the same time data is loaded, a fixed width 5 V is triggered on TACH OUT. The average value of the voltage on TACH OUT is directly proportional to speed, so this output can be used as true tachometer for speed feedback with an external filter or averaging circuit which usually consists of a resistor and capacitor. Whenever TACH OUT is high, the position latches are inhibited, such that during the noisiest part of the commutation cycle, additional communications are not possible. Although this effectively sets a maximum rotational speed, the maximum speed can set above the highest expected speed, preventing false commutation and chatter. VCC This device operates with supplies between 10 V and 18 V. Under voltage lockout keeps all outputs off below 7.5 V, insuring that the output transistors never turn on until full drive capability is available. Bypass VCC to ground with an 0.1 F ceramic capacitor. Using a 10 F electrolytic bypass capacitor as well can be beneficial in applications with high supply impedance. VREF This pin provides regulated 5 V driving Hall effect devices and speed control circuitry. VREF reaches 5 V before VCC enables, ensuring that the Hall effect devices powered from VREF becomes active before the UC3625 drives any output. For proper performance VREF should be bypassed with at least 0.1 F capacitor to ground. FIGURE 2. Terminal connections – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 17 FIGURE 3. Block diagram. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 18 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ 2/ 3/ Device manufacturer CAGE code Top side marking Vendor part number V62/08624-01XE 01295 4/ UC2625EP UC2625MNEP V62/08624-01YE 01295 UC2625EP UC2625MDWREP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ For the most current package and ordering information, see the package option addendum at the end of the manufacturer’s data sheet. 3/ Package drawings, thermal data, and symbolization are available from the manufacturer. 4/ This device has an end of life date of October 08, 2015. CAGE code 01295 DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Source of supply Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/08624 PAGE 19