STMICROELECTRONICS VNQ500PEP

VNQ500PEP
®
QUAD CHANNEL HIGH SIDE DRIVER
TARGET SPECIFICATION
TYPE
VNQ500PEP
RDS(on)
500 mΩ
IOUT
0.35 A
VCC
36V
CMOS COMPATIBLE I/O’s
CHIP ENABLE
■ JUNCTION OVERTEMPERATURE
PROTECTION
■ CURRENT LIMITATION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■
■
DESCRIPTION
The VNQ500PEP is a monolithic device designed
in STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active current limitation combined with latched
thermal shutdown, protect the device against
overload.
Device automatically turns off in case of ground
pin disconnection.
PowerSSO-12
ORDER CODES
PACKAGE
TUBE
T&R
PowerSSO-12 VNQ500PEP VNQ500PEP13TR
APPLICATION
■ Relay Driver
■ LED Driver
ABSOLUTE MAXIMUM RATING
Symbol
VCC
-VCC
- IGND
IOUT
- IOUT
IIN
VESD
Tj
Tstg
Parameter
DC Supply voltage
Reverse supply voltage
DC Ground pin reverse current
DC Output current
Reverse DC output current
DC Input current
Electrostatic discharge (R=1.5KΩ; C=100pF)
- I/On
- OUTn & Vcc
Junction operating temperature
Storage temperature
October 2003 - Revision 1.3 (Working document)
Value
41
-0.3
- 250
Internally Limited
-1
+/- 10
Unit
V
V
mA
A
A
mA
4000
V
5000
V
Internally Limited
- 55 to 150
°C
°C
1/11
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
VNQ500PEP
BLOCK DIAGRAM
VCC
UNDERVOLTAGE
DETECTION
VCC
CLAMP
CE
GND
I/O 1
CLAMP POWER
OUTPUT 1
I/O 2
LOGIC
OUTPUT 2
I/O 3
CURRENT LIMITER
OUTPUT 3
I/O 4
JUNCTION TEMP.
DETECTION
OUTPUT 4
Same structure for all
channels
PIN DEFINITIONS AND FUNCTIONS
Pin No
TAB
7,12
1
2
3
4
5
6
8
9
10
11
2/11
1
Symbol
VCC
VCC
GND
CE
I/O 1
I/O 2
I/O 3
I/O 4
OUTPUT 4
OUTPUT 3
OUTPUT 2
OUTPUT 1
Function
Positive power supply voltage
Positive power supply voltage
Logic ground
Chip Enable
Input/Output of channel 1
Input/Output of channel 2
Input/Output of channel 3
Input/Output of channel 4
High-Side output of channel 4
High-Side output of channel 3
High-Side output of channel 2
High-Side output of channel 1
VNQ500PEP
CONNECTION DIAGRAM (TOP VIEW)
GND
CE
I/O1
I/O2
I/O3
I/O4
1
2
3
4
5
6
12
11
10
9
8
7
Vcc
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
Vcc
TAB = Vcc
CURRENT AND VOLTAGE CONVENTIONS
ICC
VCC
IINn
I/On
IOUTn
OUTPUTn
VOUTn
ICE
VCC
CE
GND
VINn
VCE
IGND
3/11
VNQ500PEP
THERMAL DATA
Symbol
Rthj-case
Parameter
Thermal resistance junction-case
Rthj-amb
Thermal resistance junction-ambient (*)
Max
Max
Value
4.6
Unit
°C/W
60
°C/W
(*) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35µ thick) connected to all TAB pins.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified)
POWER
Symbol
VCC(**)
VUSD(**)
VOV (**)
RON
IS
Parameter
Operating supply voltage
Undervoltage shut-down
Overvoltage shutdown
On state resistance
Supply current
ILGND(**)
Output current at turn-off
IL(off)(**)
Off state output current
ILoff2(**)
Off state output current
Test Conditions
Min
5.5
3
36
Typ
13
4
Max
36
5.5
IOUTn=0.25A; Tj=25°C
500
Unit
V
V
V
mΩ
IOUTn=0.25A
1000
mΩ
VCE=VI/On=0V; VCC=13V; Tcase=25°C
20
µA
On state (all channels ON); VCC=13V
8
mA
1
mA
5
µA
1
µA
Max
Unit
µs
µs
VCC=VCE=VI/On=VGND=13V
VOUTn=0V
VI/On=VOUTn=0V
VI/On=0V, VOUTn=0V, VCC=13V;
Tcase=25°C
0
(**) Per channel
SWITCHING (VCC=13V)
Symbol
ton
toff
dVOUT/
dt(on)
dVOUT/
dt(off)
Parameter
Turn-on time
Turn-off time
Turn-on voltage slope
Turn-off voltage slope
Test Conditions
RL=52Ω from 80% VOUT (*)
RL=52Ω to 10% VOUT (*)
RL=52Ω from VOUT=1.3V to
VOUT=10.4V (*)
RL=52Ω from VOUT=11.7V to
VOUT=1.3V (*)
Min
Typ
50
75
0.3
V/µs
0.3
V/µs
(*) see fig.1a :switching time waveforms
INPUT & CE PINS
Symbol
VINL
IINL
VINH
IINH
VI(hyst)
Parameter
I/O low level
Low level I/O current
I/O high level
High level I/O current
I/O hysteresis voltage
Test Conditions
VIN=1.25V
Min
Typ
1
3.25
VIN=3.25V
IIN=1mA
VICL
I/O clamp voltage
VOL
I/O low level default detecIIN=1mA, latched thermal shutdown
tion
IIN=-1mA
Max
1.25
10
0.5
6
6.8
8
-0.7
Unit
V
µA
V
µA
V
V
V
0.5
V
4/11
1
VNQ500PEP
ELECTRICAL CHARACTERISTICS (continued)
PROTECTIONS
Symbol
TTSD
Ilim
Vdemag
treset
Parameter
Junction shut-down
temperature
DC Short circuit current
Turn-off output clamp
voltage
Thermal latch reset time
Test Conditions
VCC=13V; RLOAD=10mΩ
IOUT=0.25 A; L=20mH
Tj < TTSD (see figure 3 in waveforms)
Min
Typ
Max
Unit
150
175
200
°C
0.7
A
0.35
VCC-41 VCC-48 VCC-55
10
V
µs
5/11
2
VNQ500PEP
Switching Time Waveforms
Fig. 1a : Turn-on & Turn-off
ton
toff
VIN
t
VOUT
90%
80%
dVOUT/dt(on)
dVOUT/dt(off)
tr
10%
tf
t
Driving circuit
MCOUTn
MCU
6/11
R
I/On
OUTPUTn
VNQ500PEP
VNQ500PEP
TRUTH TABLE
CONDITIONS
MCOUTn
L
H
L
H
L
H
L
H
X
Normal operation
Current limitation
Overtemperature
Undervoltage
Stand-by
CE
H
H
H
H
H
H
H
H
L
I/On
L
H
L
H
L
L (latched)
L
H
X
OUTPUTn
L
H
L
H
L
L
L
L
L
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
I
II
TEST LEVELS
III
IV
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
7/11
VNQ500PEP
APPLICATION SCHEMATIC
+5V
VCC
Rprot
CE
Dld
µC
Rprot
I/0n
OUTPUT
GND
VGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the of
the device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggest to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
8/11
1
RGND
DGND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
VNQ500PEP
Waveforms
1) NORMAL OPERATION
CE
MCOUTn
I/On
VOUTn
2) UNDERVOLTAGE
CE
VUSDhyst
VCC
VUSD
MCOUTn
I/On
VOUTn
3) SHORTED LOAD OPERATION
treset
CE
TTSD
Tjn
MCOUTn
VOL
I/On
IOUTn
9/11
VNQ500PEP
PowerSSO-12TM MECHANICAL DATA
A
1.250
A1
0.000
A2
1.100
B
0.230
C
0.190
D
4.800
E
3.800
TYP
1.620
1.650
0.410
0.250
0.400
k
0º
X
1.900
IN
0.250
L
IM
h
3.600
PR
EL
10/11
5.000
4.000
0.800
5.800
ddd
MAX.
0.100
e
H
Y
RY
mm.
MIN.
A
DIM.
6.200
0.500
1.270
8º
2.500
4.200
0.100
VNQ500PEP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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11/11