IRFBC40LC, SiHFBC40LC Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • • • • • • • 600 V RDS(on) (Ω) VGS = 10 V 1.2 Qg (Max.) (nC) 39 Qgs (nC) 10 Qgd (nC) 19 Configuration Single D Available RoHS* COMPLIANT DESCRIPTION TO-220 This new series of low charge Power MOSFETs achieve significantly lower gate charge over conventional Power MOSFETs. Utilizing the new LCDMOS technology, the device improvements are achieved without added product cost, allowing for reduced gate drive requirements and total system savings. In addition reduced switching losses and improved efficiency are achievable in a variety of high frequency applications. Frequencies of a few MHz at high current are possible using the new low charge Power MOSFETs. These device improvements combined with the proven ruggedness and reliability that are characteristic of Power MOSFETs offer the designer a new standard in power transistors for switching applications. G S G Ultra Low Gate Charge Reduced Gate Drive Requirement Enhanced 30 V, VGS Rating Reduced Ciss, Coss, Crss Extremely High Frequency Operation Repetitive Avalanche Rated Lead (Pb)-free Available D S N-Channel MOSFET ORDERING INFORMATION Package TO-220 IRFBC40LCPbF SiHFBC40LC-E3 IRFBC40LC SiHFBC40LC Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL LIMIT UNIT VGS ± 30 6.2 3.9 25 1.0 530 6.2 13 125 3.0 - 55 to + 150 300d 10 1.1 V ID IDM TC = 25 °C for 10 s 6-32 or M3 screw EAS IAR EAR PD dV/dt TJ, Tstg A W/°C mJ A mJ W V/ns °C lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 25 mH, RG = 25 Ω, IAS = 6.2 A (see fig. 12). c. ISD ≤ 6.2 A, dI/dt ≤ 80 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91114 S-81567-Rev. A, 28-Jul-08 www.vishay.com 1 IRFBC40LC, SiHFBC40LC Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS VGS = 0 V, ID = 250 µA 600 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 600 V, VGS = 0 V - - 100 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 500 Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID = 3.7 Ab VGS = 10 V VDS = 100 V, ID = 3.7 Ab µA - - 1.2 Ω 3.7 - - S - 1100 - - 140 - - 15 - - - 39 Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs - - 10 Gate-Drain Charge Qgd - - 19 Turn-On Delay Time td(on) - 12 - tr - 20 - - 27 - - 17 - - 4.5 - Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance td(off) VGS = 0 V VDS = 25 V f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 6.2 A, VDS = 360 V, see fig. 6 and 13b VDD = 300 V, ID = 6.2 A RG = 9.1 Ω, RD = 47 Ω, see fig. 10b tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D pF nC ns nH G - 7.5 - - - 6.2 S - - 25 Vb - - 1.5 V - 440 680 ns - 2.1 3.2 µC S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 6.2 A, VGS = 0 TJ = 25 °C, IF = 6.2 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91114 S-81567-Rev. A, 28-Jul-08 IRFBC40LC, SiHFBC40LC Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 101 4.5 V 10-1 ID, Drain Current (A) ID, Drain Current (A) 101 25 °C 100 20 µs Pulse Width TC = 25 °C 10-2 10-2 10-1 100 101 4 4.5 V 10-1 10-2 10-2 91114_02 20 µs Pulse Width TC = 150 °C 10-1 100 101 102 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 150 °C Document Number: 91114 S-81567-Rev. A, 28-Jul-08 6 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) 100 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 5 VGS, Gate-to-Source Voltage (V) 91114_03 Fig. 1 - Typical Output Characteristics, TC = 25 °C 101 20 µs Pulse Width VDS = 100 V 10-1 102 VDS, Drain-to-Source Voltage (V) 91114_01 150 °C 91114_04 3.5 3.0 ID = 6.2 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRFBC40LC, SiHFBC40LC 2400 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Capacitance (pF) 2000 1600 Ciss 1200 Coss 800 Crss 400 ISD, Reverse Drain Current (A) Vishay Siliconix 101 25 °C 0 101 0.6 VDS, Drain-to-Source Voltage (V) 91114_05 Operation in this area limited by RDS(on) 5 2 VDS = 300 V 102 ID, Drain Current (A) VDS = 240 V VDS = 180 V 8 5 10 µs 2 10 100 µs 5 2 1 ms 1 10 ms 5 2 0.1 4 TC = 25 °C TJ = 150 °C Single Pulse 5 For test circuit see figure 13 0 0 91114_06 8 16 24 32 Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 2 10-2 0.1 40 QG, Total Gate Charge (nC) 1.4 1.2 VSD, Source-to-Drain Voltage (V) 103 16 1.0 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 5.2 A 12 0.8 91114_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage VGS, Gate-to-Source Voltage (V) VGS = 0 V 100 100 20 150 °C 91114_08 2 5 1 2 5 10 2 5 102 2 5 103 2 5 104 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91114 S-81567-Rev. A, 28-Jul-08 IRFBC40LC, SiHFBC40LC Vishay Siliconix RD VDS VGS D.U.T. RG + - VDD 7.0 10 V ID, Drain Current (A) 6.0 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 5.0 Fig. 10a - Switching Time Test Circuit 4.0 3.0 VDS 2.0 90 % 1.0 0.0 25 50 75 100 125 10 % VGS 150 TC, Case Temperature (°C) 91114_09 td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 0 − 0.5 PDM 0.2 0.1 0.1 t1 0.05 t2 0.02 0.01 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC Single Pulse (Thermal Response) 10-2 10-5 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) 91114_11 Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T. RG + - IAS V DD VDS 10 V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91114 S-81567-Rev. A, 28-Jul-08 IAS Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRFBC40LC, SiHFBC40LC Vishay Siliconix EAS, Single Pulse Energy (mJ) 1200 ID 2.8 A 3.9 A Bottom 5.2 A Top 1000 800 600 400 200 0 VDD = 50 V 25 91114_12c 50 75 100 150 125 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91114 S-81567-Rev. A, 28-Jul-08 IRFBC40LC, SiHFBC40LC Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - • • • • RG dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Body diode VDD forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 -For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91114. Document Number: 91114 S-81567-Rev. A, 28-Jul-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1