TI TPS60150

TPS60150
www.ti.com ........................................................................................................................................................................................... SLVS888 – DECEMBER 2008
TPS60150 5V/140mA Charge Pump Device
FEATURES
1
•
•
•
•
•
•
•
DESCRIPTION
2.7V to 5.5V Input Voltage Range
Fixed Output Voltage of 5.0V
X2 Charge Pump
1.5 MHz Switching Frequency
Maximum Output Current : 140mA
2X2 QFN With 0.8mm Height
Typical 90µA Quiescent Current at no Load
Condition (Skip mode)
Hardware En/Disable Function
Built-in Soft Start
Built-in Under Voltage Lock Out Protection
Thermal and Over Current Protection
•
•
•
•
The TPS60150 is a switched capacitor voltage
converter which produces a regulated, low noise, and
low-ripple output voltage (5V) from an unregulated
input voltage.
The 5V output can supply a minimum of 140mA
current with a small 2X2 QFN package.
TPS60150 operates in skip mode when the load
current falls below 8mA under typical condition. In
skip mode operation, quiescent current is reduced to
90µA.
Only 3-external capacitors are needed to generate
the output voltage, therefore saving PCB space.
Inrush current is limited by the soft start function
during power on and power transient states.
APPLICATIONS
•
•
•
•
•
•
USB OTG
Portable Communication Devices
Personal Digital Assistance
PCMCIA Cards
Cellular Phones
Handheld Meters
VIN
VOUT
(5 V)
GND
ENA
VIN
CP-
VOUT
C3
2.2 mF
ENABLE
/ DISABLE
C2
1 mF
CP+
C1
2.2 mF
Figure 1. Typical Application Circuit
ORDERING INFORMATION
TA
PART
NUMBER (1)
OUTPUT
VOLTAGE
PACKAGE (2)
PACKAGE
DESIGNATOR
ORDERING
PKG MARKING
–40°C to 85°C
TPS60150
5.0V
SON 2x2-6
DRV
TPS60150DRV
CGO
(1)
(2)
The DRV (2-mm x 2-mm 6-terminal SON) package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel
and T suffix to order quantities with 250 parts per reel.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
TPS60150
SLVS888 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
VI
Input voltage range (all pins)
HBM ESD Rating
(2)
CDM ESD Rating (3)
MM ESD Rating
(4)
TA
Operating temperature range
TJ
Maximum operating junction temperature
Tst
Storage temperature
(1)
(2)
(3)
(4)
V
2
kV
500
V
200
V
–40 to 85
°C
150
°C
–55 to 150
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The Human body model (HBM) is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The testing is done according
JEDECs EIA/JESD22-A114.
Charged Device Model
Machine Model (MM) is a 200pF capacitor discharged through a 500nH inductor with no series resistor into each pin. The testing is
done according JEDECs EIA/JESD22-A115.
DISSIPATION RATINGS (1)
(1)
(2)
UNIT
–0.3 to 7
(2)
PACKAGE
THERMAL RESISTANCE
RΘJA
TA = 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
POWER RATING
Low-K(1) DRV
140°C/W
715 mW
7.1 mW/°C
285 mW
High-K(2) DRV
65°C/W
1540 mW
15.4 mW/°C
615 mW
The JEDEC low-K (1s) board used to derive this data was a 3inx3in, two-layer board with 2-ounce copper traces on top of the board.
The JEDEC high-K (2s2p) board used to derive this data was a 3inx3in, multilayer board with 1-ounce internal power and ground planes
and 2-ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
VIN
Input voltage range
2.7
5.5
V
TA
Operating ambient temperature
TJ
Operating junction temperature
–40
85
°C
–40
125
Cin
Input capacitor
2.2
µF
Co
Output capacitor
2.2
µF
Cf
Flying capacitor
1.0
µF
°C
ELECTRICAL CHARACTERISTICS
VIN=3.6V, TA = –40°C to 85°C, typical values are at TA = 25°C, C1 = C3 = 2.2µF, C2 = 1.0µF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER STAGE
VIN
Input voltage range
VUVLO
Undervoltage lockout threshold
IQ
Operating quiescent current
IOUT = 140 mA, Enable = VIN
4.7
mA
IQskip
Skip mode operating quiescent
current
IOUT = 0 mA, Enable=VIN (No switching)
80
µA
IOUT = 0 mA, Enable = VIN(Minimum switching)
90
µA
ISD
Shut down current
2.7 V ≤ VIN ≤ 5.5 V, Enable = 0 V
1
µA
VOUT
Output voltage (1)
IOUT ≤ 50 mA, 2.7 V ≤ VIN < 5.5V
4.8
5.0
5.2
V
IOUT ≤ 140 mA, 3.1 V ≤ VIN ≤ 5.5 V
4.8
5.0
5.2
V
VOUT(skip)
(1)
2
Skip mode output voltage
2.7
5.5
1.9
IOUT = 0 mA, 2.7 V ≤ VIN ≤ 5.5 V
VOUT+0.15
V
2.1
V
When in skip mode, Output voltage can exceed VOUT spec because VOUT(skip)=VOUT+0.15.
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ELECTRICAL CHARACTERISTICS (continued)
VIN=3.6V, TA = –40°C to 85°C, typical values are at TA = 25°C, C1 = C3 = 2.2µF, C2 = 1.0µF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
FSW
Switching frequency
SSTIME
Soft-start time
MIN
TYP
From the rising edge of enable to 90% output
MAX
UNIT
1.5
MHz
150
µs
OUTPUT CURRENT
IOUT_nom
Maximum output current
VOUT remains between 4.8 V and 5.2 V,
3.1 V ≤ VIN ≤ 5.5 V
140
mA
IOUT_short
Short circuit current (2)
VOUT = 0 V
80
mA
IOUT = 140 mA
30
mV
RIPPLE VOLTAGE
VR
Output ripple voltage
ENABLE CONTROL
VHI
Logic high input voltage
VLI
Logic low input voltage
IHI
ILI
2.7 V ≤ VIN ≤ 5.5 V
1.3
VIN
–0.2
0.4
V
V
Logic high input current
1
µA
Logic low input current
1
µA
THERMAL SHUTDOWN
TSD
Shutdown temperature
160
°C
TRC
Shutdown recovery
140
°C
(2)
TPS60150 has internal protection circuit to protect IC when VOUT shorted to GND.
EN
VOUT
t
5.0V
4.5V
4.2V
VOUT
t
Maximum
output current
capability
IOUT_Max
Output current
Output
Short circuit current
80mA(typ)
t0
t1
t2
Soft Start
t
VOUT is shorted to GND
Figure 2. Maximum Output Current Capability and Short Circuit protection
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TPS60150
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DEVICE INFORMATION
PIN ASSIGNMENTS (TOP VIEW)
QFN (2x2)
(TOP VIEW)
GND
ENA
VIN
CP-
VOUT
CP+
PIN FUNCTIONS
PIN
NAME
I/O
DESCRIPTION
NO.
GND
1
–
Ground
VIN
2
I
Supply voltage input
VOUT
3
O
Output, Connect to the output capacitor
CP+
4
–
Connect to the flying capacitor
CP–
5
–
Connect to the flying capacitor
ENA
6
I
Hardware Enable/Disable Pin (High = Enable)
FUNCTIONAL BLOCK DIAGRAM
CF
CPTPS60150
VIN
CP+
5
4
2
TSD
UVLO
Regulation
Current Limit
Soft Start
Φ1
Φ2
Φ1
VREF
Bias circuit
Φ2
VOUT
3
ErrorAmp
R1
+
Control
ENA
6
Enable IC
R2
OSC
1.5 MHz
+
Skip Comp
1
GND
Figure 3. Functional Block Diagram
4
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TYPICAL CHARACTERISTICS
Table of Graphs
TITLE
DESCRIPTION
FIGURE
Load Regulation Curve
Output voltage vs output current, VIN = Variable, IOUT = Sweep,
Temperature = 25°C
Figure 4
Line Regulation Curve
Output voltage vs input voltage, VIN = Sweep, IOUT = Variable,
Temperature = 25°C
Figure 5
Efficiency Curve
Efficiency vs input voltage, VIN = Sweep, IOUT = Variable,
Temperature = 25°C
Figure 6
Quiescent Current Curve
Quiescent current vs input voltage, VIN = Sweep, IOUT = 0,
Temperature = Variable
Figure 7
Maximum Output Current Curve
Maximum output current vs input voltage, VIN = Sweep,
Temperature = Variable
Figure 8
Load Transient Curve
Output voltage vs load current
Figure 9
Figure 10
Figure 11
Output ripple voltage (Skip mode)
Figure 12
Output Ripple
Figure 13
Output ripple voltage (Normal mode)
Figure 14
Figure 15
Power ON
Power on start up
Enable / Disable
Soft start when enable
TSD Operation
VIN = 5.5V, RLOAD = 20Ω
Figure 16
Figure 17
Figure 18
Figure 19
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
5.10
5.25
TA = 25°C
TA = 25°C
5.2
5.05
10 mA
VO - Output Voltage - V
VO - Output Voltage - V
5.15
5.1
5.05
3.6 V
4.2 V
5V
5.5 V
5
4.95
50 mA
5.00
150 mA
4.95
120 mA
4.90
100 mA
4.85
4.9
2.7 V
4.85
0
0.05
0.1
0.15
IO - Output Current - A
0.2
4.80
2.7
Figure 4.
3.2
3.7
4.2
4.7
VI - Input Voltage - V
5.2
Figure 5.
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EFFICIENCY
vs
INPUT VOLTAGE
QUIESCENT CURRENT
vs
INPUT VOLTAGE
120
100
TA = 25°C
150 mA
80
Efficiency - %
70
No load
No Switching
110
120 mA
50 mA
Input Current - µA
90
100 mA
60
10 mA
50
40
100
-85°C
90
80
30
-40°C
25°C
20
70
10
0
2.7
3.2
3.7
4.2
4.7
VI - Input Voltage - V
60
2.7
5.2
4.2
3.7
4.7
VI - Input Voltage - V
3.2
Figure 6.
5.2
Figure 7.
MAXIMUM OUTPUT CURRENT
vs
INPUT VOLTAGE AT TEMPERATURE
0.3
TA = -40°C
IO - Max Output Current - A
0.25
0.2
TA = 25°C
TA = 85°C
0.15
0.1
0.05
0
2.7
3.2
3.7
4.2
4.7
VI - Input Voltage - V
5.2
Figure 8.
6
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LOAD TRANSIENT RESPONSE
VIN = 2.7 V, Io = 30 mA to 50 mA
LOAD TRANSIENT RESPONSE
VIN = 3.6 V, Io = 60 mA to 100 mA
20 ms/div
20 ms/div
Figure 9.
Figure 10.
OUTPUT RIPPLE VOLTAGE (SKIP MODE)
VIN = 2.7 V, Io = 0 mA
OUTPUT RIPPLE VOLTAGE (SKIP MODE)
VIN = 3.6 V, Io = 0 mA
5 ms/div
5 ms/div
Figure 11.
Figure 12.
OUTPUT RIPPLE VOLTAGE (NORMAL MODE)
VIN = 2.7 V, Io = 50 mA
OUTPUT RIPPLE (NORMAL MODE)
VIN = 3.6 V, Io = 100 mA
500 ns/div
500 ns/div
Figure 13.
Figure 14.
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POWER ON
VIN = 2.7 V, Io = 50 mA
POWER ON
VIN = 3.6 V, Io = 100 mA
1 ms/div
1 ms/div
Figure 15.
Figure 16.
ENABLE / DISABLE
VIN = 2.7 V, Io = 50 mA
ENABLE / DISABLE
VIN = 3.6 V, Io = 100 mA
200 ms/div
200 ms/div
Figure 17.
Figure 18.
THERMAL SHUT DOWN OPERATION
VIN = 5.5 V, RLOAD=20Ω
50 ms/div
Figure 19.
8
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APPLICATION INFORMATION
APPLICATION OVERVIEW
Most of today’s battery-powered portable electronics allow and/or require data transfer with a PC. One of the
fastest data transfer protocols is via USB On the Go (OTG). As Figure 20 shows, the USB OTG circuitry in the
portable device requires a 5-V power rail and up to 140mA of current. The TPS60150 may be utilized to provide
a 5-V power rail in a battery powered system.
Alternatively, low-cost portable electronics with small LCD displays require a low-cost solution for providing the
WLED backlight. As shown in Figure 21, the TPS60150 can also be used to drive several WLEDs in parallel, with
the help of ballast resistors.
GND
ENA
VIN
CP-
VOUT
CP+
VIN = 2.7 V - 5.5 V
140mA (VIN > 3.1V)
50mA (VIN > 2.7V)
C2
1 mF
C3
C1
2.2 mF 2.2 mF
5V
Controller
VBUS
GND
ID
USB
Transceiver
D+
Comparator
D-
Figure 20. Application Circuit for OTG System
VIN = 2.7 V~5.5 V
140mA (VIN > 3.1V)
GND
ENA
VIN
CP-
VOUT
CP+
50mA (VIN > 2.7V)
ENABLE
C2
1 mF
C3
C1
2.2 mF 2.2 mF
Figure 21. Application Circuit for Driving White LEDs
BASIC OPERATION PRINCIPLE
The TPS60150, regulated charge pump, provides a regulated output voltage for various input voltages. The
TPS60150 regulates the voltage across the flying capacitor to 2.5V and controls the voltage drop of Q1 and Q2
while a conversion clock with 50% duty cycle drives the FETs.
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VIN
Q2
Q1
OFF
ON
2.5 V
- +
CF
Q3
Q4
OFF
ON
VOUT
COUT
Figure 22. Charging Mode
During the first half cycle, Q2 and Q3 transistors are turned on and flying capacitor, CF, will be charged to 2.5V
ideally.
VIN
Q1
ON
Q2
Q3
OFF
OFF
VQ1
2.5 V
+
CF
Q4
ON
VOUT
COUT
Figure 23. Discharging Mode
During the second half cycle, Q1 and Q4 transistors are turned on. Capacitor CF will then be discharged to
output.
The output voltage can be calculated as follows:
Vout = VIN - VQ1 + V(CF) - VQ4 = VIN - VQ1 + 2.5V - VQ4 = 5 V. (Ideal)
The output voltage is regulated by output feedback and an internally compensated voltage control loop.
10
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NORMAL MODE AND SKIP MODE OPERATION
4.7 mA
Quiescent Current
90 mA
50 mA
t
Load current
No load
t
VOUT
5 V +0.15 V
5V
t
Gate Waveform
Of Q1 Transistor
t
Skip Mode at
Normal Mode at
Skip Mode at
No Load Condition 50 mA Load Current No Load Condition
Start up
Waveform
Figure 24. Normal Mode and Skip Mode Operation
The TPS60150 has skip mode operation as shown in Figure 24. The TPS60150 enters skip mode if the output
voltage reaches 5V+0.15V and the load current is below 8mA(typ). In Skip Mode, the TPS60150 disables the
oscillator and decreases the pre_bias current of the output stage to reduce the power consumption. Once the
output voltage dips below threshold voltage, 5V+0.15V, the TPS60150 begins switching to increase output
voltage until the output reaches 5V+0.15V. When the output voltage dips below 5V, the TPS60150 returns to
normal PWM mode; thereby re-enabling the oscillator and increasing the pre_bias current of the output stage to
supply output current.
The skip threshold voltage and current depend on input voltage and output current conditions.
SHORT CIRCUIT PROTECTION
The TPS60150 has internal short circuit protection to protect the IC when the output is shorted to ground. To
avoid damage when output is shorted to ground, the short circuit protection circuitry senses output voltage and
clamps the maximum output current to 80mA(typ).
THERMAL SHUT DOWN PROTECTION
The regulator has thermal shutdown circuitry that protects it from damage caused by overload conditions. The
thermal protection circuitry disables the output when the junction temperature reached approximately 160°C,
allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is
automatically re-enabled. Continuously running the regulator into thermal shutdown can degrade reliability. The
regulator also provides current limit to protect itself and the load.
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SHUTDOWN MODE
An enable pin on the regulator may be used to place the device into an energy-saving shutdown mode. In this
mode, the output is disconnected from the input and the input quiescent current is reduced to 1µA maximum.
CAPACITOR SELECTION
For minimum output voltage ripple, the output capacitor (COUT) should be a surface-mount ceramic capacitor.
Tantalum capacitors generally have a higher Effective Series Resistance (ESR) and may contribute to higher
output voltage ripple. Leaded capacitors also increase ripple due to the higher inductance of the package itself.
To achieve the best operation with low input voltage and high load current, the input and flying capacitors (CIN
and CF, respectively) should also be surface-mount ceramic types.
VIN
VOUT
(5 V)
GND
ENA
VIN
CP-
VOUT
COUT
CP+
ENABLE
/DISABLE
CF
CIN
Figure 25. Capacitors
Generally, CFLY can be calculated by simple equation as follows,
Qcharging = c ´ v = CFLY ´ D VCFLY ,
æT ö
Qdischarging = idischarge ´ t = 2 ´ ILO AD(MAX) ´ ç ÷ , half duty.
è2ø
(1)
æTö
\ 2 ´ ILOAD(MAX) ´ ç ÷ = CFLY ´ DVCFLY
è 2ø
Both equation should be same,
\ CFLY
æTö
2 ´ ILOAD(MAX) ´ ç ÷
è 2 ø = ILOAD(MAX)
³
DVCFLY
DVCFLY ´ ¦
(2)
If ILOAD = 140 mA, f = 1.5MHZ, and ΔVCFLY = 100mV, the minimum value of the flying capacitor should be 1µF.
Output capacitance, COUT, is also strongly related to output ripple voltage and loop stability,
ILOAD(MAX)
+ 2I
´ ESRCOUT
VOUT(RIPPLE) =
(2 ´ f ´ COUT ) LOAD(MAX)
(3)
The minimum output capacitance for all output levels is 2.2µF due to control stability. Larger ceramic capacitors
or low ESR capacitors can be used to lower the output ripple voltage.
The efficiency of the charge pump regulator varies with the output voltage, the applied input voltage and the load
current.
The approximate efficiency in normal operating mode is given by:
12
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Efficiency(%) =
Efficiency(%) =
V
´ IOUT
PD(out)
´ 100 = OUT
´ 100 , IIN = 2 ´ IOUT + IQ
PD(in)
VIN ´ IIN
VOUT
2 × VIN
× 100 (IIN = 2 ´ IOUT )
(4)
Quiescent current was neglected.
(5)
PCB LAYOUT
Large transient currents flow in the VIN, VOUT, and GND traces. To minimize both input and output ripple, keep
the capacitors as close as possible to the regulator using short, direct circuit traces.
C2
Figure 26. Recommended PCB Layout
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PACKAGE OPTION ADDENDUM
www.ti.com
22-Dec-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS60150DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS60150DRVT
ACTIVE
SON
DRV
6
250
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Dec-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPS60150DRVR
SON
DRV
6
3000
330.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
TPS60150DRVT
SON
DRV
6
250
180.0
12.4
2.2
2.2
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Dec-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS60150DRVR
SON
DRV
6
3000
346.0
346.0
29.0
TPS60150DRVT
SON
DRV
6
250
190.5
212.7
31.8
Pack Materials-Page 2
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