NIB6404-5L Preferred Device HDPlus 52 Amps, 40 Volts Self Protected with Temperature Sense N–Channel D2PAK HDPlus devices are an advanced series of Power MOSFETs which utilize ON Semiconductor’s latest MOSFET technology process to achieve the lowest possible on–resistance per silicon area while incorporating additional features such as clamp diodes. They are capable of withstanding high energy in the avalanche and commutation modes. The avalanche energy is specified to eliminate guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. This new HDPlus device features integrated Gate–to–Source diodes for ESD protection, and Gate–to–Drain clamp for overvoltage protection. Also, this device integrates a sense diode for temperature monitoring. • Ultra Low RDS(on) Provides Higher Efficiency • IDSS Specified at Elevated Temperature • Avalanche Energy Specified • Overvoltage Protection • FET ESD Human Body Model Discharge Sensitivity Class 3 • Temperature Sense Diode http://onsemi.com 52 AMPERES 40 VOLTS RDS(on) = 20 mΩ D T2 G T1 S MARKING DIAGRAM D MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–to–Source Voltage VDSS 40 Vdc Drain–to–Gate Voltage VDGR 40 Vdc VGS 10 Vdc TJ, Tstg –55 to +175 °C EAS 450 mJ ID ID IDM 52 25 200 PD @ TA = 25°C 115 0.76 Gate–to–Source Voltage Operating and Storage Temperature Range Single Pulse Drain–to–Source Avalanche Energy – Starting TJ = 25°C (Note 1) (VDD = 25 Vdc, VGS = 5.0 Vdc, IL(pk) = 25 A, L = 1.4 mH, RG = 10 kΩ) Drain Current – Continuous @ TA = 25°C – Continuous @ TA = 140°C – Single Pulse (tp10 µs) Total Power Dissipation (t ≤ 10 seconds) Linear Derating Factor Thermal Resistance – Junction–to–Case – Junction–to–Ambient (Note 1) D2PAK CASE 936D PLASTIC NIB6404 AYWW G S T1 T2 NIB6404 = Device Code A = Assembly Location Y = Year WW = Work Week Adc ORDERING INFORMATION W W/°C Device NIB6404–5L Package D2PAK Shipping 800 Tape & Reel °C/W RθJC RθJA 1.3 80 1. Measured while surface mounted to an FR4 board using the minimum recommended pad size. Typical value is 64°C/W. Preferred devices are recommended choices for future use and best overall value. Observe the general handling precautions for electrostatic–discharge sensitive devices (ESD) to prevent damage. Semiconductor Components Industries, LLC, 2002 February, 2002 – Rev. 2 1 Publication Order Number: NIB6404–5L/D NIB6404–5L ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 40 – 51 7.0 55 – mV/°C 10 13 20 Vdc – – – 1.1 0.2 4.0 100 2.0 20 – 0.02 1.0 1.0 – 1.7 4.5 2.0 – mV/°C OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (Note 2) (VGS = 0 Vdc, ID = 250 µAdc, –55°C < TJ < 175°C) Temperature Coefficient (Negative) V(BR)DSS Gate–to–Source Clamp Voltage (Note 2) (VGS = 0 Vdc, IG = 20 µAdc) V(BR)GSS Zero Gate Voltage Drain Current (VDS = 35 Vdc, VGS = 0 Vdc) (VDS = 15 Vdc, VGS = 0 Vdc) (VDS = 35 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate–Body Leakage Current (VGS = 5.0 Vdc, VDS = 0 Vdc) IGSS Vdc µAdc µAdc ON CHARACTERISTICS (Note 2) Gate Threshold Voltage (Note 2) (VDS = VGS, ID = 1.0 mAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain–to–Source On–Resistance (Note 2) (VGS = 5.0 Vdc, ID = 20 Adc) RDS(on) – 18 20 mΩ gFS TBD 34 – mhos Ciss – 1720 – pF Coss – 525 – Crss – 120 – td(on) – 11.2 – Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc) (Note 2) Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, Vd VGS = 0 Vdc, Vd f = 1.0 MHz) Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 3) Turn–On Delay Time Rise Time Turn–Off Delay Time (VDD = 32 Vdc, ID = 25 Adc, VGS = 5.0 5 0 Vdc, Vdc RG = 10 kΩ) (Note 2) µs tr – 38.5 – td(off) – 31.5 – tf – 29.5 – QT – 29 – Q1 – 6.0 – Q2 – 16 – Q3 – 2.0 – VSD – – 0.876 0.746 1.2 – Vdc trr – 60 – ns ta – 29 – tb – 32 – QRR – 80 – pC (IF(R) = 250 µAdc) (Note 2) (IF(R) = 250 µAdc, TJ = 125°C) VAC(ACR) 715 – 743 570 775 – mVdc IF(R) = 250 µAdc, TJ = 160°C VFTC 1.57 1.71 1.85 mV/°C IF(R) = 125 µAdc to 250 µAdc Vhys 25 37 50 mVdc Fall Time Gate Charge (VDS = 32 Vdc, ID = 25 Adc, VGS = 5.0 Vdc) (Note 2) nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (IS = 20 Adc, VGS = 0 Vdc) (Note 2) (IS = 20 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (IS = 25 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) (Note 2) Reverse Recovery Stored Charge TEMPERATURE SENSE DIODE CHARACTERISTICS Forward (Reverse) On–Voltage Temperature Coefficient (Negative) Forward Voltage Hysteresis 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 3. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NIB6404–5L TYPICAL ELECTRICAL CHARACTERISTICS 40 5.0 V 45 4.0 V 4.5 V 40 I D, DRAIN CURRENT (AMPS) I D, DRAIN CURRENT (AMPS) 50 3.5 V 35 TJ = 25°C 30 25 20 3.0 V 15 10 0 25 20 TJ = 175°C 15 25°C 10 –55°C 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 1.0 1.5 2.0 2.5 3.0 VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) Figure 1. On–Region Characteristics Figure 2. Transfer Characteristics 50 45 TJ = 175°C 40 35 30 25 25°C 20 15 10 –55°C 5.0 0 0 10 20 30 40 50 ID, DRAIN CURRENT (AMPS) 3.5 50 45 40 VGS = 3.0 V 35 3.5 V 30 25 4.0 V 20 5.0 V 15 10 V 10 5.0 TJ = 25°C 0 0 10 20 30 40 50 ID, DRAIN CURRENT (AMPS) Figure 3. On–Resistance versus Drain Current and Temperature Figure 4. On–Resistance versus Drain Current and Gate Voltage 2.2 4500 VGS = 5.0 V ID = 20 A 2.0 1.8 1.6 1.4 1.2 1.0 3000 2500 2000 1000 0.6 0 50 100 150 200 Ciss 1500 500 0 TJ = 25°C 3500 0.8 –50 VGS = 0 V f = 1.0 MHz 4000 C, CAPACITANCE (pF) RDS(on), DRAIN–TO–SOURCE RESISTANCE (NORMALIZED) 0.5 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN–TO–SOURCE RESISTANCE (m) 0 RDS(on), DRAIN–TO–SOURCE RESISTANCE (m) 30 5.0 VGS = 2.5 V 5.0 35 Coss Crss 0 5.0 10 15 20 25 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C) Figure 5. On–Resistance Variation with Temperature Figure 6. Capacitance Variation http://onsemi.com 3 30 NIB6404–5L TYPICAL ELECTRICAL CHARACTERISTICS 20 5000 Ciss 18 IS, SOURCE CURRENT (A) C, CAPACITANCE (pF) 4500 4000 3500 3000 Coss 2500 2000 1500 1000 TJ = 25°C VDS = 0 V f = 1 MHz 500 14 12 10 8.0 6.0 TJ = 175°C 4.0 25°C 2.0 0 0 0 2.0 4.0 6.0 8.0 0 10 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Figure 7. Capacitance Variation Figure 8. Diode Forward Voltage versus Current VFTC, TEMPERATURE COEFFICIENT (mV/°C) VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS) 0.9 IF(R) = 500 A 0.8 250 A 0.7 125 A 0.6 0.5 50 A 0.4 0.3 –100 0.1 VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) 1.0 VF, FORWARD VOLTAGE (V) 16 25 A –50 0 50 100 200 150 –1.3 –1.4 –1.5 –1.6 IF(R) = 250 A –1.7 –1.8 –1.9 –2.0 –2.1 –50 0 50 100 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 9. Sense Diode Forward Voltage Variation with Temperature Figure 10. Sense Diode Temperature Coefficient Variation with Temperature http://onsemi.com 4 1.0 150 NIB6404–5L PACKAGE DIMENSIONS D2PAK CASE 936D–03 ISSUE B –T– OPTIONAL CHAMFER A TERMINAL 6 E U S K B V H 1 2 3 4 5 M L J D 0.010 (0.254) M T P N G R C http://onsemi.com 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 6. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. DIM A B C D E G H J K L M N P R S U V INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.067 BSC 0.539 0.579 0.125 MAX 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 1.702 BSC 13.691 14.707 3.175 MAX 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 REF 2.946 REF 5.080 MIN 6.350 MIN NIB6404–5L Notes http://onsemi.com 6 NIB6404–5L Notes http://onsemi.com 7 NIB6404–5L HDPlus is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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