INTEGRATED CIRCUITS DATA SHEET TEA1110A Low voltage versatile telephone transmission circuit with dialler interface Product specification Supersedes data of 1996 Nov 26 File under Integrated Circuits, IC03 1997 Apr 22 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A FEATURES APPLICATION • Low DC line voltage; operates down to 1.6 V (excluding voltage drop over external polarity guard) • Line powered telephone sets, cordless telephones, fax machines, answering machines. • Voltage regulator with adjustable DC voltage • Provides a supply for external circuits GENERAL DESCRIPTION • Symmetrical high impedance inputs (64 kΩ) for dynamic, magnetic or piezo-electric microphones The TEA1110A is a bipolar integrated circuit that performs all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between speech and dialling. The IC operates at a line voltage down to 1.6 V DC (with reduced performance) to facilitate the use of telephone sets connected in parallel. • Asymmetrical high impedance input (32 kΩ) for electret microphones • DTMF input with confidence tone • MUTE input for pulse or DTMF dialling All statements and values refer to all versions unless otherwise specified. • Receiving amplifier for dynamic, magnetic or piezo-electric earpieces • AGC line loss compensation for microphone and earpiece amplifiers. QUICK REFERENCE DATA Iline = 15 mA; VEE = 0 V; RSLPE = 20 Ω; AGC pin connected to VEE; Zline = 600 Ω; f = 1 kHz; Tamb = 25 °C; unless otherwise specified. SYMBOL Iline PARAMETER line current operating range CONDITIONS normal operation MIN. DC line voltage MAX. UNIT − 140 mA − 11 mA 3.35 3.65 3.95 V 11 with reduced performance 1 VLN TYP. ICC internal current consumption VCC = 2.9 V − 1.1 1.4 mA VCC supply voltage for peripherals IP = 0 mA − 2.9 − V Gvtrx typical voltage gain microphone amplifier (not adjustable) VMIC = 4 mV (RMS) − 43.7 − dB receiving amplifier range VIR = 4 mV (RMS) 19 − 33 dB ∆Gvtrx gain control range for microphone and receiving amplifiers with respect to Iline = 15 mA Iline = 85 mA − 5.9 − dB ∆Gvtrxm gain reduction for microphone and receiving amplifiers MUTE = LOW − 80 − dB ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TEA1110A DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 TEA1110AT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 1997 Apr 22 DESCRIPTION 2 VERSION Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A BLOCK DIAGRAM GAR handbook, full pagewidth QR 13 IR 7 5 DTMF MIC+ V I V I MUTE 12 6 14 VCC 1 LN ATT. CURRENT REFERENCE V I V I 10 3 REG 9 MIC− AGC CIRCUIT LOW VOLTAGE CIRCUIT 11 8 TEA1110A(T) 2 SLPE VEE AGC MGG736 Fig.1 Block diagram. 1997 Apr 22 3 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A PINNING SYMBOL PIN DESCRIPTION LN 1 positive line terminal SLPE 2 slope (DC resistance) adjustment REG 3 line voltage regulator decoupling n.c. 4 not connected DTMF 5 MUTE handbook, halfpage LN 1 14 VCC dual-tone multi-frequency input SLPE 2 13 GAR 6 mute input to select speech or dialling mode (active LOW) REG 3 12 QR IR 7 receiving amplifier input AGC 8 automatic gain control/ line loss compensation MIC− 9 inverting microphone amplifier input MIC+ 10 non-inverting microphone amplifier input VEE 11 negative line terminal QR 12 receiving amplifier output GAR 13 receive gain adjustment VCC 14 supply voltage for speech circuit and peripherals n.c. 4 TEA1110A(T) 11 VEE DTMF 5 10 MIC+ MUTE 6 9 IR 7 8 AGC MIC− MGG735 Fig.2 Pin configuration. FUNCTIONAL DESCRIPTION The voltage at pin LN is: All data given in this chapter are typical values, except when otherwise specified. V LN = V ref + R SLPE × I SLPE I SLPE = I line – I CC – I P – I∗ Supply (pins LN, SLPE, VCC and REG) Where: The supply for the TEA1110A and its peripherals is obtained from the telephone line. See Fig.3. Iline = line current The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. Vref is temperature compensated and can be adjusted by means of an external resistor (RVA). Vref equals 3.35 V and can be increased by connecting RVA between pins REG and SLPE (see Fig.4), or decreased by connecting RVA between pins REG and LN. The voltage at pin REG is used by the internal regulator to generate Vref and is decoupled by CREG, which is connected to VEE. This capacitor, converted into an equivalent inductance (see Section “Set impedance”), realizes the set impedance conversion from its DC value (RSLPE) to its AC value (RCC in the audio-frequency range). The voltage at pin SLPE is proportional to the line current. IP = supply current for peripheral circuits 1997 Apr 22 ICC = current consumption of the IC I* = current consumed between LN and VEE. The preferred value for RSLPE is 20 Ω. Changing RSLPE will affect more than the DC characteristics; it also influences the microphone and DTMF gains, the gain control characteristics, the sidetone level and the maximum output swing on the line. 4 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface handbook, full pagewidth Rline TEA1110A RCC 619 Ω Iline VCC LN 1 14 IP from pre amp Rexch ICC Ish I* CVCC 100 µF peripheral circuits Vd Vexch TEA1110A ISLPE 2 3 11 SLPE REG VEE CREG RSLPE 20 Ω 4.7 µF MGG737 Fig.3 Supply configuration. The internal circuitry of the TEA1110A is supplied from pin VCC. This voltage supply is derived from the line voltage by means of a resistor (RCC) and must be decoupled by a capacitor CVCC. It may also be used to supply peripheral circuits such as dialling or control circuits. The VCC voltage depends on the current consumed by the IC and the peripheral circuits as shown by the formula: V CC = V CC0 – R CCint × ( I P – I rec ) MGD176 6.0 handbook, halfpage Vref (V) 5.0 V CC0 = V LN – R CC × I CC (see also Figs 5 and 6). 4.0 RCCint is the internal equivalent resistance of the voltage supply, and Irec is the current consumed by the output stage of the earpiece amplifier. (1) (2) The DC line current flowing into the set is determined by the exchange supply voltage (Vexch), the feeding bridge resistance (Rexch), the DC resistance of the telephone line (Rline) and the reference voltage (Vref). With line currents below 7.5 mA, the internal reference voltage (generating Vref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.6 V. At currents below 7.5 mA, the circuit has limited sending and receiving levels. This is called the low voltage area. 1997 Apr 22 3.0 104 105 106 RVA (Ω) 107 (1) Influence of RVA on Vref. (2) Vref without influence of RVA. Fig.4 Reference voltage adjustment by RVA. 5 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A and VEE. This resistor enables the Istart and Istop line currents to be increased (the ratio between Istart and Istop is not affected by the resistor). The AGC function is disabled when pin AGC is left open-circuit. Set impedance In the audio frequency range, the dynamic impedance is mainly determined by the RCC resistor. The equivalent impedance of the circuit is illustrated in Fig.7. Mute function (pin MUTE) Microphone amplifier (pins MIC+ and MIC−) Automatic gain control is provided on this amplifier for line loss compensation. The mute function performs the switching between the speech mode and the dialling mode. When MUTE is LOW, the DTMF input is enabled and the microphone and receiving amplifiers inputs are disabled. When MUTE is HIGH, the microphone and receiving amplifiers inputs are enabled while the DTMF input is disabled. A pull-up resistor is included at the input. Receiving amplifier (pins IR, GAR and QR) DTMF amplifier (pin DTMF) The receiving amplifier has one input (IR) and one output (QR). The input impedance between pin IR and pin VEE is 20 kΩ. The voltage gain from pin IR to pin QR is set at 33 dB (typ). The gain can be decreased by connecting an external resistor RGAR between pins GAR and QR; the adjustment range is 14 dB. Two external capacitors CGAR (connected between GAR and QR) and CGARS (connected between GAR and VEE) ensure stability. The CGAR capacitor provides a first-order low-pass filter. The cut-off frequency corresponds to the time constant CGAR × (RGARint // RGAR). RGARint is the internal resistor which sets the gain with a typical value of 125 kΩ. The condition CGARS = 10 × CGAR must be fulfilled to ensure stability. When the DTMF amplifier is enabled, dialling tones may be sent on line. These tones can be heard in the earpiece at a low level (confidence tone). The TEA1110A has symmetrical microphone inputs. The input impedance between pins MIC+ and MIC− is 64 kΩ (2 × 32 kΩ). The voltage gain from pins MIC+/MIC− to pin LN is set at 43.7 dB (typ). The TEA1110A has an asymmetrical DTMF input. The input impedance between DTMF and VEE is 20 kΩ. The voltage gain from pin DTMF to pin LN is 25.3 dB. The automatic gain control has no effect on the DTMF amplifier. IP (mA) 2 The output voltage of the receiving amplifier is specified for continuous wave drive. The maximum output swing depends on the DC line voltage, the RCC resistor, the ICC current consumption of the circuit, the IP current consumption of the peripheral circuits and the load impedance. 1.5 Automatic gain control is provided on this amplifier for line loss compensation. 1 (2) 0.5 Automatic gain control (pin AGC) The TEA1110A performs automatic line loss compensation. The automatic gain control varies the gain of the microphone amplifier and the gain of the receiving amplifier in accordance with the DC line current. The control range is 5.9 dB (which corresponds approximately to a line length of 5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 Ω/km and an average attenuation of 1.2 dB/km). The IC can be used with different configurations of feeding bridge (supply voltage and bridge resistance) by connecting an external resistor RAGC between pins AGC 1997 Apr 22 MBE783 2.5 handbook, halfpage (1) 0 0 1 2 3 VCC (V) 4 (1) With RVA resistor. (2) Without RVA resistor. Fig.5 6 Typical current IP available from VCC for peripheral circuits at Iline = 15 mA. Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A SIDETONE SUPPRESSION handbook, halfpage RCCint The TEA1110A anti-sidetone network comprising RCC//Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.8 ) suppresses the transmitted signal in the earpiece. Maximum compensation is obtained when the following conditions are fulfilled: VCC Irec VCCO PERIPHERAL CIRCUIT R SLPE × R ast1 = R CC × ( R ast2 + R ast3 ) IP ( R ast2 × ( R ast3 + R SLPE ) ) k = ---------------------------------------------------------------------( R ast1 × R SLPE ) MBE792 Z bal = k × Z line VEE The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. In practice, Zline varies considerably with the line type and the line length. Therefore, the value of Zbal should be for an average line length which gives satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line. Fig.6 VCC supply voltage for peripherals. handbook, halfpage The anti-sidetone network for the TEA1110A (as shown in Fig.12) attenuates the receiving signal from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. LN LEQ Vref RP RCC 619 Ω REG VCC A Wheatstone bridge configuration (see Fig.9) may also be used. CREG 4.7 µF CVCC 100 µF More information on the balancing of an anti-sidetone bridge can be obtained in our publication “Applications Handbook for Wired Telecom Systems, IC03b”, order number 9397 750 00811. SLPE RSLPE 20 Ω VEE MBE788 Leq = CREG × RSLPE × RP. RP = internal resistance. RP = 15.5 kΩ. Fig.7 Equivalent impedance between LN and VEE. 1997 Apr 22 7 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A LN handbook, full pagewidth Zline RCC Rast1 IR Im VEE Zir Rast2 RSLPE Rast3 SLPE Zbal MBE787 Fig.8 Equivalent circuit of TEA1110A family anti-sidetone bridge. handbook, full pagewidth LN Zline RCC Zbal Im VEE RSLPE IR Zir Rast1 RA SLPE MBE786 Fig.9 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration. 1997 Apr 22 8 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT positive continuous line voltage VEE − 0.4 12 V repetitive line voltage during switch-on or line interruption VEE − 0.4 13.2 V Vn(max) maximum voltage on all pins VEE − 0.4 VCC + 0.4 V Iline line current RSLPE = 20 Ω; see Figs 10 and 11 − 140 mA Ptot total power dissipation Tamb = 75 °C; see Figs 10 and 11 − 588 mW VLN TEA1110A − 384 mW Tstg storage temperature −40 +125 °C Tamb operating ambient temperature −25 +75 °C TEA1110AT HANDLING This device meets class 2 ESD test requirements [Human Body Model (HBM)], in accordance with “MIL STD 883C - method 3015”. THERMAL CHARACTERISTICS SYMBOL Rth j-a 1997 Apr 22 PARAMETER VALUE UNIT thermal resistance from junction to ambient in free air; mounted on epoxy board 40.1 × 19.1 × 1.5 mm (TEA1110A) 85 K/W thermal resistance from junction to ambient in free air; mounted on epoxy board 40.1 × 19.1 × 1.5 mm (TEA1110AT) 130 K/W 9 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A MBH275 150 MGD859 150 line (mA) 130 handbook, halfpage handbook, halfpage I I line (mA) 130 (1) 110 110 (2) (1) 90 (3) 90 (2) (4) (3) 70 70 (4) 50 (5) 50 30 30 2 4 6 8 10 12 V LN V SLPE (V) 2 (1) (2) (3) (4) (5) (1) Tamb = 45 °C; Ptot = 0.615 W. (2) Tamb = 55 °C; Ptot = 0.538 W. (3) Tamb = 65 °C; Ptot = 0.461 W. (4) Tamb = 75 °C; Ptot = 0.384 W. Fig.10 SO14 Safe operating area (TEA1110AT). 1997 Apr 22 4 6 8 10 12 VLN_VSLPE(V) Tamb = 35 °C; Ptot = 1.058 W. Tamb = 45 °C; Ptot = 0.941 W. Tamb = 55 °C; Ptot = 0.823 W. Tamb = 65 °C; Ptot = 0.705 W. Tamb = 75 °C; Ptot = 0.588 W. Fig.11 DIP14 Safe operating area (TEA1110A). 10 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A CHARACTERISTICS Iline = 15 mA; VEE = 0 V; RSLPE = 20 Ω; AGC pin connected to VEE; Zline = 600 Ω; f = 1 kHz; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies (pins VLN, VCC, SLPE and REG) Vref stabilized voltage between LN and SLPE VLN DC line voltage 3.1 3.35 3.6 V Iline = 1 mA − 1.6 − V Iline = 4 mA − 2.3 − V Iline = 15 mA 3.35 3.65 3.95 V Iline = 140 mA − − 6.9 V VLN(exR) DC line voltage with an external resistor RVA RVA(SLPE−REG) = 27 kΩ − 4.4 − V ∆VLN(T) DC line voltage variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±30 − mV ICC internal current consumption VCC = 2.9 V − 1.1 1.4 mA VCC supply voltage for peripherals IP = 0 mA − 2.9 − V RCCint equivalent supply voltage resistance IP = 0.5 mA − 550 620 Ω differential between pins MIC+ and MIC− − 64 − kΩ single-ended between pins MIC+/MIC− and VEE − 32 − kΩ Microphone amplifier (pins MIC+ and MIC−) Zi input impedance Gvtx voltage gain from MIC+/MIC− to LN VMIC = 4 mV (RMS) 42.7 43.7 44.7 dB ∆Gvtx(f) gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz − ±0.2 − dB ∆Gvtx(T) gain variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±0.3 − dB CMRR common mode rejection ratio − 80 − dB Iline = 15 mA; THD = 2% 1.4 1.7 − V Iline = 4 mA, THD = 10% − 0.8 − V psophometrically weighted (P53 curve) − −78.5 − − 20 − kΩ VLN(max)(rms) maximum sending signal (RMS value) Vnotx noise output voltage at pin LN; pins MIC+/MIC− shorted through 200 Ω dBmp Receiving amplifier (pins IR, QR and GAR) Zi input impedance Gvrx voltage gain from IR to QR VIR = 4 mV (RMS) 32 33 34 dB ∆Gvrx(f) gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz − ±0.2 − dB ∆Gvrx(T) gain variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±0.3 − dB 1997 Apr 22 11 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface SYMBOL PARAMETER TEA1110A CONDITIONS MIN. TYP. MAX. UNIT ∆Gvrxr gain voltage reduction range external resistor connected between GAR and QR − − 14 dB Vo(rms) maximum receiving signal (RMS value) IP = 0 mA sine wave drive; RL = 150 Ω; THD = 2% − 0.25 − V IP = 0 mA sine wave drive; RL = 450 Ω; THD = 2% − 0.35 − V Gvrx = 33 dB; IR open-circuit; RL = 150 Ω; psophometrically weighted (P53 curve) − −87 − dBVp Vnorx(rms) noise output voltage at pin QR (RMS value) Automatic gain control (pin AGC) ∆Gvtrx Iline = 85 mA gain control range for microphone and receiving amplifiers with respect to Iline = 15 mA − 5.9 − dB Istart highest line current for maximum gain − 23 − mA Istop lowest line current for minimum gain − 56 − mA − 20 − kΩ DTMF amplifier (pin DTMF) Zi input impedance Gvdtmf voltage gain from DTMF to LN VDTMF = 20 mV (RMS); MUTE = LOW 24.1 25.3 26.5 dB ∆Gvdtmf(f) gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz − ±0.2 − dB ∆Gvdtmf(T) gain variation with temperature referred to 25 °C Tamb = −25 to +75 °C − ±0.4 − dB Gvct voltage gain from DTMF to QR (confidence tone) VDTMF = 20 mV (RMS); RL = 150 Ω − −15 − dB V Mute function (pin MUTE) VIL LOW level input voltage VEE − 0.4 − VEE + 0.3 VIH HIGH level input voltage VEE + 1.5 − VCC + 0.4 V IMUTE input current ∆Gvtrxm gain reduction for microphone and receiving amplifiers 1997 Apr 22 MUTE = LOW 12 1.5 µA 80 dB 1997 Apr 22 VDR 95 V 13 BC547 Zbal 390 Ω Rast3 SLPE MIC− MIC+ GAR QR IR 470 kΩ Rpd1 RSLPE 20 Ω BZX79C10 100 pF CGAR CGARS 1 nF Rast2 3.92 kΩ CIR MUTE DTMF VCC AGC VEE CREG 4.7 µF REG TEA1110A(T) LN CVCC 100 µF signal from dial and control circuits RCC 619 Ω Rpd2 470 kΩ MGG738 BF473 supply for peripheral circuits BC558 Rpd3 1 MΩ BC547 470 kΩ Rpd4 68 kΩ Rpd6 Rpd5 470 kΩ PD input Low voltage versatile telephone transmission circuit with dialler interface Fig.12 Typical application of the TEA1110A in sets with Pulse Dialling or Flash facilities. 3.9 Ω Rlimit BSN254 BZX79C10 4× BAS11 Rast1 130 kΩ andbook, full pagewidth b/a telephone line a/b Rprotect 10 Ω Philips Semiconductors Product specification TEA1110A APPLICATION INFORMATION Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.0098 0.057 0.0039 0.049 0.01 0.019 0.0098 0.35 0.014 0.0075 0.34 0.16 0.15 0.050 0.24 0.23 0.041 0.039 0.016 0.028 0.024 0.01 0.01 0.004 0.028 0.012 inches 0.069 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06S MS-012AB 1997 Apr 22 EIAJ EUROPEAN PROJECTION ISSUE DATE 91-08-13 95-01-23 14 o 8 0o Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.020 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT27-1 050G04 MO-001AA 1997 Apr 22 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-03-11 15 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. DIP SOLDERING BY DIPPING OR BY WAVE • The longitudinal axis of the package footprint must be parallel to the solder flow. The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1997 Apr 22 TEA1110A 16 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Apr 22 17 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface NOTES 1997 Apr 22 18 TEA1110A Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface NOTES 1997 Apr 22 19 TEA1110A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1997 SCA54 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 417027/1200/02/pp20 Date of release: 1997 Apr 22 Document order number: 9397 750 02077