NEC UPA1755G

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA1755
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
PACKAGE DRAWING (Unit : mm)
DESCRIPTION
This product is Dual N-channel MOS Field Effect
Transistor designed for DC/DC converters and power
8
5
1 ; Source 1
2 ; Gate 1
7, 8 ; Drain 1
management applications of notebook computers.
FEATURES
3 ; Source 2
4 ; Gate 2
5, 6 ; Drain 2
• Dual chip type
• Low on-resistance
1
• Built-in G-S protection diode
6.0 ±0.3
4
4.4
0.8
+0.10
–0.05
5.37 Max.
0.15
• Low input capacitance Ciss = 895 pF TYP.
1.8 Max.
RDS(on)2 = 45 mΩ MAX. (VGS = 4.5 V, ID = 3.5 A)
1.44
RDS(on)1 = 32 mΩ MAX. (VGS = 10 V, ID = 3.5 A)
0.05 Min.
• Small and surface mount package (Power SOP8)
1.27
0.40
ORDERING INFORMATION
0.5 ±0.2
0.10
0.78 Max.
+0.10
–0.05
0.12 M
PART NUMBER
PACKAGE
EQUIVALENT CIRCUIT
µPA1755G
Power SOP8
(1/2 Circuit)
Drain
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, All terminals are connected.)
Drain to Source Voltage (VGS = 0)
VDSS
30
V
Gate to Source Voltage (VDS = 0)
VGSS
±20
V
Drain Current (DC)
ID(DC)
±7.0
A
ID(pulse)
±28
A
Drain Current (pulse)
Note1
Total Power Dissipation (1 unit)
Note2
PT
1.7
W
Total Power Dissipation (2 unit)
Note2
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to + 150
°C
Body
Diode
Gate
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 %
2. TA = 25 °C, Mounted on ceramic substrate of 2000 mm x 1.1 mm
2
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G12715EJ1V0DS00 (1st edition)
Date Published March 1999 NS CP(K)
Printed in Japan
©
1998
µPA1755
ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
Drain to Source On-state Resistance
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
RDS(on)1
VGS = 10 V, ID = 3.5 A
22
32
mΩ
RDS(on)2
VGS = 4.5 V, ID = 3.5 A
32
45
mΩ
VGS(off)
VDS = 10 V, ID = 1 mA
1.5
2.0
2.5
V
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 3.5 A
4.0
8.0
Drain Leakage Current
IDSS
VDS = 30 V, VGS = 0
10
µA
Gate to Source Leakage Current
IGSS
VGS = ±20 V, VDS = 0
±10
µA
Input Capacitance
Ciss
VDS = 10 V
895
pF
Output Capacitance
Coss
VGS = 0
335
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
150
pF
Turn-on Delay Time
td(on)
ID = 3.5 A
16
ns
VGS(on) = 10 V
130
ns
td(off)
VDD = 15 V
55
ns
tf
RG = 10 Ω
30
ns
Total Gate Charge
QG
ID = 7.0 A
19
nC
Gate to Source Charge
QGS
VDD = 24 V
2.2
nC
Gate to Drain Charge
QGD
VGS = 10 V
5.4
nC
VF(S-D)
IF = 7.0 A, VGS = 0
0.8
V
Reverse Recovery Time
trr
IF = 7.0 A, VGS = 0
45
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
62
nC
Gate to Source Cut-off Voltage
Rise Time
tr
Turn-off Delay Time
Fall Time
Body Diode forward Voltage
TEST CIRCUIT 2 GATE CHARGE
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
IG = 2 mA
D.U.T.
VGS
RL
VGS
PG.
RG
RG = 10 Ω
Wave Form
0
VGS (on)
10 %
90 %
PG.
VDD
90 %
ID
90 %
ID
VGS
0
I
D
Wave Form
t
t = 1µ s
Duty Cycle ≤ 1 %
2
S
0
10 %
10 %
tr
td (on)
ton
td (off)
tf
toff
Data Sheet G12715EJ1V0DS00
50 Ω
RL
VDD
µPA1755
TYPICAL CHARACTERISTICS (TA = 25 °C)
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - ˚C/W
1 000
100
10
1
0.1
0.01
0.001
Mounted on ceramic
substrate of 2000mm2 × 1.1mm
Single Pulse, 1 unit
10 µ
100 µ
1m
10 m
100 m
1
10
100
1 000
100
10
VDS=10V
Pulsed
TA=−50˚C
TA=−25˚C
TA= 25˚C
TA=75˚C
TA=125˚C
TA=150˚C
1
0.1
10
1
100
RDS(on) - Drain to Source On-state Resistance - mΩ
ID- Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
Pulsed
70
60
50
VGS=4.5V
40
30
VGS=10V
20
10
0
1
10
100
VGS(off) - Gate to Source Cut-off Voltage - V
|yfs| - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
RDS(on) - Drain to Source On-state Resistance - mΩ
PW - Pulse Width - s
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
Pulsed
70
60
50
40
30
ID=3.5 A
20
10
5
0
15
10
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
VDS=10 V
ID=1 mA
2.4
2.0
1.6
1.2
0.8
− 50
0
50
100
150
Tch - Channel Temperature - ˚C
ID - Drain Current - A
Data Sheet G12715EJ1V0DS00
3
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
60
40
VGS=4.5V
VGS=10V
− 40
0
40
80
100
VGS=10V
10
VGS=0V
1
0.1
0
120
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
1000
Ciss
Coss
Crss
100
10
0.1
1
10
1000
100
tr
tf
100
td(off)
td(on)
10
1
0.1
1
trr - Reverse Recovery Diode - ns
di/dt = 100 A/µs
VGS = 0
100
10
1
10
100
VDS - Drain to Source Voltage - V
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1
0.1
10
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
40
ID = 7 A
14
30
VDD=24 V
VDD=15 V
VDD=6 V
12
VGS
10
8
20
6
4
10
2
0
5
10
15
QG - Gate Charge - nC
ID - Drain Current - A
4
VDS = 15 V
VGS = 10 V
RG = 10 Ω
100
ID - Drain Current - A
VDS - Drain to Source Voltage - V
1000
1.5
1.0
SWITCHING CHARACTERISTICS
VGS = 0
f = 1 MHz
td(on), tr, td(off), tf - Switching Time - ns
Ciss, Coss, Crss - Capacitance - pF
10000
0.5
VSD - Source to Drain Voltage - V
Tch - Channel Temperature - ˚C
Data Sheet G12715EJ1V0DS00
20
0
VGS - Gate to Source Voltage - V
20
0
Pulsed
ID= 3.5 A
80
IF - Diode Forward Current - A
RDS(on) - Drain to Source On-state Resistance - mΩ
µPA1755
µPA1755
80
60
40
20
20
40
60
80
100 120 140 160
PT - Total Power Dissipation - W/package
100
0
2.8
Mounted on ceramic
substrate2 of
2000mm ×1.1mm
2.4
2.0
2 unit
1 unit
1.6
1.2
0.8
0.4
0
20
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
100
ID - Drain Current - A
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
Mounted on ceramic
substrate of
2000mm2×1.1mm, 1 unit
ID(pulse) = 28 A
d
ite
im )
)L V
on 10
(
S =
RD GS
(V
ID(DC) = 7 A
10
Po
we
r
PW
PW
PW
Di
0m
s
00
m
s
ipa
tio
n
Lim
VGS=4.5 V
VGS=4 V
10
ite
d
TA = 25 ˚C
Single Pulse
0.1
0.1
m
s
=1
=1
ss
1
=1
Pulsed
VGS=10 V
20
ID - Drain Current - A
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
1
10
100
0
VDS - Drain to Source Voltage - V
0.2
0.4
0.6
0.8
VDS - Drain to Source Voltage - V
FORWARD TRANSFER CHARACTERISTICS
ID - Drain Current - A
100
Pulsed
10
1
TA=150˚C
TA=125˚C
TA=75˚C
TA=25˚C
TA=−25˚C
TA=−50˚C
0.1
VDS = 10 V
1
2
3
4
5
VGS - Gate to Source Voltage - V
Data Sheet G12715EJ1V0DS00
5
µPA1755
[MEMO]
6
Data Sheet G12715EJ1V0DS00
µPA1755
[MEMO]
Data Sheet G12715EJ1V0DS00
7
µPA1755
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
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Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8