DATA SHEET MOS FIELD EFFECT TRANSISTOR µPA1763 SWITCHING DUAL N-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION PACKAGE DRAWING (Unit : mm) The µPA1763 is N-Channel MOS Field Effect Transistor designed for DC/DC Converters. 8 5 1 : Source 1 2 : Gate 1 7, 8 : Drain 1 FEATURES 6.0 ±0.3 4 4.4 5.37 MAX. 0.8 0.15 +0.10 –0.05 1.44 1 0.05 MIN. ★ 3 : Source 2 4 : Gate 2 5, 6 : Drain 2 1.8 MAX. ★ ★ ★ • Dual chip type • Low on-resistance RDS(on)1 = 47.0 mΩ MAX. (VGS = 10 V, ID = 2.3 A) RDS(on)2 = 57.0 mΩ MAX. (VGS = 4.5 V, ID = 2.3 A) RDS(on)3 = 66.0 mΩ MAX. (VGS = 4.0 V, ID = 2.3 A) • Low input capacitance Ciss = 870 pF TYP. • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE µPA1763G Power SOP8 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, All terminals are connected.) Drain to Source Voltage VDSS 60 V Gate to Source Voltage VGSS ±20 V Drain Current (DC) ID(DC) ±4.5 A ID(pulse) ±18 A Drain Current (pulse) ★ ★ ★ Note1 Total Power Dissipation (1 unit) Note2 PT 1.7 W Total Power Dissipation (2 unit) Note2 PT 2.0 W IAS 4.5 A Single Avalanche Current Note3 Single Avalanche Energy Note3 EAS 60 mJ Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to + 150 °C EQUIVALENT CIRCUIT (1/2 Circuit) Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 % 2 2. TA = 25 °C, Mounted on ceramic substrate of 1200 mm x 2.2 mm 3. Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage Exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G14056EJ1V0DS00 (1st edition) Date Published January 2000 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 1999, 2000 µPA1763 ★ ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.) CHARACTERISTICS SYMBOL Drain to Source On-state Resistance TEST CONDITIONS MIN. TYP. MAX. UNIT RDS(on)1 VGS = 10 V, ID = 2.3 A 37.0 47.0 mΩ RDS(on)2 VGS = 4.5 V, ID = 2.3 A 45.0 57.0 mΩ RDS(on)3 VGS = 4.0 V, ID = 2.3 A 49.0 66.0 mΩ VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V Forward Transfer Admittance | yfs | VDS = 10 V, ID = 2.3 A 3.0 6.0 Drain Leakage Current IDSS VDS = 60 V, VGS = 0 V 10 µA Gate to Source Leakage Current IGSS VGS = ±16 V, VDS = 0 V ±10 µA Input Capacitance Ciss VDS = 10 V 870 pF Output Capacitance Coss VGS = 0 V 150 pF Reverse Transfer Capacitance Crss f = 1 MHz 80 pF Turn-on Delay Time td(on) ID = 2.3 A 11 ns VGS(on) = 10 V 40 ns td(off) VDD = 30 V 50 ns tf RG = 10 Ω 12 ns Total Gate Charge QG ID = 4.5 A 20 nC Gate to Source Charge QGS VDD = 48 V 3 nC Gate to Drain Charge QGD VGS = 10 V 5 nC Gate to Source Cut-off Voltage Rise Time tr Turn-off Delay Time Fall Time Body Diode Forward Voltage S VF(S-D) IF = 4.5 A, VGS = 0 V 0.80 V Reverse Recovery Time trr IF = 4.5 A, VGS = 0 V 30 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 40 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL RG RG = 10 Ω PG. VDD VGS Wave Form 0 VGS(on) 10 % 90 % VDD ID 90 % 90 % BVDSS IAS ID VGS 0 ID VDS ID τ VDD Starting Tch τ = 1 µs Duty Cycle ≤ 1 % ★ TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 2 50 Ω 0 10 % 10 % Wave Form RL VDD Data Sheet G14056EJ1V0DS00 td(on) tr ton td(off) tf toff µPA1763 ★ TYPICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 Pulsed VDS = 10 V Pulsed 10 ID - Drain Current - A ID - Drain Current - A 30 TA = 150 ˚C TA = 75 ˚C 1 TA = 25 ˚C TA = −25 ˚C 0.1 0.01 25 VGS = 10 V 20 VGS = 4.5 V 15 VGS = 4.0 V 10 5 0.001 0 − 1.5 1 1.5 2 2.5 3 3.5 4 4.5 0 0 5 VGS - Gate to Source Voltage - V 0.1 0.1 TA = 150 ˚C 1 10 100 RDS(on) - Drain to Source On - state Resistance - mΩ ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ TA = 25 ˚C TA = 75 ˚C 1 Pulsed 0.1 VGS = 4.0 V 0.08 0.06 VGS = 4.5 V 0.04 VGS = 10 V 0.02 0 0.1 1 10 0.8 1.0 1.2 1.4 1.6 160 140 120 100 80 60 ID = 4.5 A 40 ID = 2.3 A 20 0 0 ID = 2.3 A 100 5 10 15 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 0.12 0.6 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 200 Pulsed 180 VGS(off) - Gate to Source Cut-off Voltage - V |yfs| - Forward Transfer Admittance - S VDS = 10 V Pulsed TA = −25 ˚C 10 0.4 VDS - Drain to Source Voltage - V FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 0.2 3 VDS =10 V ID = 1 mA 2.5 2 1.5 1 0.5 0 − 75 − 50 − 25 0 25 50 75 100 125 150 175 Tch - Channel Temperature - ˚C ID - Drain Current - A Data Sheet G14056EJ1V0DS00 3 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 100 Pulsed VGS = 4.0 V 90 80 VGS = 4.5 V 70 60 VGS = 10 V 50 40 30 20 100 Pulsed VGS = 10 V 10 VGS = 0 V 1 0.1 ID = 2.3 A 0.01 0.00 25 50 75 100 125 150 175 200 0.50 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE SWITCHING CHARACTERISTICS Ciss 1000 Coss 100 Crss 10 1 10 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF VGS = 0 V f = 1 MHz 100 tf 100 td(off) td(on) 10 1 0.1 0.1 1 1000 100 10 100 VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns di/dt = 100 A/µs VGS = 0 V 60.0 55.0 50.0 45.0 40.0 ID = 6.0 A VDD = 48 V VDD = 30 V VDD = 12 V 8 VGS 6 4 20.0 15.0 2 10.0 5.0 0 0 VDS 2 4 6 8 10 12 14 16 18 20 QG - Gate Charge - nC Data Sheet G14056EJ1V0DS00 12 10 35.0 30.0 25.0 ID - Drain Current - A 4 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 10000 10 10 ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT 1 VDS = 30 V VGS = 10 V RG = 10 Ω tr VDS - Drain to Source Voltage - V 1 0.1 1.50 1000 10000 1 0.1 1.00 VSD - Source to Drain Voltage - V Tch - Channel Temperature - ˚C 0 VGS - Gate to Source Voltage - V 10 − 50 − 25 0 SOURCE TO DRAIN DIODE FORWARD VOLTAGE IF - Diode Forward Current - A RDS(on) - Drain to Source On-state Resistance - mΩ µPA1763 µPA1763 TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE PT - Total Power Dissipation - W/package dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 0 20 40 60 80 100 120 140 160 2.8 Mounted on ceramic substrate 2of 1200 mm × 2.2 mm 2.4 2.0 2 unit 1 unit 1.6 1.2 0.8 0.4 0 20 TA - Ambient Temperature - ˚C 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA Mounted on ceramic substrate of 1200mm2 × 2.2 mm, 1 unit 10 (V PW ID(pulse) d ite im ) ) L 0V on S( = 1 RD GS PW ID(DC) Po we r PW =1 =1 0 0µ m s s s m s ipa tio n Lim ite TA = 25 ˚C Single Pulse 0.1 0.1 =1 0m 00 Di PW =1 ss 1 d 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A 100 1000 Rth(ch-A) = 73.5˚C/W 100 10 1 0.1 0.01 100 µ Mounted on ceramic substrate of 1200mm2 × 2.2 mm Single Pulse, 1 unit 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G14056EJ1V0DS00 5 µPA1763 SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD RG = 25 Ω VDD = 30 V VGS = 20 V 0 V Starting Tch = 25 ˚C 10 IAS = 4.5 A 1 10µ 100µ EAS = 60 mJ 1m 120 Energy Derating Factor - % IAS - Single Avalanche Current - A 100 SINGLE AVALANCHE ENERGY DERATING FACTOR 100 0V 80 60 40 20 10m L - Inductive Load - H 6 RG = 25 Ω VDD = 30 V VGS = 20 V IAS 4.5 A 0 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - ˚C Data Sheet G14056EJ1V0DS00 µPA1763 [MEMO] Data Sheet G14056EJ1V0DS00 7 µPA1763 • The information in this document is subject to change without notice. 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