DATA SHEET MOS FIELD EFFECT TRANSISTOR µPA2713GR SWITCHING P-CHANNEL POWER MOS FET DESCRIPTION PACKAGE DRAWING (Unit: mm) The µPA2713GR is P-channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. 8 5 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8: Drain FEATURES • Low on-state resistance RDS(on)1 = 16 mΩ MAX. (VGS = −10 V, ID = −4.0 A) RDS(on)2 = 25 mΩ MAX. (VGS = −4.5 V, ID = −4.0 A) RDS(on)3 = 30 mΩ MAX. (VGS = −4.0 V, ID = −4.0 A) • Low Ciss: Ciss = 1600 pF TYP. • Small and surface mount package (Power SOP8) ORDERING INFORMATION PART NUMBER PACKAGE µPA2713GR Power SOP8 6.0 ±0.3 4 4.4 5.37 MAX. 0.8 0.15 +0.10 –0.05 1.44 0.05 MIN. 1.8 MAX. 1 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS −30 V Gate to Source Voltage (VDS = 0 V) VGSS m20 V Drain Current (DC) ID(DC) m8 A ID(pulse) m32 A PT1 2 W PT2 2 W Tch 150 °C Tstg −55 to +150 °C IAS 8 A EAS 6.4 mJ Drain Current (pulse) Note1 Total Power Dissipation Note2 Total Power Dissipation Note3 Channel Temperature Storage Temperature Single Avalanche Current Note4 Single Avalanche Energy Note4 Notes 1. 2. 3. 4. EQUIVALENT CIRCUIT Drain Body Diode Gate PW ≤ 10 µs, Duty Cycle ≤ 1% 2 Mounted on ceramic substrate of 1200 mm x 2.2 mm Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, L = 100 µH, VGS = −20 → 0 V Source Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G15981EJ1V0DS00 (1st edition) Date Published January 2003 NS CP(K) Printed in Japan 2002 µPA2713GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = −30 V, VGS = 0 V −1 µA Gate Leakage Current IGSS VGS = m20 V, VDS = 0 V m100 nA −2.5 V Gate Cut-off Voltage Note Forward Transfer Admittance Note Drain to Source On-state Resistance Note VGS(off) VDS = −10 V, ID = −1 mA −1.0 | yfs | VDS = −10 V, ID = −4.0 A 6 RDS(on)1 VGS = −10 V, ID = −4.0 A 12 16 mΩ RDS(on)2 VGS = −4.5 V, ID = −4.0 A 17 25 mΩ RDS(on)3 VGS = −4.0 V, ID = −4.0 A 20 30 mΩ 14 S Input Capacitance Ciss VDS = −10 V 1600 pF Output Capacitance Coss VGS = 0 V 450 pF Reverse Transfer Capacitance Crss f = 1 MHz 270 pF Turn-on Delay Time td(on) VDD = −15 V, ID = −4.0 A 9 ns VGS = −10 V 15 ns RG = 10 Ω 83 ns 43 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = −24 V 35 nC Gate to Source Charge QGS VGS = −10 V 4.8 nC Gate to Drain Charge QGD ID = 8 A 10 nC Body Diode Forward Voltage VF(S-D) IF = 8 A, VGS = 0 V 0.81 V Reverse Recovery Time trr IF = 8 A, VGS = 0 V 43 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 29 nC Note Pulsed: PW ≤ 350 µs, Duty Cycle ≤ 2% TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = −20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VDD VGS(−) RL Wave Form RG PG. VGS 0 VGS 10% 90% VDD VDS(−) 90% IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE 2 10% 0 10% Wave Form VDD PG. 90% VDS VGS(−) 0 BVDSS D.U.T. IG = −2 mA RL 50 Ω VDD Data Sheet G15981EJ1V0DS td(on) tr ton td(off) tf toff µPA2713GR TYPICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 2.8 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 Mounted on ceramic substrate of 1200 mm 2 x 2.2 mm 2.4 2 1.6 1.2 0.8 0.4 0 0 0 25 50 75 100 125 150 0 175 25 50 75 100 125 150 175 TA - Ambient Temperature - °C TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA - 100 PW = 100 µs I D(DC) - 10 1 ms -1 R DS(on) Lim ited 10 m s (V GS = 10 V) 100 m s Power Dissipation Lim ited - 0.1 DC Single pulse M ounted on ceram ic substrate of 1200 m m 2 x 2.2 m m - 0.01 - 0.01 - 0.1 -1 - 10 - 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W ID - Drain Current - A I D(pulse) Rth(ch-A) = 62.5°C/W 100 10 1 0.1 Single pulse 2 Mounted on ceramic substrate of 1200 mm x 2.2 mm 0.01 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G15981EJ1V0DS 3 µPA2713GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS - 40 - 100 V DS = −10 V Pulsed −4.5 V - 30 ID - Drain Current - A ID - Drain Current - A Pulsed V GS = −10 V −4.0 V - 20 - 10 0 - 10 T ch = −55°C 25°C 75°C 150°C -1 - 0.1 - 0.01 0 - 0.2 - 0.4 - 0.6 - 0.8 -1 0 -1 VDS - Drain to Source Voltage - V VGS(off) - Gate Cut-off Voltage - V -3 V DS = −10 V I D = −1 mA -2 - 1.5 -1 - 0.5 0 -50 0 50 100 150 100 35 30 20 = −4.0 V −4.5 V 15 −10 V 10 5 0 - 0.1 -1 - 10 - 100 RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ Pulsed V GS 10 1 0.1 - 0.1 -1 - 10 - 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 40 Pulsed 30 20 ID = −4.0 A 10 ID - Drain Current - A 4 -5 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 25 -4 V DS = −10 V T ch = −55°C Pulsed 25°C 75°C 150°C Tch - Channel Temperature - °C 40 -3 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE - 2.5 -2 VGS - Gate to Source Voltage - V 0 0 -5 - 10 - 15 VGS - Gate to Source Voltage - V Data Sheet G15981EJ1V0DS - 20 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 10000 ID = −4.0 A Pulsed VGS = −4.0 V 25 20 −4.5 V 15 −10 V 10 5 V GS = 0 V f = 1 M Hz C iss 1000 C oss 0 -50 0 50 100 10 - 0.01 150 Tch - Channel Temperature - °C VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns - 10 - 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 td(off) tf tr 10 td(on) - 15 V DD = −24 V −15 V −6 V - 20 - 10 V GS - 10 -5 V DS 0 -1 - 10 - 100 0 0 ID - Drain Current - A 10 20 30 40 QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 1000 1000 trr - Reverse Recovery Time - ns Pulsed IF - Diode Forward Current - A -1 - 30 V DD = −15 V V GS = −10 V R G = 10 Ω 1 - 0.1 - 0.1 VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS 1000 C rss 100 100 10 V GS = −10 V 0V 1 0.1 di/dt = 100 A/µs V GS = 0 V 100 10 0.01 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VF(S-D) - Source to Drain Voltage - V 0.1 1 10 100 IF - Diode Forward Current - A Data Sheet G15981EJ1V0DS 5 VGS - Gate to Source Voltage - V 30 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ µPA2713GR µPA2713GR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD SINGLE AVALANCHE ENERGY DERATING FACTOR 120 Energy Derating Factor - % IAS - Single Avalanche Current - A - 100 IAS = −8 A - 10 EAS = 6.4 mJ -1 VDD = −15 V RG = 25 Ω VGS = −20 → 0 V Starting Tch = 25°C - 0.1 0.01 100 80 60 40 20 0 0.1 1 10 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - °C L - Inductive Load - mH 6 V DD = −15 V R G = 25 Ω V GS = −20 → 0 V IAS ≤ −8 A Data Sheet G15981EJ1V0DS µPA2713GR • The information in this document is current as of January, 2003. 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