SSC SSM4228M

SSM4228M/GM
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Low on-resistance
High Vgs rating
D2
D1
D2
D1
Surface-mount package
S1
30V
R DS(ON)
25mΩ
6.8A
ID
G2
S2
SO-8
BV DSS
G1
Description
D2
D1
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, ultra low on-resistance and
cost-effectiveness.
G2
G1
S1
S2
This device is available with Pb-free lead finish (second-level interconnect) as SSM4228GM.
Absolute Maximum Ratings
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
30
V
± 25
V
Continuous Drain Current
3
6.8
A
Continuous Drain Current
3
5.5
A
30
A
1,4
IDM
Pulsed Drain Current
PD @ TA=25°C
Total Power Dissipation
2
A
Linear Derating Factor
0.016
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
4/26/2004 Rev.2.10
Parameter
Thermal Resistance Junction-ambient
Max.
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Value
Unit
62.5
°C/W
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SSM4228M/GM
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
30
-
-
V
V/°C
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.03
-
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=6A
-
15
25
mΩ
VGS=4.5V, ID=4A
-
22
35
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VGS=0V, ID=250uA
Min.
VDS=10V, ID=6A
-
15
-
S
o
VDS=30V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=24V ,VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ± 25V
-
-
±100
nA
ID=6A
-
17.5
-
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=20V
-
4.7
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=5V
-
8.5
-
nC
VDS=20V
-
10.6
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=2A
-
12.4
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω ,VGS=10V
-
26.2
-
ns
tf
Fall Time
RD=10Ω
12
-
ns
Ciss
Input Capacitance
VGS=0V
-
1535
-
pF
Coss
Output Capacitance
VDS=25V
-
310
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
200
-
pF
Min.
Typ.
-
-
1.7
A
-
-
30
A
-
-
1.3
V
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.3V
Continuous Source Current ( Body Diode )
1
Pulsed Source Current ( Body Diode )
Forward On Voltage
2
Tj=25°C,IS=1.7A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on FR4 board, t<10 sec.
4.Pulse width <10us , duty cycle <1%.
4/26/2004 Rev.2.10
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2 of 6
SSM4228M/GM
35
35
T C =25 o C
V G =5.0V
V G =10V
V G =5.0V
28
ID , Drain Current (A)
28
ID , Drain Current (A)
T C =150 o C
V G =10V
V G =4.0V
21
14
V G =4.0V
21
14
7
7
V G =3.0V
V G =3.0V
0
0
0
1
2
0
3
1
2
3
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1.8
80
Id=6A
T c =25°C
I D =6A
V G =10V
1.6
Normalized R DS(ON)
RDSON (mΩ )
60
40
1.4
1.2
1
20
0.8
0
0.6
2
4
6
8
10
12
-50
0
100
150
o
V GS (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
4/26/2004 Rev.2.10
50
Fig 4. Normalized On-Resistance
vs. Junction Temperature
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SSM4228M/GM
8
2.5
2
1.5
PD (W)
ID , Drain Current (A)
6
4
1
2
0.5
0
0
25
50
75
100
125
150
0
50
o
100
150
o
T c , Case Temperature ( C)
T c , Case Temperature ( C)
Fig 5. Maximum Drain Current vs.
Case Temperature
Fig 6. Typical Power Dissipation
1
100
Normalized Thermal Response (R thja)
DUTY=0.5
10
1ms
ID (A)
10ms
100ms
1
1s
0.1
10s
T c =25 o C
Single Pluse
0.2
0.1
0.1
0.05
0.02
0.01
PDM
t
0.01
T
SINGLE PULSE
Duty factor = t/T
Peak Tj = P DM x Rthja + Ta
DC
0.001
0.01
0.0001
0.1
1
10
0.001
0.1
1
10
100
1000
t , Pulse Width (s)
V DS (V)
Fig 7. Maximum Safe Operating Area
4/26/2004 Rev.2.10
0.01
100
Fig 8. Effective Transient Thermal Impedance
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SSM4228M/GM
f=1.0MHz
15
10000
Id=6A
V DS =20V
Ciss
VGS , Gate to Source Voltage (V)
12
1000
C (pF)
9
Coss
6
Crss
100
3
0
10
0
10
20
30
40
1
6
11
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
21
26
31
Fig 10. Typical Capacitance Characteristics
2.5
10
Tj=150 o C
Tj=25 o C
2
VGS(th) (V)
IS(A)
16
V DS (V)
1
1.5
1
0.1
0
0.4
0.8
1.2
1.6
-50
0
100
150
T j , Junction Temperature ( C )
Fig 11. Forward Characteristic of
Fig 12. Gate Threshold Voltage vs.
Reverse Diode
4/26/2004 Rev.2.10
50
o
V SD (V)
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Junction Temperature
5 of 6
SSM4228M/GM
VDS
90%
RD
VDS
D
0.64 x RATED VDS
G
RG
TO THE
OSCILLOSCOPE
+
10%
VGS
S
10 v
VGS
-
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
D
5V
0.64 x RATED VDS
G
S
QG
TO THE
OSCILLOSCOPE
QGS
QGD
VGS
+
1~ 3 mA
IG
I
D
Charge
Fig 15. Gate Charge Circuit
Q
Fig 16. Gate Charge Waveform
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responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
4/26/2004 Rev.2.10
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