SSM9934GM
2N AND 2P-CHANNEL ENHANCEMENT
MODE POWER MOSFET
PRODUCT SUMMARY
N-CH BVDSS
P2G
N2D/P2D
Simple Drive Requirement
Low On-resistance
Full Bridge Application on
LCD Monitor Inverter
35V
RDS(ON)
P1S/P2S
P1G
ID
N2G
N1S/N2S
4.3A
P-CH BVDSS
N1D/P1D
SO-8
48mΩ
N1G
DESCRIPTION
The advanced power MOSFETs from Silicon Standard Corp.
provide the designer with the best combination of fast
switching, ruggedized device design, low on-resistance and
cost-effectiveness.
The SO-8 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage
applications such as DC/DC converters.
-35V
RDS(ON)
72mΩ
ID
-3.6A
P1S
P2S
P1G
P2G
P1N1D
P2N2D
N2G
N1G
N1S
N2S
Pb-free; RoHS-compliant
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
N-channel
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TA=25℃
ID@TA=70℃
Units
P-channel
35
-35
V
± 20
± 20
V
Continuous Drain Current
3
4.3
-3.6
A
Continuous Drain Current
3
3.4
-2.8
A
20
-20
A
1
IDM
Pulsed Drain Current
PD@TA=25℃
Total Power Dissipation
1.38
W
Linear Derating Factor
0.01
W/℃
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
THERMAL DATA
Symbol
Rthj-a
09/13/2007 Rev.1.00
Parameter
Thermal Resistance Junction-ambient
3
Max.
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Value
Unit
90
℃/W
1
SSM9934GM
N-CH ELECTRICAL CHARACTERISTICS
o
@Tj=25 C (unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
35
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.03
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance 2
VGS=10V, ID=4A
-
-
48
mΩ
VGS=4.5V, ID=3A
-
-
70
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VDS=10V, ID=4A
-
8
-
S
o
VDS=30V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
ID=4A
-
6
10
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=250uA
Min.
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=28V
-
2
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
3
-
nC
2
td(on)
Turn-on Delay Time
VDS=15V
-
6
-
ns
tr
Rise Time
ID=1A
-
5
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=10V
-
14
-
ns
tf
Fall Time
RD=15Ω
-
4
-
ns
Ciss
Input Capacitance
VGS=0V
-
490
780
pF
Coss
Output Capacitance
VDS=25V
-
130
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
55
-
pF
Min.
Typ.
IS=1.2A, VGS=0V
-
-
1.2
V
SOURCE-DRAIN DIODE
Symbol
Parameter
2
Test Conditions
Max. Units
VSD
Forward On Voltage
trr
Reverse Recovery Time
IS=4A, VGS=0V
-
18
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
11
-
nC
09/13/2007 Rev.1.00
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2
SSM9934GM
P-CH ELECTRICAL CHARACTERISTICS
o
@Tj=25 C (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
-35
-
-
V
-
-0.02
-
V/℃
VGS=-10V, ID=-3A
-
-
72
mΩ
VGS=-4.5V, ID=-2A
-
-
100
mΩ
VDS=VGS, ID=-250uA
-1
-
-3
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃,ID=-1mA
RDS(ON)
2
Static Drain-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
IGSS
VGS=0V, ID=-250uA
Max. Units
VDS=-10V, ID=-3A
-
6
-
S
o
VDS=-30V, VGS=0V
-
-
-1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=-24V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
Drain-Source Leakage Current (Tj=25 C)
2
Qg
Total Gate Charge
ID=-3A
-
6
10
nC
Qgs
Gate-Source Charge
VDS=-28V
-
1
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-4.5V
-
3
-
nC
VDS=-15V
-
7
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
5
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=-10V
-
19
-
ns
tf
Fall Time
RD=15Ω
-
4
-
ns
Ciss
Input Capacitance
VGS=0V
-
420
1100
pF
Coss
Output Capacitance
VDS=-25V
-
140
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
65
-
pF
Min.
Typ.
SOURCE-DRAIN DIODE
Symbol
Parameter
Test Conditions
2
Max. Units
VSD
Forward On Voltage
IS=-1.2A, VGS=0V
-
-
-1.2
V
trr
Reverse Recovery Time
IS=-3A, VGS=0V
-
20
-
ns
Qrr
Reverse Recovery Charge
dI/dt=-100A/µs
-
16
-
nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
2
3.Surface mounted on 1 in copper pad of FR4 board , t <10sec ; 186 ℃/W when mounted on Min. copper pad.
09/13/2007 Rev.1.00
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3
SSM9934GM
N-Channel
21
21
o
T A =25 C
15
10V
7.0V
5.0V
18
ID , Drain Current (A)
ID , Drain Current (A)
T A = 150 o C
10V
7.0V
5.0V
4.5V
18
12
9
6
15
4.5V
12
9
6
V G =2.5V
V G =2.5V
3
3
0
0
0
1
2
3
4
5
6
0
1
3
4
5
6
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
70
1.6
I D =3A
I D =4A
V G =10V
1.4
T A =25 o C
Normalized RDS(ON)
60
RDS(ON) (mΩ )
2
50
1.2
1.0
40
0.8
0.6
30
2
4
6
8
10
-50
V GS , Gate-to-Source Voltage (V)
0
50
100
150
o
T j , Junction Temperature ( C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
5
2
Normalized VGS(th) (V)
4
IS(A)
3
T j =150 o C
T j =25 o C
2
1.5
1
0.5
1
0
0
0
0.2
0.4
0.6
0.8
1
1.2
-50
0
50
100
o
150
V SD , Source-to-Drain Voltage (V)
T j ,Junction Temperature (
Fig 5. Forward Characteristic of
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
Reverse Diode
09/13/2007 Rev.1.00
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C)
4
SSM9934GM
N-Channel
f=1.0MHz
1000
VGS , Gate to Source Voltage (V)
12
ID=4A
V DS = 2 8 V
10
C iss
C (pF)
8
6
C oss
100
C rss
4
2
0
10
0
3
6
9
12
1
5
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
ID (A)
10
100us
1ms
1
10ms
100ms
0.1
T A =25 o C
Single Pulse
1s
DC
0.01
Normalized Thermal Response (Rthja)
Duty factor=0.5
0.2
0.1
0.1
0.05
0.02
P DM
t
0.01
T
Single Pulse
0.01
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja = 186℃
℃ /W
0.001
0.1
1
10
100
0.0001
0.001
0.01
VDS
1
10
100
1000
t , Pulse Width (s)
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
Fig 10. Effective Transient Thermal Impedance
VG
90%
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
09/13/2007 Rev.1.00
Charge
Q
Fig 12. Gate Charge Waveform
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5
SSM9934GM
P-Channel
21
21
T A =25 o C
15
T A = 150 C
18
12
9
V G = - 2.5V
6
3
15
-4.5V
12
9
V G = - 2.5V
6
3
0
0
0
1
2
3
4
5
0
1
2
3
4
5
-V DS , Drain-to-Source Voltage (V)
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
1.6
I D = -3 A
V G = - 10V
I D = -2 A
1.4
T A =25 o C
Normalized R DS(ON)
90
RDS(ON) (mΩ )
-10V
-7.0V
-5.0V
o
-10V
-7.0V
-5.0V
-4.5V
-ID , Drain Current (A)
-ID , Drain Current (A)
18
80
1.2
1.0
70
0.8
0.6
60
2
4
6
8
-50
10
50
100
150
o
-V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
2
Normalized -VGS(th) (V)
4
3
-IS(A)
0
T j =25 o C
T j =150 o C
2
1.5
1
0.5
1
0
0
0
0.2
0.4
0.6
0.8
1
1.2
-50
Fig 5. Forward Characteristic of
Reverse Diode
09/13/2007 Rev.1.00
0
50
100
150
T j , Junction Temperature ( o C)
-V SD , Source-to-Drain Voltage (V)
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
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6
SSM9934GM
P-Channel
f=1.0MHz
-VGS , Gate to Source Voltage (V)
12
1000
I D = -3 A
V DS = - 2 8 V
10
C iss
C (pF)
8
6
C oss
100
C rss
4
2
0
10
0
3
6
9
12
1
5
9
13
17
21
25
29
-V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Normalized Thermal Response (Rthja)
Duty factor=0.5
10
-ID (A)
100us
1ms
1
10ms
100ms
0.1
T A =25 o C
Single Pulse
1s
DC
0.01
0.1
1
10
100
0.2
0.1
0.1
0.05
0.02
PDM
t
0.01
T
Single Pulse
0.01
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja = 186℃
℃ /W
0.001
0.0001
0.001
0.01
-V DS , Drain-to-Source Voltage (V)
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
VDS
Fig 10. Effective Transient Thermal Impedance
VG
90%
QG
-4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
09/13/2007 Rev.1.00
Charge
Q
Fig 12. Gate Charge Waveform
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7
SSM9934GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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4