SO T2 3 PMV75UP 20 V, P-channel Trench MOSFET 25 April 2014 Product data sheet 1. General description P-channel enhancement mode Field-Effect Transistor (FET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology. 2. Features and benefits • • • • Trench MOSFET technology Low threshold voltage Very fast switching Enhanced power dissipation capability: Ptot = 1000 mW 3. Applications • • • • LED driver Power management High-side loadswitch Switching circuits 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - -20 V VGS gate-source voltage -12 - 12 V ID drain current - - -3.2 A - 77 102 mΩ VGS = -4.5 V; Tamb = 25 °C; t ≤ 5 s [1] Static characteristics RDSon drain-source on-state resistance [1] VGS = -4.5 V; ID = -2.5 A; Tj = 25 °C Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for 2 drain 6 cm . Scan or click this QR code to view the latest information for this product PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 S source 3 D drain Simplified outline Graphic symbol D 3 G 1 2 TO-236AB (SOT23) S 017aaa257 6. Ordering information Table 3. Ordering information Type number PMV75UP Package Name Description Version TO-236AB plastic surface-mounted package; 3 leads SOT23 7. Marking Table 4. Marking codes Type number Marking code [1] PMV75UP %CN [1] PMV75UP Product data sheet % = placeholder for manufacturing site code All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 2 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - -20 V VGS gate-source voltage -12 12 V ID drain current VGS = -4.5 V; Tamb = 25 °C; t ≤ 5 s [1] - -3.2 A VGS = -4.5 V; Tamb = 25 °C [1] - -2.5 A VGS = -4.5 V; Tamb = 100 °C [1] - -1.6 A - -10 A [2] - 490 mW [1] - 1000 mW - 5000 mW IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs Ptot total power dissipation Tamb = 25 °C Tsp = 25 °C Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C - -0.9 A Source-drain diode IS source current Tamb = 25 °C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for [2] drain 6 cm . Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 2 017aaa123 120 Pder (%) 017aaa124 120 Ider (%) 80 80 40 40 0 - 75 Fig. 1. [1] - 25 25 75 125 Tj (°C) Normalized total power dissipation as a function of junction temperature PMV75UP Product data sheet 0 - 75 175 Fig. 2. - 25 75 125 Tj (°C) 175 Normalized continuous drain current as a function of junction temperature All information provided in this document is subject to legal disclaimers. 25 April 2014 25 © NXP Semiconductors N.V. 2014. All rights reserved 3 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET aaa-012262 -102 ID (A) Limit RDSon = VDS/ID -10 tp = 10 µs tp = 100 µs -1 tp = 1 ms tp = 10 ms DC; Tsp = 25 °C -10-1 tp = 100 ms DC; Tamb = 25 °C; drain mounting pad 6 cm2 -10-2 -10-1 -1 -10 -102 VDS (V) IDM = single pulse Fig. 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drainsource voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Rth(j-sp) in free air; t ≤ 5 s thermal resistance from junction to solder point [1] [2] PMV75UP Product data sheet Min Typ Max Unit [1] - 217 255 K/W [2] - 105 124 K/W [2] - 73 86 K/W - 20 25 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm . All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 4 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET aaa-012832 103 Zth(j-a) (K/W) duty cycle = 1 102 0.5 0.25 0.1 10 0.75 0.33 0.2 0.05 0.02 0 0.01 1 10- 3 10- 2 10- 1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values aaa-012833 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.33 0.25 0.1 10 0 1 10- 3 0.5 0.2 0.05 0.02 0.01 10- 2 10- 1 FR4 PCB, mounting pad for drain 6 cm Fig. 5. 1 10 102 tp (s) 103 2 Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PMV75UP Product data sheet All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 5 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = -250 µA; VGS = 0 V; Tj = 25 °C -20 - - V VGSth gate-source threshold voltage ID = -250 µA; VDS = VGS; Tj = 25 °C -0.47 -0.68 -0.9 V IDSS drain leakage current VDS = -20 V; VGS = 0 V; Tj = 25 °C - - -1 µA IGSS gate leakage current VGS = 12 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -12 V; VDS = 0 V; Tj = 25 °C - - -100 nA VGS = -4.5 V; ID = -2.5 A; Tj = 25 °C - 77 102 mΩ VGS = -4.5 V; ID = -2.4 A; Tj = 150 °C - 110 146 mΩ VGS = -2.5 V; ID = -2.2 A; Tj = 25 °C - 95 125 mΩ VGS = -1.8 V; ID = -1 A; Tj = 25 °C - 120 156 mΩ RDSon drain-source on-state resistance gfs forward transconductance VDS = -10 V; ID = -2 A; Tj = 25 °C - 15 - S RG internal gate resistance (AC) f = 1 MHz - 41 - Ω total gate charge VDS = -10 V; ID = -2.5 A; VGS = -4.5 V; - 5 7.5 nC QGS gate-source charge Tj = 25 °C - 0.7 - nC QGD gate-drain charge - 0.9 - nC Ciss input capacitance VDS = -10 V; f = 1 MHz; VGS = 0 V; - 550 - pF Coss output capacitance Tj = 25 °C - 63 - pF Crss reverse transfer capacitance - 53 - pF td(on) turn-on delay time VDS = -10 V; ID = -2.5 A; VGS = -4.5 V; - 6 - ns tr rise time RG(ext) = 6 Ω; Tj = 25 °C - 14 - ns td(off) turn-off delay time - 120 - ns tf fall time - 50 - ns - -0.8 -1.2 V Dynamic characteristics QG(tot) Source-drain diode VSD source-drain voltage PMV75UP Product data sheet IS = -0.9 A; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 6 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 017aaa531 -10 -10 V ID (A) -4.5 V -8 VGS = -1.8 V -2 V aaa-012263 -10-3 ID (A) -2.5 V -10-4 -1.6 V min -6 typ max -1.5 V -4 -10-5 -1.4 V -2 -1.2 V -1 V 0 Fig. 6. 0 -1 -2 -3 VDS (V) -10-6 -4 0 -0.5 -1.0 VGS (V) -1.5 Tj = 25 °C Tj = 25 °C; VDS = -5 V Output characteristics: drain current as a Fig. 7. function of drain-source voltage; typical values Sub-threshold drain current as a function of gate-source voltage aaa-012264 0.3 -1.3 V aaa-012265 0.4 -1.4 V RDSon (Ω) RDSon (Ω) -1.6 V 0.3 -1.8 V 0.2 0.2 -2.5 V 0.1 Tj = 150 °C 0.1 VGS = -4.5 V 0 0 -1 -2 -3 ID (A) Tj = 25 °C 0 -4 Tj = 25 °C Fig. 8. Product data sheet -1 -2 -3 -4 VGS (V) -5 ID = -3 A Drain-source on-state resistance as a function of drain current; typical values PMV75UP 0 Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 7 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 017aaa535 -10 017aaa536 2.0 ID (A) a -8 1.5 -6 1.0 -4 0.5 -2 0 Tj = 150 °C 0 -0.5 Tj = 25 °C -1.0 -1.5 0 -60 -2.0 -2.5 VGS (V) VDS > ID × RDSon Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values 60 120 Tj (°C) 180 Fig. 11. Normalized drain-source on-state resistance as a function of junction temperature; typical values 0aaa-012266 -1.5 0 017aaa538 103 Ciss VGS(th) (V) C (pF) -1.0 max 102 typ -0.5 Coss min 0 -60 0 60 Crss 120 Tj (°C) 10 -10-1 180 ID = 0.25 mA; VDS = VGS Product data sheet -10 VDS (V) -102 f = 1 MHz; VGS = 0 V Fig. 12. Gate-source threshold voltage as a function of junction temperature PMV75UP -1 Fig. 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 8 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET aaa-012267 -5 VDS VGS (V) ID -4 VGS(pl) -3 VGS(th) VGS -2 QGS1 QGS2 QGS -1 QGD QG(tot) 017aaa137 0 0 2 4 QG (nC) 6 Fig. 15. Gate charge waveform definitions ID = -2.8 A; VDS = -10 V; Tamb = 25 °C Fig. 14. Gate-source voltage as a function of gate charge; typical values 017aaa540 -4 IS (A) -3 -2 -1 0 Tj = 150 °C 0 -0.4 Tj = 25 °C -0.8 -1.2 VSD (V) -1.4 VGS = 0 V Fig. 16. Source current as a function of source-drain voltage; typical values PMV75UP Product data sheet All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 9 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 11. Test information P t2 duty cycle δ = t1 t2 t1 t 006aaa812 Fig. 17. Duty cycle definition 12. Package outline 3.0 2.8 1.1 0.9 3 0.45 0.15 2.5 1.4 2.1 1.2 1 2 1.9 0.48 0.38 Dimensions in mm 0.15 0.09 04-11-04 Fig. 18. Package outline TO-236AB (SOT23) PMV75UP Product data sheet All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 10 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 13. Soldering 3.3 2.9 1.9 solder lands 3 solder resist 2 1.7 solder paste occupied area 0.6 (3×) 0.7 (3×) Dimensions in mm 0.5 (3×) 0.6 (3×) 1 sot023_fr Fig. 19. Reflow soldering footprint for TO-236AB (SOT23) 2.2 1.2 (2×) 1.4 (2×) solder lands 4.6 solder resist 2.6 occupied area Dimensions in mm 1.4 preferred transport direction during soldering 2.8 4.5 sot023_fw Fig. 20. Wave soldering footprint for TO-236AB (SOT23) PMV75UP Product data sheet All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 11 / 15 PMV75UP NXP Semiconductors 20 V, P-channel Trench MOSFET 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PMV75UP v.1 20140425 Product data sheet - - PMV75UP Product data sheet All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................3 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 6 11 Test information ................................................... 10 12 Package outline ................................................... 10 13 Soldering .............................................................. 11 14 Revision history ................................................... 12 15 15.1 15.2 15.3 15.4 Legal information .................................................13 Data sheet status ............................................... 13 Definitions ...........................................................13 Disclaimers .........................................................13 Trademarks ........................................................ 14 © NXP Semiconductors N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 25 April 2014 PMV75UP Product data sheet All information provided in this document is subject to legal disclaimers. 25 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 15 / 15