DATA SHEET MOS FIELD EFFECT TRANSISTOR µPA1857 N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING PACKAGE DRAWING (Unit: mm) DESCRIPTION The µPA1857 features a low on-state resistance and excellent switching characteristics, and is suitable for applications such as power switch of portable machine and so on. 8 5 1 2, 3 4 5 6, 7 8 FEATURES • Low on-state resistance RDS(on)1 = 67.0 mΩ MAX. (VGS = 10 V, ID = 2.0 A) RDS(on)2 = 86.0 mΩ MAX. (VGS = 4.5 V, ID = 2.0 A) RDS(on)3 = 95.0 mΩ MAX. (VGS = 4.0 V, ID = 2.0 A) • Low Ciss Ciss = 580 pF TYP. • Built-in G-S protection diode against ESD µ PA1857GR-9JG Power TSSOP8 1 4 0.65 VDSS 60 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) (TA = 25°C) ID(DC) ±3.8 A ID(pulse) ±15.2 A PT1 1.0 W PT2 1.7 W Note2 Note2 Total Power Dissipation (2unit) Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to +150 °C IAS 3.8 A EAS 33 mJ Single Avalanche Current Note3 Single Avalanche Energy Note3 1.0 ±0.2 0.1 0.10 M EQUIVALENT CIRCUIT Drain to Source Voltage (VGS = 0 V) Total Power Dissipation (1unit) 4.4 ±0.1 0.8 MAX. ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Note1 0.5 0.6 +0.15 –0.1 6.4 ±0.2 3.15 ±0.15 3.0 ±0.1 0.27 +0.03 –0.08 Drain Current (pulse) 0.25 0.1±0.05 0.145 ±0.055 PACKAGE 1.2 MAX. 1.0±0.05 3° +5° –3° ORDERING INFORMATION PART NUMBER :Drain1 :Source1 :Gate1 :Gate2 :Source2 :Drain2 Drain1 Gate1 Drain2 Body Diode Gate Protection Diode Source1 Gate2 Body Diode Gate Protection Diode Source2 Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2 2. TA = 25°C Mounted on ceramic substrate of 50 cm x 1.1 mm 3. Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15060EJ2V0DS00 (2nd edition) Date Published April 2001 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 2001 µPA1857 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 60 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V | yfs | VDS = 10 V, ID = 2.0 A 2.5 5.4 RDS(on)1 VGS = 10 V, ID = 2.0 A 53 67.0 mΩ RDS(on)2 VGS = 4.5 V, ID = 2.0 A 64 86.0 mΩ RDS(on)3 VGS = 4.0 V, ID = 2.0 A 71 95.0 mΩ Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance S Input Capacitance Ciss VDS = 10 V 580 pF Output Capacitance Coss VGS = 0 V 100 pF Reverse Transfer Capacitance Crss f = 1 MHz 50 pF Turn-on Delay Time td(on) VDD = 30 V, ID = 2.0 A 10 ns VGS = 10 V 9 ns RG = 6 Ω 32 ns 4 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = 48 V 12 nC Gate to Source Charge QGS VGS = 10 V 2 nC Gate to Drain Charge QGD ID = 3.8 A 3 nC Body Diode Forward Voltage VF(S-D) IF = 3.8 A, VGS = 0 V 0.80 V Reverse Recovery Time trr IF = 3.8 A, VGS = 0 V 33 ns Reverse Recovery Charge Qrr di/dt = 100 A / µs 58 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω VGS RL Wave Form RG PG. VDD VGS 0 VGS(on) 10% 90% VDD VDS 90% BVDSS IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE PG. 2 50 Ω 10% 0 10% Wave Form VDD D.U.T. IG = 2 mA 90% VDS VGS 0 RL VDD Data Sheet G15060EJ2V0DS td(on) tr ton td(off) tf toff µPA1857 TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. CASE TEMPERATURE DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 2 PT - Total Power Dissipation - W dT - Derating Factor - % 120 100 80 60 40 20 1.8 1.6 1.4 1.2 25 50 75 100 125 TA - Ambient Temperature - ˚C 0 ★ 150 1unit 1 0.8 0.6 0.4 0.2 0 0 25 0 RD V (@ PW ID(pulse) d ite V) Lim10 = 1m s ID(DC) 10 ms 1 DC ( 10 0m DC s ( 2u nit ) 1u nit ) 0.1 Single Pulse Mounted on Ceramic Board of 50 cm2x1.1 mm PD (FET1) : PD (FET2) = 1 : 1 0.01 0.1 100 10.0 1.0 3 VGS(off) - Gate Cut-off Voltage - V ID - Drain Current - A 0.2 0.4 0.6 0.8 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE TA = 125˚C 25˚C 75˚C −25˚C 0.0001 0 4 FORWARD TRANSFER CHARACTERISTICS 0.001 1 2 3 150 4.0 V VGS = 10 V VDS - Drain to Source Voltage - V 0.1 0.00001 8 VDS - Drain to Source Voltage - V 10 0.01 125 12 0 0 100.0 VDS = 10 V 1 100 4.5 V =1 00 µs ID - Drain Current - A ID - Drain Current - A 100 n) GS 75 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 16 o S( 50 TC - Case Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 10 Single Pulse Mounted on Ceramic Board of 50 cm2 x1.1 mm 2unit: PD (FET1) : PD (FET2) = 1 : 1 2unit 4 1.0 VDS = 10 V ID = 1 mA 2.5 2 1.5 1 −50 VGS - Gate to Source Voltage - V 0 50 100 150 Tch - Channel Temperature - ˚C Data Sheet G15060EJ2V0DS 3 FORWARD TRANSFER ADMITTANCE Vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S 100 RDS(on) - Drain to Source On-state Resistance - mΩ µPA1857 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 160 VDS = 10 V VGS = 4.0 V 120 10 1 TA = −25˚C 25˚C 75˚C 125˚C 0.10 0.010 0.01 0.1 1 10 100 TA = 125˚C 75˚C 80 25˚C −25˚C 40 0 0.01 0.1 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 160 VGS = 4.5 V 120 TA = 125˚C 75˚C 80 25˚C −25˚C 40 0 0.01 0.1 1 10 100 ID = 2.0 A 110 4.5 V VGS = 4.0 V 70 10 V 30 0 50 100 150 RDS (on) - Drain to Source On-state Resistance - mΩ RDS (on) - Drain to Source On-state Resistance - mΩ 130 10 −50 160 VGS = 10 V 120 TA = 125˚C 80 75˚C 25˚C −25˚C 40 0 0.01 0.1 1 10 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 150 ID = 2.0 A 125 100 75 50 25 0 0 2 4 6 8 10 12 14 16 VGS - Gate to Source Voltage - V Tch - Channel Temperature - ˚C 4 100 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 50 10 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT ID - Drain Current - A 90 1 ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ ID - Drain Current - A Data Sheet G15060EJ2V0DS 18 20 µPA1857 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE SWITCHING CHARACTERISTICS 100 f = 1 MHz 1000 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 10000 Ciss 100 Coss Crss 10 0.1 1 10 td(off) 10 tf 1 0.1 100 VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns IF - Source to Drain Current - A 1 ID - Drain Current - A 100 VGS = 0 V 10 1 0.1 0.01 0.4 VDD = 30 V VGS(on) = 10 V RG = 6 Ω 0.6 0.8 1 10 REVERSE RECOVERY TIME vs. DRAIN CURRENT SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 td(on) tr 10 1 0.1 1.2 di/dt = 100 A/µs VGS = 0 V VF(S-D) - Body Diode Forward Voltage - V 1.0 10 100 IF - Drain Current - A DYNAMIC INPUT/OUTPUT CHARACTERISTICS VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V 12 10 8 VDD = 48 V 30 V 12 V 6 4 2 ID = 3.8 A 0 0 2 4 6 8 10 12 QG - Gate Charge - nC Data Sheet G15060EJ2V0DS 5 µPA1857 SINGLE AVALANCHE ENERGY DERATING FACTOR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 120 Energy Derating Factor - % IAS - Single Avalanche Current - A 10 IAS = 3.8 A EAS = 33 mJ VDD = 30 V RG = 25 Ω VGS = 20 → 0 V Starting Tch = 25˚C 1 10 µ 100 µ 1m 100 80 60 40 20 0 25 10m 50 75 100 125 150 Starting Tch - Starting Channel Temperature - ˚C L - Inductive Load - H ★ VDD = 30 V RG = 25 Ω VGS = 20 → 0 V IAS ≤ 3.8 A TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W 1000 Rth(ch-A) = 125˚C/W (1unit) Rth(ch-A) = 73.5˚C/W (2unit) 100 10 1 0.01 0.0001 Single Pulse Mounted on Ceramic Board of 50 cm2 x1.1 mm 2unit: PD (FET1) : PD (FET2) = 1 : 1 0.001 0.01 0.1 1 10 PW - Pulse Width - s 6 Data Sheet G15060EJ2V0DS 100 1000 µPA1857 [MEMO] Data Sheet G15060EJ2V0DS 7 µPA1857 • The information in this document is current as of April, 2001. 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