Low Noise, Cascadable Silicon Bipolar MMIC Amplifier Technical Data INA-02100 Features • Cascadable 50 Ω Gain Block • Low Noise Figure: 2.0 dB Typical at 0.5 GHz • High Gain: 31.5 dB Typical at 0.5 GHz 25.0 dB Typical at 1.5 GHz • 3 dB Bandwidth: DC to 1.0 GHz • Unconditionally Stable (k>1) Description The INA-02100 is a low-noise silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) feedback amplifier chip. It is designed for narrow or wide bandwidth industrial and military applications that require high gain and low noise IF or RF amplification. The INA series of MMICs is fabricated using HP’s 10 GHz fT, 25 GHz fMAX, ISOSAT™-I silicon bipolar process which uses nitride self-alignment, submicrometer lithography, trench isolation, ion implantation, gold metallization and polyimide intermetal dielectric and scratch protection to achieve excellent performance, uniformity and reliability. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire.[1] VCC RFC (Optional) Rbias Cblock RF IN Cblock 3 1 2 5965-9673E RF OUT GND 2 GND 1 RF IN Notes: 1. See Application Note, “A005: Transistor Chip Use” for additional information. Typical Biasing Configuration 4 Chip Outline[1] RF OUT Vd = 5.5 V (Nominal) 6-90 INA-02100 Absolute Maximum Ratings Absolute Maximum[1] Parameter Device Current Power Dissipation[2,3] RF Input Power Junction Temperature Storage Temperature Thermal Resistance[2]: θjc = 60°C/W 50 mA 400 mW +13 dBm 200°C –65 to 200°C Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TMounting Surface (TMS) = 25°C 3. Derate at 16.7 mW/°C for TMS > 176°C. INA-02100 Electrical Specifications [1,3], TA = 25°C Symbol Parameters and Test Conditions [2]: Id = 35 mA, ZO = 50 Ω GP Power Gain (|S21| 2) f = 0.5 GHz ∆GP Gain Flatness f = 0.1 to 1.0 GHz f3 dB 3 dB Bandwidth ISO Reverse Isolation (|S12| 2) f = 0.01 to 1.0 GHz Input VSWR f = 0.01 to 1.0 GHz VSWR Output VSWR f = 0.01 to 1.0 GHz NF 50 Ω Noise Figure f = 0.5 GHz Units Min. Typ. dB 31.5 dB ± 1.5 GHz 1.0 dB Max. 39 1.4:1 1.5:1 dB 2.0 P1 dB Output Power at 1 dB Gain Compression f = 0.5 GHz dBm 11 IP3 Third Order Intercept Point f = 0.5 GHz dBm 23 tD Group Delay f = 0.5 GHz psec Vd Device Voltage dV/dT Device Voltage Temperature Coefficient V 350 4.0 5.5 mV/°C 7.0 +10 Notes: 1. The recommended operating current range for this device is 30 to 40 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer. 3. The values are the achievable performance for the INA-02100 mounted in a 70 mil stripline package. INA-02100 Typical Scattering Parameters[1] (ZO = 50 Ω, TA = 25°C, Id = 5 mA) S21 S11 S12 S22 Freq. GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang k 0.01 0.05 0.10 0.20 0.30 0.40 0.50 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 2.50 3.00 0.06 0.05 0.03 0.02 0.01 0.02 0.03 0.06 0.10 0.17 0.24 0.30 0.37 0.42 0.46 0.50 0.51 –4 –8 –46 –52 –46 –44 –35 –29 –41 –60 –73 –89 –103 –116 –128 –146 –162 32.5 32.5 32.3 31.8 31.1 30.4 29.7 29.0 27.9 26.9 26.0 25.1 24.1 22.9 21.5 18.3 14.6 42.1 42.0 41.3 39.0 36.2 33.3 30.7 28.4 24.8 22.0 19.9 18.0 16.0 14.0 12.0 8.2 5.4 –2 –8 –16 –30 –43 –55 –65 –74 –92 –108 –124 –141 –157 –174 171 142 116 –39.3 –39.4 –37.9 –39.2 –38.8 –40.4 –39.3 –39.5 –38.1 –36.4 –35.5 –34.1 –32.6 –33.1 –31.4 –29.3 –28.5 .011 .011 .013 .011 .011 .010 .011 .011 .012 .015 .017 .020 .023 .022 .027 .034 .038 14 12 6 –4 –12 –2 –17 –5 –9 –19 –16 –16 –30 –28 –31 –44 –47 .20 .20 .20 .21 .22 .24 .26 .28 .32 .34 .36 .38 .32 .26 .22 .19 .15 –1 1 –1 3 4 2 –1 –4 –14 –26 –40 –60 –91 –111 –122 –148 178 1.27 1.28 1.17 1.33 1.36 1.63 1.56 1.67 1.58 1.41 1.32 1.17 1.19 1.29 1.25 1.34 1.83 Note: 1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE MODELS section of the Communications Components Designer’s Catalog. 6-91 INA-02100 Typical Performance, TA = 25°C (Unless otherwise noted: The values are the achievable performance for the INA-02100 mounted in a 70 mil stripline package.) 35 35 50 3.5 Gain Flat to DC TMS = +125°C 2.5 20 30 30 Gp (dB) 25 Id (mA) 3.0 NF (dB) Gp (dB) 30 0.1 GHz 0.5 GHz TMS = +25°C TMS = –55°C 40 20 2.0 1.0 GHz 1.5 GHz 25 20 10 15 .01 .02 .05 0.1 0.2 0.5 1.0 1.5 2.0 0 2 4 6 8 Vd (V) Figure 1. Typical Gain and Noise Figure vs. Frequency, TA = 25°C, Id = 35 mA. Figure 2. Device Current vs. Voltage. 50 3.5 Id = 40 mA Gp 12 30 12 10 3.0 Id = 35 mA 9 NF (dB) 14 P1 dB P1 dB (dBm) 3.0 29 P1 dB (dBm) Gp (dB) 31 40 Figure 3. Power Gain vs. Current. 15 32 30 Id (mA) FREQUENCY (GHz) NF (dB) 15 20 0 Id = 30 mA 2.5 6 8 2.5 NF 2.0 2.0 Id = 30 to 40 mA 3 1.0 1.0 –55 –25 +25 +85 +125 TEMPERATURE (°C) 0 .02 .05 0.1 0.2 2.0 Figure 5. Output Power at 1 dB Gain Compression vs. Frequency. INA-02100 Chip Dimensions RF OUT (3) (4) 500 ± 13 µm 19.7 ± 0.5 mil (2) (1) 1.0 FREQUENCY (GHz) Figure 4. Output Power and 1 dB Gain Compression, NF and Power Gain vs. CaseTemperature, f = 0.1 GHz, Id = 35 mA. GND 2 0.5 GND 1 RF IN 375 ± 13 µm 14.8 ± 0.5 mil Chip thickness is 140 µm/5.5 mil. Bond Pads are 41 µm/1.6 mil typical on each side. Note: Ground Bonding is Critical. Refer to Application Bulletin, “AB-0007: INA Bonding Configuration”. 6-92 1.5 .02 .05 0.1 0.2 0.5 1.0 2.0 FREQUENCY (GHz) Figure 6. Noise Figure vs. Frequency.