March 1998 FDS8947A Dual P-Channel Enhancement Mode Field Effect Transistor General Description Features SO-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. SuperSOTTM-6 SOT-23 SuperSOTTM-8 D2 D1 D2 D1 SO-8 S FD 7A 4 89 pin 1 S1 Absolute Maximum Ratings Symbol G1 S2 G2 -4.0 A, -30 V. RDS(ON) = 0.052Ω @ VGS = -10 V RDS(ON) = 0.080Ω @ VGS = -4.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. SO-8 SOIC-16 SOT-223 5 4 6 3 7 2 8 1 TA = 25oC unless other wise noted Parameter FDS8947A Units VDSS Drain-Source Voltage -30 V -20 V - 4.0 A VGSS Gate-Source Voltage ID Drain Current - Continuous - Pulsed -20 PD Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a) (Note 1a) 1.6 (Note 1b) 1 (Note 1c) TJ,TSTG Operating and Storage Temperature Range W 0.9 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W © 1998 Fairchild Semiconductor Corporation FDS8947A Rev.B Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, I D = -250 µA -30 V ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V -100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA -3 V ON CHARACTERISTICS VGS(th) o mV / oC -23 (Note 2) Gate Threshold Voltage VDS = VGS, ID = -250 µA -1 ∆VGS(th)/∆TJ Gate Threshold Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 C RDS(ON) Static Drain-Source On-Resistance VGS = -10 V, I D = -4 A o VGS = -4.5 V, I D = -3.2 A On-State Drain Current VGS = -10 V, VDS = -5 V gFS Forward Transconductance VDS = -10 V, I D = -4 A mV /oC 4 TJ =125°C ID(ON) -1.5 0.044 0.052 0.06 0.085 0.067 0.08 -20 Ω A 8 S 730 pF 400 pF 90 pF DYNAMIC CH ARACTERISTICS Ciss Input Capacitance Coss Output Capacitance VDS = -15 V, VGS = 0 V, f = 1.0 MHz Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time VDS = -10 V, I D = -1 A 11 20 ns tr Turn - On Rise Time VGS = -10 V , RGEN = 6 Ω 10 18 tD(off) Turn - Off Delay Time 90 110 tf Turn - Off Fall Time 55 80 Qg Total Gate Charge VDS = -10 V, I D = -4 A, 19 27 nC Qgs Gate-Source Charge VGS = -10 V 3.5 Qgd Gate-Drain Charge -1.3 A 3.6 DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = -1.3 A trr Reverse Recovery Time Irr Reverse Recovery Current VGS = 0 V, IF = -1.3 A dIF/dt = 100 A/µs (Note 2) -0.75 -1.2 V 48 100 ns 0.8 A Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78OC/W on a 0.5 in2 pad of 2oz copper. b. 125OC/W on a 0.02 in2 pad of 2oz copper. c. 135OC/W on a 0.003 in2 pad of 2oz copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. FDS8947A Rev.B Typical Electrical Characteristics 15 3 -6.0V -5.0V -4.5V R DS(on) , NORMALIZED V GS =-10V -4.0V 10 -3.5V 5 -3.0V 0 0 1 2 3 4 DRAIN-SOURCE ON-RESISTANCE -ID , DRAIN-SOURCE CURRENT (A) 20 2.5 -4.0V 2 -4.5V -5.0V 1.5 -6.0V -10V 1 0.5 5 V GS =-3.5V 0 4 8 -VDS , DRAIN-SOURCE VOLTAGE (V) R DS(ON) , ON-RESISTANCE (OHM) VGS = -10V 1.2 1 0.8 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) Figure 3. On-Resistance Variation Temperature. -I D , DRAIN CURRENT (A) I D = -2A 0.25 0.2 0.15 0.1 125 TA = 125°C 0.05 0 150 TA = 25°C 2 TJ = -55°C 25°C 15 125°C 10 5 1 2 3 4 5 -VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 6 6 8 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. with 20 V DS = -5V 4 -V GS , GATE TO SOURCE VOLTAGE (V) -I S , REVERSE DRAIN CURRENT (A) R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = -4.0A 0.6 -50 0 20 0.3 1.6 20 16 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. Figure 1. On-Region Characteristics. 1.4 12 -I D , DRAIN CURRENT (A) VGS = 0V 5 1 TJ = 125°C 25°C 0.1 -55°C 0.01 0.001 0.0001 0 0.3 0.6 0.9 1.2 1.5 -VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 6 . Body Diode Forward Voltage Variation with Source Current and Temperature. FDS8947A Rev.B Typical Electrical Characteristics (continued) 2000 I D = -4.0A VDS = -5V -10V -15V 8 1000 CAPACITANCE (pF) -V GS , GATE-SOURCE VOLTAGE (V) 10 6 4 2 Ciss 500 Coss 300 200 0 0 5 10 15 20 50 0.1 Q g , GATE CHARGE (nC) Crss f = 1 MHz V GS = 0 V 100 0.2 0.5 1 2 5 10 20 30 -VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 30 50 1m s 1 0.5 0.05 0.01 0.1 -V GS = -10V SINGLE PULSE RθJA = 135°C/W TAA = 25°C 0.2 0.5 SINGLE PULSE R θJA =See Note 1C TA = 25°C 25 10m s 10 0m s 1s 10s DC 2 0.1 us POWER (W) 5 100 T IMI )L (ON S RD 20 15 10 5 1 2 5 10 20 30 0 0.01 50 0.1 Figure 9. Maximum Safe Operating Area. 1 0.5 0.2 0.1 0.05 0.02 1 10 50 100 300 Figure 10. Single Pulse Maximum Power Dissipation. D = 0.5 0.2 R θJA (t) = r(t) * R θJA R θJA = 135°C/W 0.1 0.05 0.02 P(pk) 0.01 0.01 t1 Single Pulse 0.005 t2 TJ - TA = P * R θJA(t) Duty Cycle, D = t1 /t2 0.002 0.001 0.0001 0.5 SINGLE PULSE TIME (sec) -VDS , DRAIN-SOURCE VOLTAGE (V) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE -I D , DRAIN CURRENT (A) 20 0.001 0.01 0.1 1 10 100 300 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS8947A Rev.B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FACT ActiveArray FACT Quiet Series Bottomless FASTâ CoolFET FASTr CROSSVOLT FRFET DOME GlobalOptoisolator EcoSPARK GTO E2CMOSTM HiSeC EnSignaTM I2C Across the board. Around the world. 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Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I1