VISHAY VSKV71-04

VSKU71.., VSKV71.. Series
Vishay Semiconductors
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
FEATURES
• High voltage
• Industrial standard package
• Low thermal resistance
• UL approved file E78996
• Compliant to RoHS directive 2002/95/EC
• Designed and qualified for industrial level
BENEFITS
ADD-A-PAK
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
PRODUCT SUMMARY
IT(AV)
75 A
• Up to 1600 V
• High surge capability
MECHANICAL DESCRIPTION
• Easy mounting on heatsink
The ADD-A-PAK generation VII, new generation of
ADD-A-PAK module, combines the excellent thermal
performances obtained by the usage of exposed direct
bonded copper substrate, with advanced compact simple
package solution and simplified internal structure with
minimized number of interfaces.
ELECTRICAL DESCRIPTION
These modules are intended for general purpose high
voltage applications such as high voltage regulated power
supplies, lighting circuits, temperature and motor speed
control circuits, UPS and battery charger.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
IT(AV)
CHARACTERISTICS
85 °C
I2t
50 Hz
1300
60 Hz
1360
50 Hz
8.45
60 Hz
7.68
I2√t
VRRM
TStg
TJ
Document Number: 94654
Revision: 17-May-10
Range
UNITS
75
115
IT(RMS)
ITSM
VALUES
A
kA2s
84.5
kA2√s
400 to 1600
V
- 40 to 125
°C
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
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VSKU71.., VSKV71.. Series
Vishay Semiconductors
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
VRRM, MAXIMUM
REPETITIVE PEAK
REVERSE VOLTAGE
V
VRSM, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
VDRM, MAXIMUM REPETITIVE
PEAK OFF-STATE VOLTAGE,
GATE OPEN CIRCUIT
V
04
400
500
400
08
800
900
800
12
1200
1300
1200
16
1600
1700
1600
VSK.71
IRRM, IDRM
AT 125 °C
mA
15
ON-STATE CONDUCTION
PARAMETER
SYMBOL
Maximum average on-state current
Maximum continuous RMS on-state current
IT(AV)
IT(RMS)
TEST CONDITIONS
75
DC
115
TC
80
t = 10 ms
Maximum peak, one-cycle non-repetitive
on-state current
ITSM
No voltage
reapplied
t = 8.3 ms
t = 10 ms
100 % VRRM
reapplied
t = 8.3 ms
t = 10 ms
Maximum I2t for fusing
I2t
t = 8.3 ms
I2√t (1)
Maximum value of threshold voltage
VT(TO) (2)
1360
1093
7.68
5.97
84.5
Low level (3)
0.96
Low level (3)
Maximum value of on-state
slope resistance
rt (2)
Maximum on-state voltage drop
VTM
ITM = π x IT(AV)
Maximum non-repetitive rate of rise of
turned on current
dI/dt
High level
(4)
A
TJ = TJ maximum
TJ = TJ maximum
TJ = 25 °C
kA2s
5.45
t = 0.1 ms to 10 ms, no voltage reapplied
TJ = TJ maximum
High level
°C
8.45
100 % VRRM
reapplied
(4)
A
1140
Initial TJ = TJ maximum
t = 10 ms
UNITS
1300
Sinusoidal
half wave,
initial TJ = TJ maximum
No voltage
reapplied
t = 8.3 ms
Maximum I2√t for fusing
VALUES
180° conduction, half sine wave, TC = 85 °C
1.08
3.28
2.86
kA2√s
V
mΩ
1.72
V
TJ = 25 °C, from 0.67 VDRM,
ITM = π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
150
A/μs
Maximum holding current
IH
TJ = 25 °C, anode supply = 6 V,
resistive load, gate open circuit
250
Maximum latching current
IL
TJ = 25 °C, anode supply = 6 V, resistive load
400
mA
Notes
(1) I2t for time t = I2√t x √t
x
x
2
(2) Average power = V
T(TO) x IT(AV) + rt x (IT(RMS))
(3) 16.7 % x π x I
<
I
<
π
x
I
AV
AV
(4) I > π x I
AV
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For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
Document Number: 94654
Revision: 17-May-10
VSKU71.., VSKV71.. Series
ADD-A-PAK Generation VII
Vishay Semiconductors
Power Modules Thyristor/Thyristor, 75 A
TRIGGERING
PARAMETER
SYMBOL
Maximum peak gate power
Maximum average gate power
Maximum peak gate current
Maximum peak negative gate voltage
TEST CONDITIONS
VALUES
PGM
12
PG(AV)
3.0
IGM
3.0
- VGM
VGT
Anode supply = 6 V
resistive load
TJ = 25 °C
V
2.5
1.7
TJ = - 40 °C
IGT
A
10
TJ = 125 °C
Maximum gate current required to trigger
W
4.0
TJ = - 40 °C
Maximum gate voltage required to trigger
UNITS
270
Anode supply = 6 V
resistive load
TJ = 25 °C
mA
150
TJ = 125 °C
80
Maximum gate voltage that will not trigger
VGD
TJ = 125 °C, rated VDRM applied
0.25
V
Maximum gate current that will not trigger
IGD
TJ = 125 °C, rated VDRM applied
6
mA
VALUES
UNITS
15
mA
3000 (1 min)
3600 (1 s)
V
1000
V/μs
VALUES
UNITS
- 40 to 125
°C
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
IRRM,
IDRM
TJ = 125 °C, gate open circuit
Maximum RMS insulation voltage
VINS
50 Hz
Maximum critical rate of rise of off-state voltage
dV/dt
TJ = 125 °C, linear to 0.67 VDRM
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Junction operating and storage
temperature range
TEST CONDITIONS
TJ, TStg
Maximum internal thermal resistance,
junction to case per leg
RthJC
DC operation
0.29
Typical thermal resistance,
case to heatsink per module
RthCS
Mounting surface flat, smooth and greased
0.1
°C/W
A mounting compound is recommended and the
torque should be rechecked after a period of
3 hours to allow for the spread of the compound.
to heatsink
Mounting torque ± 10 %
busbar
4
Nm
3
Approximate weight
Case style
JEDEC
75
g
2.7
oz.
TO-240AA compatible
ΔR CONDUCTION PER JUNCTION
DEVICES
VSK.71..
SINE HALF WAVE CONDUCTION
RECTANGULAR WAVE CONDUCTION
180°
120°
90°
60°
30°
180°
120°
90°
60°
30°
0.052
0.062
0.079
0.116
0.197
0.037
0.064
0.085
0.121
0.200
UNITS
°C/W
Note
• Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC
Document Number: 94654
Revision: 17-May-10
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
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VSKU71.., VSKV71.. Series
RthJC (DC) = 0.29°C/W
120
110
100
90
180°
120°
90°
60°
30°
80
70
10
20
30
40
50
60
70
180
180°
120°
90°
60°
30°
160
140
120
100
DC
RMS limit
80
60
40
20
Per leg, Tj = 125°C
0
80
0
20
40
60
80
100
120
Average on-state current (A)
Average on-state current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - On-State Power Loss Characteristics
1200
130
RthJC (DC) = 0.29°C/W
Peak half sine wave on-state current (A)
Maximum allowable case temperature (°C)
Maximum average on-state power loss (W)
130
0
120
110
100
DC
180°
120°
90°
60°
30°
90
80
70
0
Maximum average on-state power loss (W)
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
20
40
60
80
100
At any rated load condition and with
rated Vrrm applied following surge
Initial Tj = Tj max
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100s
1100
1000
900
800
700
600
Per leg
500
120
1
10
100
Average on-state current (A)
Number of equal amplitude half cycle current pulses (N)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - Maximum Non-Repetitive Surge Current
1400
140
180°
120°
90°
60°
30°
120
100
Peak half sine wave on-state current (A)
Maximum allowable case temperature (°C)
Vishay Semiconductors
80
RMS limit
60
40
20
Per leg, Tj = 125°C
0
0
10
20
30
40
50
60
70
80
Average on-state current (A)
Fig. 3 - On-State Power Loss Characteristics
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1200
1000
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration. Control
of conduction may not be maintained.
Initial Tj = 125°C
No Voltage Reapplied
Rated Vrrm reapplied
800
600
Per leg
400
0.01
0.1
1
Pulse train duration (s)
Fig. 6 - Maximum Non-Repetitive Surge Current
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
Document Number: 94654
Revision: 17-May-10
VSKU71.., VSKV71.. Series
ADD-A-PAK Generation VII
Vishay Semiconductors
Power Modules Thyristor/Thyristor, 75 A
Maximum total power loss (W)
700
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
1 °C/W
2 °C/W
180°
(sine)
180°
(rect)
600
500
400
∼
300
200
2 x VSK.71 Series
single phase bridge connected
Tj = 125°C
100
0
0
0
20 40 60 80 100 120 140 160 180
20
40
60
80
100 120 140
Maximum allowable ambient temperature (°C)
Total output current (A)
Fig. 7 - On-State Power Loss Characteristics
Maximum total power loss (W)
800
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
1 °C/W
700
60°
(rect)
600
500
400
300
3 x VSK.71 Series
6-pulse midpoint
connection bridge
Tj = 125°C
200
100
0
0
50
0
100 150 200 250 300 350
20
40
60
80
100 120 140
Maximum allowable ambient temperature (°C)
Total output current (A)
Fig. 8 - On-State Power Loss Characteristics
Instantaneous on-state current (A)
1000
Per leg
100
10
Tj = 125°C
Tj = 25°C
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Instantaneous on-state voltage (V)
Fig. 9 - On-State Voltage Characteristics
Document Number: 94654
Revision: 17-May-10
For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
www.vishay.com
5
VSKU71.., VSKV71.. Series
Transient thermal impedance Z thJC (°C/W)
Vishay Semiconductors
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
1
Steady state value
RthJC = 0.29 °C/W
(DC operation)
0.1
Per leg
0.01
0.001
0.01
0.1
1
10
Square wave pulse duration (s)
Fig. 10 - Thermal Impedance ZthJC Characteristics
Rec tangular ga te pulse
a )Recommend ed load line for
ra ted di/ d t: 20 V, 20 ohms
tr = 0.5 µs, tp >= 6 µs
b )Recommend ed load line for
<= 30% rated di/ dt: 15 V, 40 ohms
10
tr = 1 µs, tp >= 6 µs
(1) PGM = 200 W, tp = 300 µs
(2) PGM = 60 W, tp = 1 ms
(3) PGM = 30 W, tp = 2 ms
(4) PGM = 12 W, tp = 5 ms
(a)
(b)
1
TJ = -40 °C
TJ = 125 °C
TJ = 25 °C
Instantaneous gate voltage (V)
100
(4)
(3) (2)
(1)
VGD
IGD
0.1
0.001
VSK.71
IRK.71../
.91.. Series Frequenc y Limited by PG(AV)
0.01
0.1
1
10
100
1000
Instantaneous gate current (A)
Fig. 11 - Gate Characteristics
ORDERING INFORMATION TABLE
Device code
VSK
U
71
1
2
3
/
16
4
1
-
Module type
2
-
Circuit configuration (see end of datasheet)
3
-
Current code (75 A)
4
-
Voltage code (see Voltage Ratings table)
Note
• To order the optional hardware go to www.vishay.com/doc?95172
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For technical questions within your region, please contact one of the following:
[email protected], [email protected], [email protected]
Document Number: 94654
Revision: 17-May-10
VSKU71.., VSKV71.. Series
ADD-A-PAK Generation VII
Vishay Semiconductors
Power Modules Thyristor/Thyristor, 75 A
CIRCUIT CONFIGURATION
VSKU
VSKV
(1)
(1)
+
1
-
1
2
(2)
3
2
+
(2)
3
4 5 7 6
4 5 7 6
(3)
G1 K1 K2 G2
(4) (5) (7) (6)
+
(3)
G1 K1 K2 G2
(4) (5) (7) (6)
LINKS TO RELATED DOCUMENTS
Dimensions
Document Number: 94654
Revision: 17-May-10
www.vishay.com/doc?95368
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[email protected], [email protected], [email protected]
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Outline Dimensions
Vishay Semiconductors
ADD-A-PAK Generation VII - Thyristor
DIMENSIONS in millimeters (inches)
29 ± 0.5
(1 ± 0.020)
30 ± 0.5
(1.18 ± 0.020)
35 REF.
18 (0.7) REF.
30 ± 1 (1.18 ± 0.039)
15.5 ± 0.5
(0.6 ± 0.020)
24 ± 0.5
(1 ± 0.020)
Viti M5 x 0.8
Screws M5 x 0.8
6.7 ± 0.3 (0.26 ± 0.012)
Fast-on tab 2.8 x 0.8 (0.110 x 0.03)
Document Number: 95368
Revision: 11-Nov-08
20 ± 0.5 (0.79 ± 0.020)
20 ± 0.5 (0.79 ± 0.020)
92 ± 0.75 (3.6 ± 0.030)
5.8 ± 0.25 (0.228 ± 0.010)
15 ± 0.5 (0.59 ± 0.020)
For technical questions, contact: [email protected]
4 ± 0.2 (0.157 ± 0.008)
7 6
4 5
3
2
1
6.3 ± 0.2 (0.248 ± 0.008)
22.6 ± 0.2
(0.89 ± 0.008)
80 ± 0.3 (3.15 ± 0.012)
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Disclaimer
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product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
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including but not limited to the warranty expressed therein.
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Document Number: 91000
Revision: 11-Mar-11
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