NEC UPA1758

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA1758
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
This product is Dual N-Channel MOS Field Effect Transistor designed for power management application of
notebook computers, and Li-ion battery application.
PACKAGE DRAWING (Unit : mm)
FEATURES
• Dual MOS FET chips in small package
• 2.5 V gate drive type low on-state resistance
8
5
1 ; Source 1
2 ; Gate 1
7, 8 ; Drain 1
RDS(on)1 = 30 mΩ (MAX.) (VGS = 4.5 V, ID = 3.0 A)
RDS(on)2 = 40 mΩ (MAX.) (VGS = 2.5 V, ID = 3.0 A)
3 ; Source 2
4 ; Gate 2
5, 6 ; Drain 2
• Low Ciss : Ciss = 1100 pF (TYP.)
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
PART NUMBER
PACKAGE
µPA1758G
Power SOP8
0.8
1.27
0.40
0.5 ±0.2
0.10
0.78 Max.
+0.10
–0.05
0.12 M
EQUIVALENT CIRCUIT
Drain to Source Voltage (VGS = 0)
VDSS
30
V
Gate to Source Voltage (VDS = 0)
VGSS
±12.0
V
Drain Current (DC)
ID(DC)
±6.0
A
ID(pulse)
±24
A
Drain Current (Pulse)
4.4
+0.10
–0.05
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Note1
6.0 ±0.3
4
5.37 Max.
0.15
0.05 Min.
ORDERING INFORMATION
1.44
1.8 Max.
1
Total Power Dissipation (1 unit)
Note2
PT
1.7
W
Total Power Dissipation (2 unit)
Note2
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to + 150
°C
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 %
2
2. Mounted on ceramic substrate of 2000 mm x 1.1 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice.
Document No.
D12911EJ1V0DS00 (1st edition)
Date Published October 1998 NS CP(K)
Printed in Japan
©
1998
µPA1758
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
Drain to Source On-state Resistance
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
RDS(on)1
VGS = 4.5 V, ID = 3.5 A
20
30
mΩ
RDS(on)2
VGS = 2.5 V, ID = 3.5 A
25
40
mΩ
Gate to Source Cutoff Voltage
VGS(off)
VDS = 10 V, ID = 1.0 mA
0.5
0.8
1.5
V
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 3.5 A
5.0
13
Drain Leakage Current
IDSS
VDS = 30 V, VGS = 0
10
µA
Gate to Source Leakage Current
IGSS
VGS = ±12.0 V, VDS = 0
±10
µA
Input Capacitance
Ciss
VDS = 10 V, VGS = 0, f = 1 MHz
Output Capacitance
S
1100
pF
Coss
370
pF
Reverse Transfer Capacitance
Crss
170
pF
Turn-on Delay Time
td(on)
ID = 3.0 A, VGS(on) = 4.0 V, VDD = 15 V
50
ns
RG = 10 Ω
190
ns
td(off)
550
ns
tf
490
ns
15.0
nC
Rise Time
tr
Turn-off Delay Time
Fall Time
Total Gate Charge
QG
Gate to Source Charge
QGS
2.0
nC
Gate to Drain Charge
QGD
6.5
nC
0.8
V
Body Diode forward Voltage
ID = 6.0 A, VDD = 24 V, VGS = 4.0 V
VF(S-D)
IF = 6.0 A, VGS = 0
TEST CIRCUIT 2 GATE CHARGE
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
IG = 2 mA
D.U.T.
VGS
RL
V
PG.
RG
RG = 10 Ω
GS
Wave Form
0
VGS (on)
10 %
90 %
PG.
VDD
90 %
ID
90 %
ID
VGS
0
I
D
Wave Form
t
t = 1µ s
Duty Cycle ≤ 1 %
2
0
10 %
10 %
tr
td (on)
ton
td (off)
tf
toff
50 Ω
RL
VDD
µPA1758
TYPICAL CHARACTERISTICS (TA = 25 °C)
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - ˚C/W
1 000
100
10
1
0.1
0.01
0.001
Mounted on ceramic
Single Pulse
substrate of 2000mm2 × 1.1mm
Single Pulse , 1 unit
10 µ
100 µ
1m
10 m
100 m
1
10
100
1 000
100
VDS=10V
Pulsed
TA=−50˚C
TA=−25˚C
TA=25˚C
10
TA=75˚C
TA=125˚C
TA=150˚C
1
0.1
1
10
100
RDS(on) - Drain to Source On-state Resistance - mΩ
ID- Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
Pulsed
70
60
50
40
VGS=2.5V
30
20
VGS=4.5V
10
0
1
10
ID - Drain Current - A
100
VGS(off) - Gate to Source Cut-off Voltage - V
|yfs| - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
RDS(on) - Drain to Source On-state Resistance - mΩ
PW - Pulse Width - s
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
75
Pulsed
ID=3 A
50
25
0
2
4
8
6
10
12
14
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUTOFF VOLTAGE vs.
CHANNEL TEMPERATURE
VDS=10 V
ID=1 mA
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
− 50
0
50
100
150
Tch - Channel Temperature - ˚C
3
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
Pulsed
VGS=2.5V
40
IF - Diode Forward Current - A
30
VGS=4.5V
20
10
0
100
VGS=2.5V
10
VGS=0V
1
0.1
ID= 3.0 A
− 50
0
50
100
0
150
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
SWITCHING CHARACTERISTICS
Ciss
1000
Coss
100
Crss
10
0.1
1
10
100
tf
tr
td(off)
td(on)
100
10
VDS=15V
VGS=4V
RG =10Ω
1
0.1
1
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
10
1
10
ID - Drain Current - A
4
100
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
40
ID=6.0 A 8
VDS - Drain to Source Voltage - V
trr - Reverse Recovery Diode - ns
di/dt =100A/µ s
VGS = 0
100
1
0.1
10
ID - Drain Current - A
VDS - Drain to Source Voltage - V
1 000
1.5
1.0
1 000
VGS = 0
f = 1 MHz
td(on), tr, td(off), tf - Switching Time - ns
Ciss, Coss, Crss - Capacitance - pF
10000
0.5
VSD - Source to Drain Voltage - V
Tch - Channel Temperature - ˚C
VGS = 4 V
30
VDD=24 V
VDD=15 V
VDD=6 V
VGS
6
20
4
10
2
0
4
8
12
QG - Gate Charge - nC
0
16
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
µPA1758
µPA1758
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
100
80
60
40
20
0
20
40
60
80
100 120 140 160
PT - Total Power Dissipation - W/package
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
2.8
Mounted on ceramic
substrate of
2000mm2×1.1mm
2.4
2.0
2 unit
1 unit
1.6
1.2
0.8
0.4
0
20
40
60
80
100 120 140 160
TA - Ambient Temperature - ˚C
TA - Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
Mounted on ceramic
substrate of
2
d
ite
ID(pulse) = 24 A 2000mm ×1.1mm, 1 unit
m
)
i
Pw
L
V
)
5
on
=
S(
4.
1
RD GS=
m
Pw
s
10 (V
ID(DC)=6 A
=
10
Pw
m
s
=
Po
10
we
0
m
rD
s
iss
ipa
1
tio
n
Lim
ite
d
Pulsed
25
ID - Drain Current - A
ID - Drain Current - A
100
20
VGS=4.5 V
15
VGS=2.5 V
10
5
TA = 25 ˚C
Single Pulse
0.1
0.1
1
10
100
VDS - Drain to Source Voltage - V
0
0.2
0.4
0.6
0.8
VDS - Drain to Source Voltage - V
FORWARD TRANSFER CHARACTERISTICS
ID - Drain Current - A
100
Pulsed
10
TA=150˚C
TA=125˚C
1 TA=75˚C
TA=25˚C
TA=−25˚C
TA=−50˚C
0.1
0
1
2
3
4
VGS - Gate to Source Voltage - V
5
µPA1758
[MEMO]
6
µPA1758
[MEMO]
7
µPA1758
[MEMO]
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consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
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copyrights or other intellectual property rights of NEC Corporation or others.
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the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
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"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on
a customer designated "quality assurance program" for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
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systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
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Anti-radioactive design is not implemented in this product.
M4 96. 5