TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com Small, Triple-Input Power Multiplexer with Auto-Select and Low Drop-out Voltage Regulator Check for Samples: TPS22933 FEATURES APPLICATIONS • • • • • • • • 1 • • • • • • • • Three Integrated Load Switches Automatically Choose Highest Input Integrated 3.6-V fixed LDO Switched and Always on LDO Outputs Small µQFN package 1.5mm × 1.5mm Input Voltage Range: 2.5-V to 12-V Low ON-Resistance (rON) – rON = 2.4Ω at VIN = 5.0-V – rON = 2.6Ω at VIN = 4.2-V 50-mA Maximum Continuous Current Low Threshold Control Input (EN) Switchover time 18-µs Typical TYPICAL APPLICATION USB Port DC Adapter BAT USB DC_IN Controller LOUT Autoswitch LiIon Battery Always ON Load VOUT LDO Switched Load EN CAP GND Smart Phones GPS Devices Digital Cameras Portable Industrial Equipment Portable Medical Equipment Portable Media Players Portable Instrumentation DESCRIPTION The TPS22933 is a small, low rON, triple-input power multiplexer with auto-input selection and a Low Drop-Out linear regulator. The device contains three P-channel MOSFETs that can operate over an input voltage range of 2.5-V to 12-V. The TPS22933 automatically selects the highest level (from BAT, USB, and DC_IN) and enables that input to source the LDO. LOUT is an always-on output from the LDO. The Enable function (EN pin) allows VOUT to be switched on or off, enables a quick discharge resistor, and is capable of interfacing directly with low-voltage control signals. The TPS22933 is available in a small, space-saving 8-pin µQFN package and is characterized for operation over the free-air temperature range of –40ºC to 85ºC. FEATURE LIST (1) TPS22933A (1) rON (typical) at 5.0 V OUTPUT VOLTAGE QUICK OUTPUT DISCHARGE MAXIMUM OUTPUT CURRENT VOUT ENABLE 2.4 Ω 3.6 V yes 50 mA Active High This feature discharges the output of the switch to ground through a 64-Ω resistor, preventing the output from floating 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA –40°C to 85°C (1) PACKAGE RSE (0.5mm pitch) (1) ORDERABLE PART NUMBER Reel of 3,000 TPS22933ARSER Reel of 250 TPS22933ARSET LDO VOLTAGE TOP-SIDE MARKING 3.6 V 4Q Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. RSE PACKAGE Pin 1 Identifier 7 6 5 8 1 4 2 3 8 4 Pin 1 Index Area 1 2 3 Top View 7 6 5 Bottom View PIN FUNCTIONS PIN NUMBER 2 NAME DESCRIPTION 1 BAT Source Voltage 1 (Battery) 2 USB Source Voltage 2 (V+ USB) 3 DC_IN Source Voltage 3 (DC Adapter) 4 GND Ground 5 EN VOUT Enable (Cannot be left floating) 6 CAP Capacitor for LDO 7 VOUT Switched LDO Output 8 LOUT Always on LDO Output Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com BLOCK DIAGRAM BAT LOUT USB VOUT -+ DC_IN Ref LDO Control Logic EN CAP GND FUNCTION TABLE EN LDO to LOUT LDO to VOUT L ON OFF VOUT to GND ON H ON ON OFF INPUT SELECTION TABLE (V1 > V2 > V3) (1) BAT USB DC_IN V1 V2 or V3 V2 or V3 LDO Supply BAT V2 or V3 V1 V2 or V3 USB V2 or V3 V2 or V3 V1 DC_IN V1 V1 V1 See (1) Whichever source achieves the highest level the fastest will supply the LDO. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) VALUE UNIT VIN Input voltage range BAT, USB, DC_IN –0.3 to 14.0 V VOUTPUT Output voltage range VOUT, LOUT –0.3 to 6.0 V VEN Input voltage range EN –0.3 to 6.0 V IMAX Maximum continuous switch current 75 mA IPLS Maximum pulsed switch current, pulse <300 µs, 2% duty cycle 100 mA TA Operating free-air temperature range –40 to 85 °C Tstg Storage temperature range –65 to 150 °C Tlead Maximum lead temperature (10-s soldering time) 300 °C ESD Electrostatic discharge protection Human-Body Model (HBM) 2000 Charged-Device Model (CDM) 1000 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 V 3 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com THERMAL INFORMATION TPS22933 THERMAL METRIC (1) RSE (7 PINS) θJA Junction-to-ambient thermal resistance 115.6 θJCtop Junction-to-case (top) thermal resistance 59.9 θJB Junction-to-board thermal resistance 27.4 ψJT Junction-to-top characterization parameter 2.1 ψJB Junction-to-board characterization parameter 27.3 θJCbot Junction-to-case (bottom) thermal resistance – (1) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. RECOMMENDED OPERATING CONDITIONS MIN VIN Input voltage range VEN MAX UNIT BAT, USB, DC_IN 2.5 TYP 12.0 V EN 0.0 5.5 V VIH EN pin High-level input voltage, (EN > VIH Min, VOUT = LDO Output) BAT = 2.5-V to 5.5-V, USB, DC_IN = 2.5-V to 12-V 1.15 5.5 V VIL EN pin Low-level input voltage, (EN< VIL Max, VOUT = pull-down) BAT = 2.5-V to 5.5-V, USB, DC_IN = 2.5-V to 12-V 0.0 0.6 V IOUT-LOUT LOUT Current VBAT = 4.2 V OR VUSB = 5 V OR VDC_IN = 5 V, EN = 3.4 V, IOUT-VOUT = 0 mA 50 mA IOUT-VOUT VOUT Current VBAT = 4.2 V OR VUSB = 5 V OR VDC_IN = 5 V, EN = 3.4 V, IOUT-LOUT = 0 mA 50 mA IOUT-TOTAL LOUT + VOUT current VBAT = 4.2 V OR VUSB = 5 V OR VDC_IN = 5 V, EN = 3.4 V 50 mA LDO Capacitor (on CAP pin) CAP (1) 4 20 (1) nF LOUT Capacitor 1 µF VOUT Capacitor 1 µF Refer to the application section Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS BAT = 2.5-V to 12.0-V, USB = 2.5-V to 12.0-V, DC_IN = 2.5-V to 12.0-V, TA = –40ºC to 85ºC (unless otherwise noted) TEST CONDITIONS (1) PARAMETER Operating current IIN-BAT (2) (3) IOUT = 0 mA, VBAT = 4.2 V, VUSB = 3 V, VDC_IN = 3 V, EN = 3.4 V Quiescent current IOUT = 0, VBAT = 4.2 V, VUSB = 5 V, VDC_IN = 3 V, EN = 3.4 V Operating current IOUT = 0 mA, VBAT = 4.2 V, VUSB = 5 V, VDC_IN = 3 V, EN = 3.4 V IIN-USB Quiescent current IOUT = 0, VBAT = 4.2V, VUSB = 5V, VDC_IN = 5.5V, EN = 3.4 V Operating current IOUT = 0 mA, VBAT = 4.2 V, VUSB = 3 V, VDC_IN = 5 V, EN = 3.4 V IIN-DC_IN TA MIN TYP (4) MAX 9.2 15 0.7 2 9.2 15 0.7 2 9.2 15 0.7 2 UNIT µA Full µA Full µA Full Quiescent current IOUT = 0, VBAT = 4.2V, VUSB = 5.5V, VDC_IN = 5V, EN = 3.4 V IIN-USB Hi-Voltage operating current IOUT = 0 mA, VBAT = 4.2 V, VUSB = 12 V, VDC_IN = 5 V, EN = 3.4 V Full 10.8 20 µA IIN-DC_IN Hi-Voltage operating current IOUT = 0 mA, VBAT = 4.2 V, VUSB = 5 V, VDC_IN = 12 V, EN = 3.4 V Full 10.8 20 µA 25ºC 2.4 3.3 VIN = 5.0 V, IOUT = 10 mA ON resistance (USB to CAP, BAT to CAP, VIN = 4.2 V, IOUT = 10 mA DC_IN to CAP) RON VIN = 2.5 V, IOUT = 10 mA Full 25ºC Output pull down resistance VIN = 4.2 V, VEN = 0 V, I(into VOUT) = 10 mA 25ºC IEN EN input leakage VEN = 1.6 V to 5.5 V or GND Full IOUT = 10 mA Full VDO-LOUT VLOUT VVOUT VCO Dropout voltage LOUT IOUT = 10 mA (5) (6) 1.3 Full 63.8 Ω Ω Ω 120 Ω 1 µA V Full 0.10 V VIN – Always on LDO output voltage (LOUT pin) VIN < 3.4 V, IOUT = 10 mA, VEN = 1.8 V Full VIN > 4 V, IOUT = 10 mA, VEN = 1.8 V Full Switched LDO output voltage (VOUT pin) VIN < 3.4 V, IOUT = 10 m A, VEN = 1.8 V Full VIN > 4 V, IOUT = 10 mA, VEN = 1.8 V Full Changeover voltage VBAT = 4.2 V, VUSB = 4.0 V rising to 4.4 V Full 0.15 25ºC 18 VDO-LOUT 3.42 3.6 V 3.78 VIN – VDO-VOUT 3.39 3.57 VBAT=4.2 V, VUSB = 4.0 V rising to 4.4 V, CAP = 0.01 µF, IOUT = 10 mA tOFF VOUT off time EN high to low, C(VOUT) = 1 µF, VOUT load = 360 Ω Full 32 tON VOUT on time EN low to high, C(VOUT) = open, VOUT load = 360 Ω Full 65 (6) Ω 0.11 Changeover time (4) (5) 2.5 3.0 tCO (1) (2) (3) 5 6 25ºC RPD (5) (6) 3.8 Full VIN = 4.2 V, IOUT-VOUT = 10 mA 3.5 4 25ºC ON resistance (LDO output to VOUT) VDO-VOUT 2.6 Full RONVOUT Dropout voltage VOUT 3.5 Full V 3.75 V 50 µs µs µs VIN is defined as the highest voltage present on the BAT, USB and DC_IN pins. One of the voltages on BAT, USB and DC_IN must be > VIN (Min), others can be 0 V. VBAT, VUSB and VDC_IN refer to the voltages on BAT, USB and DC_IN respectively. OUT, IOUT-VOUT and IOUT-LOUT refer to the currents for the combined output current for VOUT and LOUT, the current on VOUT and the current on LOUT respectively. TYP is 25ºC, BAT = 4.2-V, USB = 0-V, DC_IN = 0-V. Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage is equal to: VIN – VDROPOUT. Dropout voltage is measured at the VIN that causes the output to drop to 100mV below its nominal voltage. For VOUT, the voltage drop across the output switch is included (10mA × RONVOUT). Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 5 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com PARAMETRIC MEASUREMENT INFORMATION VOUT 360 W 1 mF Load for tON and tOFF Figure 1. Test Circuit and tON / tOFF Waveforms 4.4 V VCO BAT 4.2 V USB 4.0 V tCO 4.4 V 4.2 V CAP Figure 2. Switchover Timing 50% 50% EN tOFF tON 50% 50% VOUT Figure 3. VOUT Enable Timing 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com APPLICATION INFORMATION POWER CHANGEOVER The TPS22933 LDO is powered by the highest level input. When input voltages change, the TPS22933 may change which input powers the LDO. During initial power up, the input that reaches the highest value first will power the LDO. Once that decision is made, changing between input sources is based on VCO. When an input source becomes VCO over the input currently supplying power to the LDO, changeover will occur and the new, higher input will power the LDO. TPS22933A EXAMPLE: Initial power up: DC_IN = 0V; USB = 0V; EN = 0V BAT is applied at 4.2V LDO power comes from BAT LOUT = 3.6V; CAP = 4.2V; VOUT = 0V USB power is connected at 5.0V, BAT remains 4.2V and DC_IN remains 0V LDO power is changed from BAT to USB in tCO LOUT = 3.6V; CAP = 5.0V; VOUT = 0V DC_IN power is connected at 5.0V, BAT remains 4.2V and USB remains 5V No change in LDO power LOUT = 3.6V; CAP = 5.0V; VOUT = 0V EN = VIH, BAT remains 4.2V, USB remains 5.0V and DC_IN remains 5V LOUT = 3.6V, CAP = 5.0V; VOUT = 3.6V USB power is removed, BAT remains 4.2V and DC_IN remains 5.0V LDO power is changed from USB to DC_IN LOUT = 3.6V; CAP = 5.0V; VOUT = 3.6V DC_IN power is removed, BAT remains 4.2V and USB remains 0V: LDO power is changed from DC_IN to BAT LOUT = 3.6V; CAP = 4.2V; VOUT = 3.6V ON/OFF CONTROL The EN pin controls the state of the VOUT switch and VOUT pull-down switch. EN has no control over LOUT. Asserting EN enables the VOUT switch and disables the Quick Output Discharge (QOD) switch. Deasserting EN disables the VOUT switch and enables the QOD switch. EN is active high and has a low threshold making it capable of interfacing with low voltage signals. The EN pin is compatible with standard GPIO Logic threshold and can be used with any microcontroller with 1.2-V, 1.8-V, 2.5-V or 3.3-V GPIOs. LDO CAPACITOR (for CAP pin) An optional capacitor on the CAP pin helps stabilize the integrated LDO. Care should be taken in capacitor sizing to reduce inrush currents. The voltage on the CAP pin will follow the highest input. Since the max input voltage is 12-V, the capacitor voltage rating must be higher than 12-V. BOARD LAYOUT For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. Using wide traces for BAT, USB, DC_IN, LOUT, VOUT, and GND will help minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 7 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com APPLICATION EXAMPLES Below are two diagrams of typical applications for the TPS22933A. In all cases, the unused power inputs can be left floating or tied to ground. The EN pin must not be left floating. Figure 4 shows three power inputs multiplexed to source the LDO. The LDO always on output (LOUT) is tied to an MSP430. The MSP430 then determines when to enable the switched output (VOUT) by driving the EN pin. Figure 5 shows three power inputs multiplexed to source only through the CAP pin. In this case, the LDO outputs are not used (EN is tied low). The highest of the inputs is chosen to drive the voltage at the CAP pin. Note that these two applications are not mutually exclusive. An application could use the CAP pin as a power output and use one or both of the LDO outputs. USB USB Port DC_IN DC Input EN TPS22933A BAT Battery MSP430C3xx µC LOUT GND VOUT Switched Load CAP Figure 4. Application Example 1 DC Input USB LOUT VOUT DC_IN TPS22933A BAT Battery GND EN Unused USB Port CAP Power Multiplexer Output Figure 5. Application Example 2 8 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com PERFORMANCE GRAPHS Table 1. Performance Graphs and Plots Type Description Scope Plot DC_IN to BAT switchover Figure 6 Figure Graph RON versus VIN (BAT, USB, DC_IN) 25°C Figure 7 Graph RON versus VIN (Any input) Figure 8 Graph Quiescent Current versus Input Voltage (Any input) Figure 9 Graph Operating Current versus Input Voltage (Any Input) Figure 10 Scope Plot tOFF (VIN = 4.2-V, C(VOUT) = 1uF, 25°C) Figure 11 Scope Plot tOFF (VIN = 4.2-V, C(VOUT) = open, 25°C) Figure 12 Scope Plot tON (VIN = 4.2-V, C(VOUT) = 1uF, 25°C) Figure 13 Scope Plot tON (VIN = 4.2-V, C(VOUT) = open, 25°C) Figure 14 Graph LOUT and VOUT versus Temperature at VIN = 4.2-V Figure 15 Graph LOUT and VOUT versus IOUT (VIN = 4.2-V, Temp = 25°C) Figure 16 Graph LOUT Dropout Voltage versus Temperature (VIN = 2.5-V) Figure 17 Graph VOUT Dropout Voltage versus Temperature (VIN = 2.5-V) Figure 18 Graph Output Pull-down Resistance (RPD) versus Temperature (10mA into VOUT) Figure 19 66 65 RPD (Ω) 64 63 62 61 VIN = 4.2V, IOUT = −10mA 60 −40 −15 10 35 Temperature (°C) 60 85 G000 Figure 6. DC_IN Removed, BAT Powers LDO (LOUT = 3.6-V) Figure 7. RPD vs Temp Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 9 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com 5 5 −40C 85C 25C 4 3 3 Ron (Ω) RON (Ω) 4 2 2 1 1 BAT USB DC_IN 0 25C, IOUT = 10mA 2 4 VIN (V) IOUT = 10mA 0 2.5 6 3.0 3.5 4.0 4.5 5.0 Vin (V) G000 G000 Figure 8. RON vs VIN (Typical) Figure 9. RON vs VIN 12 0.8 0.7 10 IIN Operating (µA) IIN Quiescent (µA) 0.6 0.5 0.4 0.3 8 6 4 0.2 0 2 −40C 85C 25C 0.1 4 6 8 10 12 −40C 85C 25C 0 4 6 8 10 G000 Figure 10. IIN(Quiescent) vs VIN 10 12 Vin (V) Vin (V) G000 Figure 11. IIN(Operating) vs VIN Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 TPS22933 SLVSB34 – OCTOBER 2011 www.ti.com Figure 12. VOUT tOFF (1µF on VOUT) Figure 13. VOUT tOFF (No Capacitor on VOUT) Figure 14. VOUT tON (1-µF on VOUT) Figure 15. VOUT tON (No Capacitor on VOUT) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 11 TPS22933 www.ti.com 3.6 5 3.58 4 Output Voltage (V) Voltage (V) SLVSB34 – OCTOBER 2011 3.56 3.54 3.52 2 1 LOUT VOUT VIN = 4.2V, VEN = 1.8V, IOUT = 10mA 3.5 −40 3 −15 10 35 Temperature (°C) 60 25C, VIN = 4.2V 0 85 0 25 LOUT VOUT 50 75 IOUT (mA) 100 125 150 G000 G000 Figure 16. LOUT-VOUT vs Temp VIN 4p2V Figure 17. LOUT-VOUT vs IOUT 0.15 0.12 0.14 0.11 VDO_VOUT (V) VDO_LOUT (V) 0.13 0.1 0.12 0.11 0.09 0.1 VIN = 2.5V, VEN = 1.8V, IOUT = 10mA 0.08 −40 −15 10 35 Temperature (°C) 60 VIN = 2.5V, VEN = 1.8V, IOUT = 10mA 85 0.09 −40 −15 10 35 Temperature (°C) 60 G000 Figure 18. VDOLOUT vs Temp VIN 2p5V 12 85 G000 Figure 19. VDOVOUT vs Temp VIN 2p5V Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :TPS22933 PACKAGE OPTION ADDENDUM www.ti.com 5-Oct-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty TPS22933ARSER PREVIEW UQFN RSE 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS22933ARSET PREVIEW UQFN RSE 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Apr-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS22933ARSER UQFN RSE 8 0 180.0 8.4 1.6 1.6 0.66 4.0 8.0 Q2 TPS22933ARSET UQFN RSE 8 0 180.0 8.4 1.6 1.6 0.66 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Apr-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS22933ARSER UQFN RSE 8 0 202.0 201.0 28.0 TPS22933ARSET UQFN RSE 8 0 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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