ETC P75N02LTG

P75N02LTG
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
NIKO-SEM
TO-220
Lead-Free
D
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
25
5mΩ
75A
1. GATE
2. DRAIN
3. SOURCE
G
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Gate-Source Voltage
TC = 25 °C
Continuous Drain Current
SYMBOL
LIMITS
UNITS
VGS
±20
V
75
ID
TC = 100 °C
50
Pulsed Drain Current 1
IDM
170
Avalanche Current
IAR
60
Avalanche Energy
L = 0.1mH
EAS
140
Repetitive Avalanche Energy 2
L = 0.05mH
EAR
5.6
TC = 25 °C
Power Dissipation
A
mJ
60
PD
TC = 100 °C
W
32.75
Operating Junction & Storage Temperature Range
1
Lead Temperature ( /16” from case for 10 sec.)
Tj, Tstg
-55 to 150
TL
275
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
Junction-to-Case
RθJC
2.3
Junction-to-Ambient
RθJA
62.5
Case-to-Heatsink
RθCS
UNITS
°C / W
0.6
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
LIMITS
UNIT
MIN TYP MAX
STATIC
Drain-Source Breakdown Voltage
V(BR)DSS
VGS = 0V, ID = 250µA
25
VGS(th)
VDS = VGS, ID = 250µA
1
Gate-Body Leakage
IGSS
VDS = 0V, VGS = ±20V
±250
Zero Gate Voltage Drain Current
IDSS
VDS = 20V, VGS = 0V
25
VDS = 20V, VGS = 0V, TJ = 125 °C
250
Gate Threshold Voltage
1
V
1.5
3
nA
µA
Sep-09-2004
P75N02LTG
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
NIKO-SEM
On-State Drain Current 1
Drain-Source On-State Resistance1
Forward Transconductance1
ID(ON)
VDS = 10V, VGS = 10V
RDS(ON)
gfs
TO-220
Lead-Free
70
A
VGS = 10V, ID = 30A
5
7
VGS = 7V, ID = 24A
6
8
VDS = 15V, ID = 30A
16
mΩ
S
DYNAMIC
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
800
Qg
140
2
Total Gate Charge
2
5000
VGS = 0V, VDS = 15V, f = 1MHz
Gate-Source Charge
Qgs
VDS = 0.5V (BR)DSS, VGS = 10V,
40
Gate-Drain Charge2
Qgd
ID = 35A
75
2
Turn-On Delay Time
td(on)
tr
VDS = 15V, RL = 1Ω
7
Turn-Off Delay Time2
td(off)
ID ≅ 30A, VGS = 10V, RGS = 2.5Ω
24
Fall Time2
nC
7
2
Rise Time
pF
1800
tf
nS
6
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
IS
75
Pulsed Current 3
ISM
170
Forward Voltage1
VSD
Reverse Recovery Time
Peak Reverse Recovery Current
Reverse Recovery Charge
IF = IS, VGS = 0V
1.3
trr
IRM(REC)
IF = IS, dlF/dt = 100A / µS
Qrr
A
V
37
nS
200
A
0.043
µC
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
1
2
REMARK: THE PRODUCT MARKED WITH “P75N02LTG”, DATE CODE or LOT #
Orders for parts with Lead-Free plating can be placed using the PXXXXXXXG parts name
2
Sep-09-2004
P75N02LTG
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
NIKO-SEM
TO-220
Lead-Free
TO-220 (3-Lead) MECHANICAL DATA
mm
mm
Dimension
Dimension
Min.
Typ.
Max.
A
9.78
10.16
10.54
B
2.61
2.74
2.87
C
20
Min.
Typ.
Max.
H
2.4
2.54
2.68
I
1.19
1.27
1.35
J
4.4
4.6
4.8
D
28.5
28.9
29.3
K
1.14
1.27
1.4
E
14.6
15.0
15.4
L
2.3
2.6
2.9
F
8.4
8.8
9.2
M
0.26
0.46
0.66
G
0.72
0.8
0.88
N
7°
J
K
F
C
E
B
A
2
3
D
1
I
H
L
M
G
3
Sep-09-2004