NEC UPD3737D

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD3737
5150-BIT CCD LINEAR IMAGE SENSOR
The µ PD3737 is a 5150-bit high sensitivity CCD (Charge Coupled Device) linear image sensor which
changes optical images to electrical signal.
The µPD3737 has high speed CCD register, so it is suitable for high resolution scanners and facsimiles
which scan high definition document at high speed.
FEATURES
• Valid photocell
5150-bit
• Photocell's pitch
7 µm
• High response sensitivity
Providing a response 4.3 times better than the existing equivalent NEC
product (µPD3571) to the light from a daylight fluorescent lamp
• Peak response wavelength
550 nm (green)
• Resolution
16 dot/mm across the shorter side of an A3-size (297 × 420 mm) sheet,
24 dot/mm across the shorter side of an A4-size (210 × 297 mm) sheet
• Power supply
+12 V
• Drive clock level
CMOS output under 5V operation
• High speed scan
252 µs/line
• Data rate
20 MHz
ORDERING INFORMATION
Part Number
Package
Quality Grade
µPD3737D
CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil)
Standard
Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
The information in this document is subject to change without notice.
Document No. IC-3352
(O. D. No. IC-8925)
Date Published July 1994 P
Printed in Japan
The mark
shows revised points.
©
1994
µPD3737
BLOCK DIAGRAM
VOD
φ1L
4
12
14 φ1
φR
22
Optical black (OB) 18 bits, invalid photocell 2 bits,
valid photocell 5150 bits, invalid photocell 2 bits
VOUT 18
13 φ TG
10 φ 2
2
2
5
9
AGND
AGND
φ 2L
µPD3737
PIN CONFIGURATION (Top View)
CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil)
No connection
1
NC
φR
22
Reset gate clock
Analog ground
2
AGND
NC
21
No connection
No connection
3
NC
NC
20
No connection
Output unit drain voltage
4
VOD
NC
19
No connection
Analog ground
5
AGND
V OUT
18
Output
No connection
6
NC
NC
17
No connection
No connection
7
NC
NC
16
No connection
No connection
8
NC
NC
15
No connection
Last-stage shift register clock 2
9
φ 2L
φ1
14
Shift register clock 1
Shift register clock 2
10
φ2
φ TG
13
Transfer gate clock
No connection
11
NC
φ 1L
12
Last-stage shift register clock 1
PHOTOELEMENT STRUCTURE DIAGRAM
2 µm
7 µm
5 µm
Channel stopper
Aluminum
electrode
3
µPD3737
ABSOLUTE MAXIMUM RATINGS (Ta = +25 °C)
Parameter
Symbol
Ratings
Unit
Output unit drain voltage
VOD
–0.3 to +15
V
Shift register clock voltage
Vφ 1, φ 2
–0.3 to +15
V
Last-stage shift register clock voltage
Vφ 1L, Vφ 2L
–0.3 to +15
V
Reset signal voltage
Vφ R
–0.3 to +15
V
Transfer gate signal voltage
Vφ TG
–0.3 to +15
V
Operating ambient temperature
Topt
–25 to +55
°C
Storage temperature
Tstg
–40 to +100
°C
RECOMMENDED OPERATING CONDITIONS (Ta = –25 to + 55 °C)
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Output unit drain voltage
VOD
11.4
12.0
12.6
V
Shift register clock signal high level
Vφ 1H, Vφ 2H,
Vφ 1LH, Vφ 2LH
4.5
5.0
5.5
V
Shift register clock signal low level
Vφ 1L, Vφ 2L,
Vφ 1LL, Vφ 2LL
–0.3
0
+0.5
V
Reset signal φ R high level
Vφ RBH
4.5
5.0
5.5
V
Reset signal φ R low level
Vφ RBL
–0.3
0
+0.5
V
Transfer gate signal high level
Vφ TGH
4.5
Vφ 1H
Vφ 1H
V
Transfer gate signal low level
Vφ TGL
–0.3
0
+0.5
V
Data rate
fφ R
0.5
1
20
MHz
Remark 1. Input reset signal φR to pin 22 via capacitor. Concerning the connection method refer to APPLICATION
EXAMPLE.
2. Operating conditions of reset signal φR is not the condition at device pins but the conditions of the
signal which applied to capacitor.
3. When VφTGH > Vφ1H, image lag increases.
4
µPD3737
ELECTRICAL CHARACTERISTICS
Ta = +25 °C, VDD = 12 V, fφ 1 = 0.5 MHz, data rate = 1 MHz, storage time = 10 ms
light source: 3200 K halogen lamp + C500 (infrared cut filter), input clock = 5 VP-P
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
1.0
1.5
V
lx·s
Saturation voltage
Vsat
Saturation exposure
SE
Daylight color fluorescent lamp
0.2
Photo response non-uniformity
PRNU
VOUT = 500 mV
±5
±10
%
Average dark signal
ADS
Light shielding
1.0
3.0
mV
Dark signal non-uniformity
DSNU
Light shielding
+3
–1
+6
Power consumption
PW
100
Output impedance
ZO
0.2
0.5
kΩ
Response
RF
7.5
9
V/lx·s
Daylight color fluorescent lamp
–3
6
Response peak wavelength
mW
550
VOUT = 1 V
mV
nm
Image lag
IL
Offset level
VOS
Input capacity of shift register clock
pin
Cφ1
Cφ2
800
pF
Input capacity of last-stage shift
register clock pin
Cφ1L
Cφ2L
50
pF
Input capacity of reset pin
CφR
10
pF
Input capacity of transfer gate clock
pin
CφTG
150
pF
Output fall delay time
tdNote
Time from 90 % to 10 % of φ2L fall
is 5ns.
25
ns
Register imbalance
RI
VOUT = 500 mV
0
Transfer efficiency
TTE
VOUT = 500 mV, fφR1 = 20 MHz
Dynamic range
DR
Reset feed-through noise
RFSN
2.0
92
0.3
1
%
3.0
5.0
V
4
%
98
%
Vsat/DSNU
500
times
Light shielding
250
500
mV
Note td is defined as a time from 10 % of φ2L to 10 % of VOUT, output after passing through two steps of emitter
follower in the application example.
5
µPD3737
TIMING CHART 1
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
φ1
1
φ TG
φ2
OB (Optical black) 18 bits
Invalid
photocell
2 bits
5186
5185
5184
5183
5182
5181
37
36
35
Valid photocell 5150 bits
Invalid
photocell
2 bits
6
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
VOUT
1
φR
µPD3737
TIMING CHART 2
t1
φ1
90 %
10 %
φ2
90 %
10 %
t2
t1′
φ 1L
90 %
10 %
φ 2L
90 %
10 %
φR
t3
t5
VOUT
t4
90 %
10 %
t2′
td
t6
90 %
10 %
7
µPD3737
TIMING CHART for φ TG, φ 1, φ 2
t9
t7
t8
90 %
φ TG
10 %
t 10
t 11
90 %
φ1
φ2
(Unit: ns)
Remark
Parameter
MIN.
TYP.
MAX.
t1, t2
0
50
(150)
t1′, t2′
0
5
(25)
t3
15
50
(500)
t4
5
20
(500)
t5, t6
0
20
(50)
t7, t8
0
50
(100)
t9
500
1000
(5000)
t10, t11
0
100
(500)
The MAX. in the table above shows the operation range in which the output characteristics are kept
almost enough for genaral purpose, does not show the limit above which the µPD3737 is destroied.
CROSS POINTS for φ 1, φ 2
CROSS POINTS for φ 1L, φ 2
φ1
φ2
2 V or more
φ2
2 V or more
2 V or more
φ 1L
CROSS POINTS for φ 1, φ 2L
φ1
2 V or more
0.5 V or more
φ 2L
Remark
8
Adjust cross point of (φ 1, φ 2), (φ 1L, φ 2), (φ 1, φ 2L) by each pin external input resistor.
0.5 V or more
µPD3737
DEFINITIONS OF CHARACTERISTIC ITEMS
1.
Saturation voltage: Vsat
Output signal voltage at which the response linearity is lost.
2.
Saturation exposure: SE
Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs.
3.
Photo response non-uniformity: PRNU
The peak/bottom ratio to the average output voltage of all the valid bits calculated by the following formula.
VMAX. or VMIN.
PRNU (%) =
n
∑V
1
n
–1
x 100
j
j=1
n : Number of valid bits
Vj : Output voltage of each bit
V MIN.
V MAX.
Register Dark
DC level
4.
1
n
n
∑V
j
j=1
Average dark signal: ADS
Output average voltage in light shielding.
ADS(mV) =
5.
1
n
n
∑V
j
j=1
Dark signal non-uniformity: DSNU
The difference between peak or bottom output voltage in light shielding and ADS.
ADS
Register Dark
DC level
DSNU MIN.
DSNU MAX.
9
µPD3737
6.
Output impedance: Zo
Output pin impedance viewed from outside.
7.
Response: R
Output voltage divided by exposure (lx•s).
Note that the response varies with the light source.
8.
Image Lag: IL
The rate between the last output voltage and the next one after read out the data of a line.
φ TG
Light
OFF
ON
VOUT
V1
V1
IL =
VOUT
x 100 (%)
VOUT
9.
Register Imbalance: RI
The rate of the difference between the average of the output voltage of Odd and Even bits, against the average
output voltage of all the valid bits.
2
n
RI =
n
2
∑(V
– V2 j
)
x 100 (%)
1
n
10
2 j–1
j=1
n
∑V
j=1
j
µPD3737
STANDARD CHARACTERISTIC CURVES (Ta = 25 °C)
DARK OUTPUT TEMPERATURE
CHARACTERISTIC
STORAGE TIME OUTPUT VOLTAGE
CHARACTERISTIC
2
8
4
Relative Output Voltage
Relative Output Voltage
1
2
1
0.5
0.2
0.25
0.1
0.1
0
10
20
30
40
1
50
5
10
Storage Time (ms)
Ambient Temperature T a (°C)
SPECTRAL RESPONSE CHARACTERISTIC
100
Response Ratio (%)
80
60
40
20
0
400
600
800
1000
1200
Wavelength (nm)
11
µPD3737
APPLICATION EXAMPLE
+12 V
φR
φ1
47 Ω
+ 47 µ F/25 V
4.7 kΩ
φ TG
51 Ω
AGND
Tr2
φ 1L
Output
Tr1
1
1
1
1
1 kΩ
51 Ω
AGND
2Ω
1000 pF
10 Ω
10 Ω
AGND
22
φR
21
NC
20
NC
19
NC
18
VOUT
17
NC
16
NC
15
NC
14
φ1
13
φ TG
12
φ 1L
NC
7
NC
8
φ 2L
9
φ2
10
NC
11
µ PD3737D
NC
1
AGND
2
NC
3
VOD
4
AGND
5
NC
6
0.1 µ F
+
10 Ω
2Ω
–
47 µ F/25 V
AGND
2
2
φ2
φ 2L
1. 74AC04 Tr1 2SA1005
2. 74AC04 Tr2 2SC945
12
µPD3737
PACKAGE DIMENSIONS
CCD LINEAR IMAGE SENSOR 22PIN CERAMIC DIP (CERDIP) (400mil)
(Unit : mm)
1bit
9.65 ± 0.3
1.60±0.25
4.9 ± 0.3
42.2 ± 0.25
48.6 ± 0.5
(5.27)
0.46 ± 0.06
4.33±0.5
2.54
1.02 ± 0.15
4.68±0.5
(1.95)
10.16
2.38 ±0.3
0~10°
.05
0.25±0
25.4
Name
Dimensions
Refractive index
Glass cap
47.5×9.25×0.7
1.5
22D-1CCD-PKG7
13
µPD3737
RECOMMENDED SOLDERING CONDITIONS
The following conditions (see table below) must be met when soldering this product.
For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL”
(IEI-1207).
Please consult with our sales offices in case other soldering process is used, or in case soldering is done under
different conditions.
Table 1 Type of Through Hole Device
µPD3737D: CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil)
Soldering Process
Soldering Conditions
Wave soldering
(For leads only)
Solder temperature: 260 ˚C or below,
Flow time: 10 seconds or below
Partial
heating method
Pin temperature: 260 ˚C or below,
Time: 10 seconds or below
Caution Do not jet molten solder on the surface of package.
14
µPD3737
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction of
the gate oxide and ultimately degrade the device operation. Steps must be
taken to stop generation of static electricity as much as possible, and quickly
dissipate it once, when it has occurred.
Environmental control must be
adequate. When it is dry, humidifier should be used. It is recommended to
avoid using insulators that easily build static electricity.
Semiconductor
devices must be stored and transported in an anti-static container, static
shielding bag or conductive material. All test and measurement tools including
work bench and floor should be grounded. The operator should be grounded
using wrist strap. Semiconductor devices must not be touched with bare
hands. Similar precautions need to be taken for PW boards with semiconductor
devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no
connection is provided to the input pins, it is possible that an internal input
level may be generated due to noise, etc., hence causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS
devices must be fixed high or low by using a pull-up or pull-down circuitry. Each
unused pin should be connected to VDD or GND with a resistor, if it is considered
to have a possibility of being an output pin. All handling related to the unused
pins must be judged device by device and related specifications governing the
devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Production
process of MOS does not define the initial operation status of the device.
Immediately after the power source is turned ON, the devices with reset
function have not yet been initialized. Hence, power-on does not guarantee
out-pin levels, I/O settings or contents of registers. Device is not initialized
until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
15
µPD3737
[MEMO]
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear
reactor control systems and life support systems. If customers intend to use NEC devices for above applications
or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact
our sales people in advance.
Application examples recommended by NEC Corporation
Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment,
Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc.
Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime
systems, etc.
M4 92.6
16