NEC 2SK3108

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3108
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
ORDERING INFORMATION
The 2SK3108 is N channel MOS FET device that features a
low on-state resistance and excellent switching characteristics,
and designed for high voltage applications such as DC/DC
PART NUMBER
PACKAGE
2SK3108
Isolated TO-220
converter.
FEATURES
•Gate voltage rating ±30 V
•Low on-state resistance
RDS(on) = 0.4 Ω MAX. (VGS = 10 V, ID = 4.0 A)
•Low input capacitance
Ciss = 400 pF TYP. (VDS = 10 V, VGS = 0 V)
•Avalanche capability rated
•Built-in gate protection diode
•Isolated TO-220 package
ABSOLUTE MAXIMUM RATING (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
200
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±30
V
Drain Current(DC) (TC = 25°C)
ID(DC)
±8.0
A
ID(pulse)
±24
A
Total Power Dissipation (TA = 25°C)
PT1
2.0
W
Total Power Dissipation (TC = 25°C)
PT2
25
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
−55 to +150
°C
Drain Current(pulse)
Note1
Single Avalanche Current
Note2
IAS
8.0
A
Single Avalanche Energy
Note2
EAS
51
mJ
Note1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 100 V, RG = 25 Ω , VGS = 20 V→0 V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13331EJ1V0DS00 (1st edition)
Date Published January 2000 NS CP (K)
Printed in Japan
The mark ★ shows major revised points.
©
1998,2000
2SK3108
ELECTRICAL CHARACTERISTICS (TA = 25°C)
Characteristics
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Drain Leakage Current
IDSS
VDS = 200 V, VGS = 0 V
100
µA
Gate Leakage Current
IGSS
VGS = ±30 V, VDS = 0 V
±10
µA
Gate to Source Cut-off Voltage
VGS(off)
VDS = 10 V, ID = 1 mA
2.5
4.5
V
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 4.0 A
1.5
S
Ω
Drain to Source On-state Resistance RDS(on)
VGS = 10 V, ID = 4.0 A
0.32
Input Capacitance
Ciss
VDS = 10 V
400
pF
Output Capacitance
Coss
VGS = 0 V
110
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
55
pF
Turn-on Delay Time
td(on)
VDD = 100 V, ID = 4.0 A
12
ns
Rise Time
tr
VGS(on) = 10 V
25
ns
Turn-off Delay Time
td(off)
RG = 10 Ω
40
ns
Fall Time
tf
20
ns
★ Total Gate Charge
0.4
QG
VDD = 160 V
18
nC
Gate to Source Charge
QGS
VGS = 10 V
3.5
nC
Gate to Drain Charge
QGD
ID = 8.0 A
10
nC
Diode Forward Voltage
VF(S-D)
IF = 8.0 A, VGS = 0 V
1.0
V
Reverse Recovery Time
trr
IF = 8.0 A, VGS = 0 V
250
ns
Reverse Recovery Charge
Qrr
di/dt = 50 A/µs
1.0
µC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
50 Ω
VGS
RL
Wave Form
RG
PG.
VDD
VGS
0
VGS(on)
10 %
90 %
VDD
ID
90 %
90 %
IAS
ID
VGS
0
BVDSS
ID
VDS
ID
τ
VDD
Starting Tch
τ = 1 µs
Duty Cycle ≤ 1 %
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
2
50 Ω
0
10 %
10 %
Wave Form
RL
VDD
Data Sheet D13331EJ1V0DS00
td(on)
tr
ton
td(off)
tf
toff
2SK3108
★ TYPICAL CHARACTERISTICS (TA = 25°C)
FORWARD TRANSFER CHARACTERISTICS
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
100
30
ID - Drain Current - A
ID - Drain Current - A
VGS = 30 V
25
20
VGS = 10 V
15
10
Pulsed
10
1
0.1
0.01
Tch =125˚C
75˚C
25˚C
-25˚C
0.001
VDS = 10 V
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
5
0
Pulsed
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
VGS - Gate to Source Voltage - V
5.0
VDS = 10 V
ID = 1 mA
4.5
4.0
3.5
3.0
2.5
|yfs| - Forward Transfer Admittance - s
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
2.0
0
25 50
75 100 125 150
− 50 − 25
Tch - Channel Temperature - ˚C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
1.0
Pulsed
0.8
ID = 8.0 A
4.0 A
1.6 A
0.6
0.4
0.2
0
0
2
4
6
8
10 12 14 16 18
20
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
10
1
VDS =10 V
Pulsed
Tch = -25˚C
Tch = 25˚C
Tch = 75˚C
Tch = 125˚C
0.1
0.01
0.01
0.1
100
10
1
ID- Drain Current - A
RDS(on) - Drain to Source On-state Resistance - Ω
RDS(on) - Drain to Source On-state Resistance - Ω
VGS(off) - Gate to Source Cut-off Voltage - V
VDS - Drain to Source Voltage - V
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
1.0
Pulsed
0.8
VGS = 10 V
0.6
0.4
VGS = 30 V
0.2
0
0.1
1
10
100
ID - Drain Current - A
VGS - Gate to Source Voltage - V
Data Sheet D13331EJ1V0DS00
3
2SK3108
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1.2
ID = 8.0 A
0.8
0.6
ID = 4.0 A
0.4
0.2
VGS = 10 V
Pulsed
0
− 50 − 25
ISD - Diode Forward Current - A
100
1.0
Pulsed
10
VGS = 10 V
1
VGS = 0 V
0.1
0.0
0
25 50
75 100 125 150
Tch - Channel Temperature - ˚C
100
Coss
Crss
1
10
100
VDS - Drain to Source Voltage - V
100
10
di/dt = 50A / µs
VGS = 0 V
100
VDS - Drain to Source Voltage - V
trr - Reverse Recovery Time - ns
1.4
1.6
100
tf
td(off)
td(on)
10
1
VDD = 100 V
VGS = 10 V
RG = 10 Ω
10
100
1
0.1
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
16
200
ID = 8.0 A
14
150
12
VDD = 160 V
100 V
40 V
10
100
8
6
VDD = 160 V
100 V
40 V
50
0
0
5
10
4
2
15
QG - Gate Charge - nC
ID - Drain Current - A
4
1.2
ID - Drain Current - A
1000
10
1.0
tr
1000
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1
0.8
1000
td(on), tr, td(off), tf - Switching Time - ns
Ciss, Coss, Crss - Capacitance - pF
VGS = 0 V
f = 1 MHz
Ciss
1
0.1
0.6
SWITCHING CHARACTERISTICS
1000
10
0.1
0.4
VSD - Source to Drain Voltage - V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
10000
0.2
Data Sheet D13331EJ1V0DS00
0
20
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - Ω
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
2SK3108
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
40
100
80
60
40
20
0
0
20
40
60
80
30
20
10
0
100 120 140 160
TC - Case Temperature - ˚C
0
20
40
60
80
100 120 140 160
TC - Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
ited
10
n)
S(o
ID(pulse)
Lim
10
0
RD
PW
µs
=
10
µs
1
ID(DC)
m
s
10 3 m
r D 10 m s
iss 0 m s
ip s
at
io
n
Li
m
ite
d
Po
we
1
TC = 25 ˚C
0.1 Single Pulse
1
10
100
1000
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1 000
rth(t) - Transient Thermal Resistance - ˚C/W
ID - Drain Current - A
100
100
Rth(ch-A) = 62.5˚C/W
10
Rth(ch-C) = 5˚C/W
1
0.1
0.01
Single Pulse
10 µ
100 µ
1m
10 m
100 m
1
10
100
1 000
PW - Pulse Width - s
Data Sheet D13331EJ1V0DS00
5
2SK3108
IAS - Single Avalanche Energy - A
100
10
SINGLE AVALANCHE ENERGY
DERATING FACTOR
VDD = 100 V
VGS = 20 V 0 V
RG = 25 Ω
Starting Tch = 25˚C
IAS = 8.0 A
EA
S
=5
1m
J
1
0.01
0.1
1
10
Energy Defrating Factor - %
SINGLE AVALANCHE ENERGY vs.
INDUCTIVE LOAD
VDD = 100 V
VGS = 20 V 0 V
RG = 25 Ω
IAS 8.0 A
100
80
60
40
20
0
25
L - Inductive Load - mH
6
50
75
100
125
150
Starting Tch - Starting Channel Temperature - ˚C
Data Sheet D13331EJ1V0DS00
2SK3108
PACKAGE DRAWING(Unit : mm)
Isolated TO-220 (MP-45F)
10.0±0.3
φ 3.2±0.2
4.5±0.2
2.7±0.2
0.7±0.1
2.54 TYP.
12.0±0.2
Drain
1.3±0.2
1.5±0.2
2.54 TYP.
Body
Diode
Gate
13.5 MIN.
4±0.2
3±0.1
15.0±0.3
EQUIVALENT CIRCUIT
Gate
Protection
Diode
Source
2.5±0.1
0.65±0.1
1.Gate
2.Drain
3.Source
1 2 3
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
Data Sheet D13331EJ1V0DS00
7
2SK3108
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
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the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
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The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8