HAT2218R Silicon N Channel Power MOS FET with Schottky Barrier Diode High Speed Power Switching REJ03G0396-0300 Rev.3.00 Aug.23.2004 Features • • • • Low on-resistance Capable of 4.5 V gate drive High density mounting Built-in Schottky Barrier Diode Outline SOP-8 7 8 D1 D1 5 6 S1/D2 S1/D2 8 2 G1 5 7 6 4 G2 S1/D2(kelvin) 1 MOS1 3 1 2 4 S2 3 MOS2 and Schottky Barrier Diode Absolute Maximum Ratings (Ta = 25°C) Ratings Item Drain to source voltage Gate to source voltage Drain current Drain peak current Reverse drain current Symbol VDSS VGSS ID ID(pulse)Note1 IDR MOS1 30 ±20 7.5 60 7.5 MOS2 & SBD 30 ±12 8.0 64 8.0 Channel dissipation Pch Note2 1.5 1.5 Channel temperature Tch 150 150 Storage temperature Tstg –55 to +150 –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. 1 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10 s Rev.3.00, Aug.23.2004, page 1 of 9 Unit V V A A A W °C °C HAT2218R Electrical Characteristics • MOS1 (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Notes: 3. Pulse test Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr Min 30 — — 1.0 — — 9 — — — — — — — — Typ — — — — 19 27 15 630 155 57 4.6 2.2 1.2 7 14 Max — ±0.1 1 2.5 24 40 — — — — — — — — — Unit V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns td(off) tf VDF trr — — — — 36 3.4 0.85 17 — — 1.11 — ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 3.75 A, VGS = 10 V Note3 ID = 3.75 A, VGS = 4.5 V Note3 ID = 3.75 A, VDS = 10 V Note3 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 7.5 A VGS =10 V, ID = 3.75 A VDD ≈ 10 V RL = 2.66 Ω Rg = 4.7 Ω IF = 7.5 A, VGS = 0 Note3 IF =7.5 A, VGS = 0 diF/ dt = 100 A/µs • MOS2 & Schottky Barrier Diode (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) Forward transfer admittance Input capacitance RDS(on) |yfs| Ciss Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Schottky Barrier diode forward voltage Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VF Body–drain diode reverse recovery time Notes: 3. Pulse test Rev.3.00, Aug.23.2004, page 2 of 9 trr Min 30 — — 1.4 — — 15 — Typ — — — — 17 21 25 1330 Max — ±0.1 1 2.5 22 29 — — Unit V µA mA V mΩ mΩ S pF — — — — — — — — — — — 230 92 11 3.8 3.2 10 16 43 3.9 0.5 15 — — — — — — — — — — — pF pF nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±12 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D =1 mA ID =4 A, VGS = 10 V Note3 ID = 4 A, VGS = 4.5 V Note3 ID = 4 A, VDS = 10 V Note3 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 8 A VGS = 10 V, ID = 4 A VDD ≈ 10 V RL = 2.5 Ω Rg = 4.7 Ω IF = 3.5 A, VGS = 0 Note3 IF = 8 A, VGS = 0 diF/ dt = 100 A/µs HAT2218R Main Characteristics • MOS1 Power vs. Temperature Derating 3.0 ID (A) Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s 100 2.0 1.0 10 µs 10 Drain Current Pch (W) Channel Dissipation Maximum Safe Operation Area 1000 4.0 PW DC =1 0m s( Op era 1 1 m 100 µs s 1s tio n( PW Operation in this area is 0.1 limited by RDS(on) ho t) ≤1 No 0 ste 4 ) Ta = 25°C 0 50 100 Ambient Temperature 150 200 0.01 1 shot Pulse 0.1 1 10 100 Drain to Source Voltage VDS (V) Ta (°C) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics 20 Typical Transfer Characteristics 20 4.5 V 3.2 V 10 VGS = 2.8 V Drain Current ID (A) ID (A) Drain Current VDS = 10 V Pulse Test 3.6 V 10 V 10 Pulse Test 200 5 Drain to Source Voltage VDS Drain to Source Saturation Voltage vs Gate to Source Voltage Pulse Test 150 100 ID = 5 A 50 2A 1A 0 12 4 8 Gate to Source Voltage Rev.3.00, Aug.23.2004, page 3 of 9 0 10 (V) 16 20 VGS (V) 8 VGS 10 (V) Static Drain to Source on State Resistance vs. Drain Current 100 Static Drain to Source on State Resistance RDS(on) (mΩ) Drain to Source Voltage VDS(on) (mV) 0 Tc = 75°C 25°C −25°C 2 4 6 Gate to Source Voltage VGS = 4.5 V 10 V 10 1 0.1 Pulse Test 1 Drain Current 10 ID (A) 100 40 VGS = 4.5 V 30 20 1 A, 2 A, 5 A 10 V 10 0 -25 Forward Transfer Admittance vs. Drain Current 100 Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance vs. Temperature 50 5A Pulse Test ID = 1 A, 2 A 50 Tc = –25°C 20 10 5 25°C 2 75°C 1 0.5 0.1 0.1 0.2 0.5 1 0 25 50 75 100 125 150 Case Temperature Tc (°C) 50 100 ID (A) Typical Capacitance vs. Drain to Source Voltage VGS = 0 f = 1 MHz 5000 50 20 10 5 di / dt = 100 A / µs VGS = 0, Ta = 25°C 2 2000 1000 Ciss 500 200 Coss 100 Crss 50 20 10 0 0.3 1 3 10 30 100 Reverse Drain Current IDR (A) Dynamic Input Characteristics 16 VGS 30 12 VDS 20 8 10 0 4 VDD = 25 V 10 V 5V 4 8 Gate Charge Rev.3.00, Aug.23.2004, page 4 of 9 12 16 Qg (nC) 0 20 50 Switching Time t (ns) VDD = 25 V 10 V 5V 40 Switching Characteristics (V) ID = 7.5 A 5 10 15 20 25 30 Drain to Source Voltage VDS (V) 100 20 VGS 50 Gate to Source Voltage VDS (V) 5 10 20 10000 1 0.1 Drain to Source Voltage 2 Drain Current Body-Drain Diode Reverse Recovery Time 100 VDS = 10 V Pulse Test 0.2 Capacitance C (pF) Reverse Recovery Time trr (ns) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT2218R td(off) tr 20 10 td(on) 5 tf 2 VGS = 10 V, VDD = 10 V Rg =4.7 Ω, duty ≤ 1 % 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 HAT2218R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 20 10 V 5V VGS = 0V, –5 V 10 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 VSD (V) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 1 D=1 0.5 0.2 0.1 0.1 θch - f(t) = γs (t) x θch - f θch - f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.05 0.02 0.01 0.01 t ho lse PDM pu D= 1s PW T PW T 0.001 10 µ 100 µ 1m 10 m 100 m 1 Pulse Width PW (S) Rev.3.00, Aug.23.2004, page 5 of 9 10 100 1000 10000 HAT2218R • MOS2 & Schottky Barrier Diode Power vs. Temperature Derating 3.0 ID (A) Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s 100 2.0 1.0 10 µs 10 Drain Current Pch (W) Channel Dissipation Maximum Safe Operation Area 1000 4.0 PW DC 50 100 150 Ambient Temperature s =1 0m s( 1s tio n( PW Operation in this area is 0.1 limited by RDS(on) 0.1 200 ho t) ≤ 1Note 0s 4 ) 1 Ta (°C) Typical Transfer Characteristics Pulse Test 10 V VDS = 10 V Pulse Test 10 2.6 V ID (A) ID (A) 3.0 V 2.8 V 10 Tc = 75°C 25°C VGS = 2.4 V 200 5 Drain to Source Voltage VDS Drain to Source Saturation Voltage vs Gate to Source Voltage Pulse Test 150 100 ID = 5 A 50 0 2A 1A 6 2 4 8 10 12 Gate to Source Voltage VGS (V) Rev.3.00, Aug.23.2004, page 6 of 9 −25°C 0 10 (V) 2 4 6 Gate to Source Voltage 8 VGS 10 (V) Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test Static Drain to Source on State Resistance RDS(on) (mΩ) 0 100 20 Drain Current 4.5 V 10 Drain to Source Voltage VDS (V) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics 20 Drain Current 0µ s Ta = 25°C 0.01 1 shot Pulse 0 Drain to Source Voltage VDS(on) (mV) 1m Op era 1 10 VGS = 4.5 V 10 1 0.1 10 V 1 Drain Current 10 ID (A) 100 40 5A ID = 1 A, 2 A 30 VGS = 4.5 V 20 1 A, 2 A, 5 A 10 V 10 0 -25 Forward Transfer Admittance vs. Drain Current 100 Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance vs. Temperature 50 Pulse Test 50 Tc = –25°C 20 10 5 25°C 2 75°C 1 0.5 0.1 0.1 0.2 0.5 1 0 25 50 75 100 125 150 Case Temperature Tc (°C) 50 100 ID (A) Typical Capacitance vs. Drain to Source Voltage VGS = 0 f = 1 MHz 5000 50 20 10 5 di / dt = 100 A / µs VGS = 0, Ta = 25°C 2 Ciss 2000 1000 500 200 Coss 100 Crss 50 20 10 0 0.3 1 3 10 30 100 Reverse Drain Current IDR (A) Dynamic Input Characteristics 30 8 VDD = 25 V 10 V 5V VGS 6 VDS 20 4 VDD = 25 V 10 V 5V 10 0 4 8 Gate Charge Rev.3.00, Aug.23.2004, page 7 of 9 12 2 16 Qg (nC) 0 20 50 Switching Time t (ns) 40 Switching Characteristics (V) ID = 8 A 5 10 15 20 25 30 Drain to Source Voltage VDS (V) 100 10 VGS 50 Gate to Source Voltage VDS (V) 5 10 20 10000 1 0.1 Drain to Source Voltage 2 Drain Current Body-Drain Diode Reverse Recovery Time 100 VDS = 10 V Pulse Test 0.2 Capacitance C (pF) Reverse Recovery Time trr (ns) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT2218R td(off) tr 20 td(on) 10 5 tf 2 VGS = 10 V, VDD = 10 V Rg =4.7 Ω, duty ≤ 1 % 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 HAT2218R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 20 10 V VGS = 0V, –5 V 5V 10 Pulse Test 0 0.4 0.8 1.2 1.6 Source to Drain Voltage 2.0 VSD (V) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 1 D=1 0.5 0.2 0.1 0.1 θch - f(t) = γs (t) x θch - f θch - f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.05 0.02 0.01 0.01 e uls PDM p ot D= h 1s PW T PW T 0.001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) • Common Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor Rg 90% D.U.T. RL Vin Vin 10 V V DS = 10 V Vout 10% 10% 90% td(on) Rev.3.00, Aug.23.2004, page 8 of 9 tr 10% 90% td(off) tf HAT2218R Package Dimensions As of January, 2003 Unit: mm 3.95 4.90 5.3 Max 5 8 1 1.75 Max *0.22 ± 0.03 0.20 ± 0.03 4 0.75 Max + 0.10 6.10 – 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.14 – 0.04 + 0.11 0˚ – 8˚ 1.27 + 0.67 0.60 – 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms — 0.085 g Ordering Information Part Name HAT2218R-EL-E Quantity 2500 pcs Shipping Container Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00, Aug.23.2004, page 9 of 9 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. 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