DATA SHEET MOS FIELD EFFECT TRANSISTOR 2SJ607 SWITCHING P-CHANNEL POWER MOS FET ORDERING INFORMATION DESCRIPTION The 2SJ607 is P-channel MOS Field Effect Transistor designed for high current switching applications. PART NUMBER PACKAGE 2SJ607 TO-220AB FEATURES 2SJ607-S TO-262 • Super low on-state resistance: RDS(on)1 = 11 mΩ MAX. (VGS = −10 V, ID = −42 A) RDS(on)2 = 16 mΩ MAX. (VGS = −4.0 V, ID = −42 A) • Low input capacitance: Ciss = 7500 pF TYP. (VDS = −10 V, VGS = 0 V) • Built-in gate protection diode 2SJ607-ZJ TO-263 2SJ607-Z TO-220SMD Note Note TO-220SMD package is produced only in Japan (TO-220AB) ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) VDSS −60 V Gate to Source Voltage (VDS = 0 V) VGSS m 20 V Drain Current (DC) (TC = 25°C) ID(DC) m 83 A Note1 ID(pulse) m 332 A Total Power Dissipation (TC = 25°C) PT 160 W Total Power Dissipation (TA = 25°C) PT 1.5 W Channel Temperature Tch 150 °C Drain Current (pulse) Tstg −55 to +150 °C Single Avalanche Current Note2 IAS −50 A Single Avalanche Energy Note2 EAS 250 mJ Storage Temperature (TO-262) Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1% 2. Starting Tch = 25°C, VDD = −30 V, RG = 25 Ω, VGS = −20 → 0 V (TO-263, TO-220SMD) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. D14655EJ3V0DS00 (3rd edition) Date Published July 2002 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 2000, 2001 2SJ607 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS Zero Gate Voltage Drain Current IDSS VDS = −60 V, VGS = 0 V Gate Leakage Current IGSS VGS = TYP. m 20 V, VDS = 0 V MAX. UNIT −10 µA m 10 µA −2.5 V VGS(off) VDS = −10 V, ID = −1 mA −1.5 −2.0 | yfs | VDS = −10 V, ID = −42 A 45 90 RDS(on)1 VGS = −10 V, ID = −42 A 9.1 11 mΩ RDS(on)2 VGS = −4.0 V, ID = −42 A 11 16 mΩ Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance MIN. S Input Capacitance Ciss VDS = −10 V 7500 pF Output Capacitance Coss VGS = 0 V 1800 pF Reverse Transfer Capacitance Crss f = 1 MHz 430 pF Turn-on Delay Time td(on) VDD = −30 V, ID = −42 A 23 ns VGS = −10 V 16 ns RG = 0 Ω 340 ns 160 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD= −48 V 188 nC Gate to Source Charge QGS VGS = −10 V 30 nC Gate to Drain Charge QGD ID = −83 A 48 nC VF(S-D) IF = 83 A, VGS = 0 V 1.0 V Reverse Recovery Time trr IF = 83 A, VGS = 0 V 64 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 150 nC Body Diode Forward Voltage TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG = 25 Ω D.U.T. L RL PG. 50 Ω VDD VGS = −20 → 0 V RG PG. VGS (−) VGS Wave Form 0 VGS 10% 90% VDD VDS (−) − IAS 90% BVDSS VDS ID VDS Wave Form τ VDD Starting Tch τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. PG. 2 IG = −2 mA RL 50 Ω VDD 90% VDS VGS (−) 0 Data Sheet D14655EJ3V0DS 10% 10% 0 td(on) tr ton td(off) tf toff 2SJ607 TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 200 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 120 80 40 0 160 0 Tch - Channel Temperature - ˚C 20 40 60 80 100 120 140 160 TC - Case Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA −1000 PW 10 0 d −100 ite ) on R ( DS Lim ID(DC) 1 10 µs = 10 µs m s Po m s Lim we DC ite r Di d ss ipa tio n −10 TC = 25˚C Single Pulse −1 −0.1 −1 −100 −10 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A ID(pulse) 100 Rth(ch-A) = 83.3˚C/W 10 1 Rth(ch-C) = 0.78˚C/W 0.1 Single Pulse 0.01 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet D14655EJ3V0DS 3 2SJ607 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS −300 VGS = −10 V −240 −100 −10 ID - Drain Current - A ID - Drain Current - A −1000 TA = −55˚C 25˚C 75˚C 125˚C −1 −180 −4.5 V −120 −4.0 V −60 −0.1 −1 −2 VDS = −10 V Pulsed −5 −4 −3 0 Pulsed −1 0 VGS - Gate to Source Voltage - V 10 TA = 125˚C 75˚C 25˚C −55˚C VDS = −10 V Pulsed −0.1 −1 −10 −100 ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ 100 20 20 ID = −83 A −42 A −17 A 10 0 −2 0 −6 −4.0 16 VGS = −4.0 V −4.5 V −10 V 8 4 0 −1 −4 −10 −100 −10 −8 VGS - Gate to Source Voltage - V GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE Pulsed 12 −5 −4 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 30 Pulsed DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT VGS(off) - Gate Cut-off Voltage - V | yfs | - Forward Transfer Admittance - S RDS(on) - Drain to Source On-state Resistance - mΩ 4 1000 0.1 −0.01 −3 VDS - Drain to Source Voltage - V FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 1 −2 −1000 VDS = −10 V ID = −1 mA −3.0 −2.0 −1.0 0 −50 0 50 100 Tch - Channel Temperature - ˚C ID - Drain Current - A Data Sheet D14655EJ3V0DS 150 SOURCE TO DRAIN DIODE FORWARD VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 20 Pulsed −1000 ISD - Diode Forward Current - A RDS(on) - Drain to Source On-state Resistance - mΩ 2SJ607 VGS = −4.0 V −4.5 V −10 V 16 12 8 4 0 ID = −42 A −50 0 50 100 −100 VGS = −10 V −4.0 V −10 0V −1 −0.1 150 Pulsed CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF SWITCHING CHARACTERISTICS 10000 Ciss Coss 1000 Crss −1 tf 100 td(on) 10 tr VDD = −30 V VGS = −10 V RG = 0 Ω 1 −0.1 −100 −10 td(off) VGS −6 −30 −4 −20 −10 0 0 −8 −2 VDS 40 80 120 160 0 200 IAS - Single Avalanche Current - A −10 VDD = −48 V −30 V −12 V −100 SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD −1000 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V DYNAMIC INPUT/OUTPUT CHARACTERISTICS −12 −60 ID = −83 A −50 −10 −1 ID - Drain Current - A VDS - Drain to Source Voltage - V −40 −2.0 1000 VGS = 0 V f = 1 MHz 100 −0.1 −1.5 VSD - Source to Drain Voltage - V Tch - Channel Temperature - ˚C 100000 −1.0 −0.5 0 −100 IAS = −50 A EAS =2 50 −10 VDD = −30 V RG = 25 Ω VGS = −20 → 0 V −1 10 µ QG - Gate Charge - nC mJ 100 µ 1m 10 m L - Inductive Load - H Data Sheet D14655EJ3V0DS 5 2SJ607 SINGLE AVALANCHE ENERGY DERATING FACTOR Energy Derating Factor - % 160 VDD = –30 V RG = 25 Ω VGS = –20 → 0 V IAS ≤ –50 A 140 120 100 80 60 40 20 0 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - ˚C 6 Data Sheet D14655EJ3V0DS 2SJ607 ★ PACKAGE DRAWINGS (Unit: mm) 1) TO-220AB (MP-25) 2) TO-262 (MP-25 Fin Cut) 3.0±0.3 φ 3.6±0.2 1.0±0.5 4.8 MAX. 10.6 MAX. 10 TYP. 1.3±0.2 4 4 1 2 3 0.5±0.2 0.75±0.1 2.54 TYP. 12.7 MIN. 1.3±0.2 12.7 MIN. 6.0 MAX. 1 2 3 1.3±0.2 2.8±0.2 1.3±0.2 8.5±0.2 15.5 MAX. 5.9 MIN. 10.0 TYP. 4.8 MAX. 0.5±0.2 0.75±0.3 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 3) TO-263 (MP-25ZJ) 4) TO-220SMD (MP-25Z) 4.8 MAX. 10 TYP. Note 4.8 MAX. 10 TYP. 1.3±0.2 1.3±0.2 0 2.8±0.2 2.54 TYP. 1.4±0.2 TY R 0.8 T . YP 0.5±0.2 0.75±0.3 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 8.5±0.2 3 3.0±0.5 0.7±0.2 2.54 TYP. P. .5R 2 0 .5R P. P. TY TY R .8 2.54 TYP. 0 2.8±0.2 1.4±0.2 1 1.1±0.4 8.5±0.2 3 5.7±0.4 2 1.0±0.5 4 1.0±0.5 4 1 2.8±0.2 2.54 TYP. 0.5±0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) Note This package is produced only in Japan. EQUIVALENT CIRCUIT Drain Body Diode Gate Gate Protection Diode Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Source Data Sheet D14655EJ3V0DS 7 2SJ607 • The information in this document is current as of July, 2002. The information is subject to change without notice. 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