HITACHI HAF2015RJ

HAF2015RJ
Silicon N Channel MOS FET Series
Power Switching
ADE-208-933 (Z)
1st. Edition
Dec. 2000
This FET has the over temperature shut–down capability sensing to the junction temperature. This FET has the
built–in over temperature shut–down circuit in the gate area. And this circuit operation to shut–down the gate
voltage in case of high junction temperature like applying over power consumption, over current etc.
Features
•
•
•
•
•
Logic level operation (5 to 6 V Gate drive)
High endurance capability against to the short circuit
Built–in the over temperature shut–down circuit
Temperature hysteresis type.
High density mounting.
Outline
D
D
SOP-8
8
7
2
Gate resistor
G
8
Tmperature
sencing
circuit
self
return
circuit
Gate
shutdown
circuit
3
1 2
S
D
D
5
4
self
return
circuit
6
1, 3
2, 4
5, 6, 7, 8
Gate resistor
Tmperature
sencing
circuit
4
1
MOS1
G
5
7 6
Gate
shutdown
circuit
3
MOS2
S
Source
Gate
Drain
HAF2015RJ
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
60
V
Gate to source voltage
VGSS
16
V
Gate to source voltage
VGSS
–2.5
V
Drain current
ID
2
A
4
A
2
A
0.54
A
Drain peak current
I D(pulse)
Body-drain diode reverse drain current
I DR
Avalanche current
I AP
Avalanche energy
Note1
Note4
EAR
Note4
25
mJ
Pch
Note2
2
W
Channel dissipation
Pch
Note3
1.5
W
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Channel dissipation
Note:
1.
2.
3.
4.
PW ≤ 10 µs, duty cycle ≤ 1 %
1 Drive operation : When using the glass epoxy board (FR4 40 × 40 × 1.6mm), PW ≤ 10s
2 Drive operation : When using the glass epoxy board (FR4 40 × 40 × 1.6mm), PW ≤ 10s
Tch = 25°C , Rg > 50 Ω
Typical Operation Characteristics
Item
Symbol
Min
Typ
Max
Unit
Input voltage
VIH
3.5
—
—
V
VIL
—
—
1.2
V
Input current
I IH1
—
—
100
µA
Vi = 5V, VDS = 0
(Gate non shut down)
I IH2
—
—
50
µA
Vi = 3.5V, VDS = 0
I IL
—
—
1
µA
Vi = 1.2V, VDS = 0
Input current
I IH(sd)1
—
0.53
—
mA
Vi = 8V, VDS = 0
(Gate shut down)
I IH(sd)2
—
0.2
—
mA
Vi = 3.5V, VDS = 0
Shut down temperature
Tsd
—
175
—
°C
Channel temperature
Hysteresis temperature
Thr
—
120
—
°C
Channel temperature
Gate operation voltage
Vop
3.5
—
12
V
2
Test Conditions
HAF2015RJ
Electrical Characteristics (Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Drain current
I D1
0.7
—
—
A
VGS = 3.5 V, VDS = 2 V
Drain current
I D2
—
—
10
mA
VGS = 1.2 V, VDS = 2 V
Drain to source breakdown
voltage
V(BR)DSS
60
—
—
V
I D = 10 mA, VGS = 0
Gate to source breakdown
voltage
V(BR)GSS
16
—
—
V
I G = 300 µA, VDS = 0
Gate to source breakdown
voltage
V(BR)GSS
–2.5
—
—
V
I G = –100 µA, VDS = 0
Gate to source leak current
I GSS1
—
—
100
µA
VGS = 5 V, VDS = 0
I GSS2
—
—
50
µA
VGS = 3.5 V, VDS = 0
I GSS3
—
—
1
µA
VGS = 1.2 V, VDS = 0
I GSS4
—
—
–100
µA
VGS = –2.4 V, VDS = 0
I GS(op)1
—
0.53
—
mA
VGS = 8 V, VDS = 0
I GS(op)2
—
0.2
—
mA
VGS = 3.5 V, VDS = 0
Zero gate voltege drain current
I DSS1
—
—
10
µA
VDS = 60 V, VGS = 0
Zero gate voltege drain current
I DSS2
—
—
10
mA
VDS = 48 V, VGS = 0
Ta = 125°C
Gate to source cutoff voltage
VGS(off)
1.4
—
2. 5
V
I D = 1 mA, VDS = 10V
Static drain to source on state
resistance
RDS(on)
—
130
200
mΩ
I D = 1 A, VGS = 5 V Note5
Static drain to source on state
resistance
RDS(on)
—
110
160
mΩ
I D = 1 A, VGS = 10 V Note5
Forward transfer admittance
|yfs|
0.5
2.5
—
S
I D = 1 A, VDS = 10 V Note5
Output capacitance
Coss
—
139
—
pF
VDS = 10V , VGS = 0
f = 1 MHz
Turn-on delay time
t d(on)
—
4.2
—
µs
I D = 1 A, VGS = 5 V
Rise time
tr
—
20
—
µs
RL = 30 Ω
Turn-off delay time
t d(off)
—
1
—
µs
Fall time
tf
—
1
—
µs
Body–drain diode forward
voltage
VDF
—
0.82
—
V
I F = 2A, VGS = 0
Body–drain diode reverse
recovery time
t rr
—
55
—
ns
I F = 2A, VGS = 0
diF/ dt = 50 A/µs
Over load shut down
operation timeNote6
t os1
—
15
—
ms
VGS = 5 V, VDD = 16 V
Input current (shut down)
Note:
5. Pulse test
6. Including the junction temperature rise of the over loaded condition
3
HAF2015RJ
Main Characteristics
Power vs. Temperature Derating
50
2.0
1.0
Drain Current I D (A)
3.0
20
Test Congition:
When using the glass epoxy board
(FR4 40 × 40 × 1.6mm), PW < 10 s
2D
riv
eO
pe
1D
rat
i
riv
eO
on
pe
rat
i
on
10
0
10
µs
5
1
2
PW
1
s
=
10
m
s
0.5
0.2
m
Operation in this area
is limited by R DS(on)
DC
PW Op
0.1 Ta = 25°C
< era
10 tio
1 shot Pulse
n
s
0.05
1 Drive Operation
0.03
0.5 1 2
5 10 20
50 100
Drain to Source Voltage VDS (V)
7
50
Thermal shut down
Operation area
te
0
Maximum Safe Operation Area
No
Channel Dissipation
Pch (W)
4.0
100
Case Temperature
150
200
Tc (°C)
Note7:
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
Drain Current I D (A)
4
3
10 V
8V
6V
5V
2.5
Pulse Test
V DS = 10 V
Pulse Test
2
2
VGS = 3.5 V
1
Tc = -25°C
25°C
1.5
4V
0
4
Typical Transfer Characteristics
Typical Output Characteristics
Drain Current I D (A)
5
75°C
1
0.5
2
4
6
8
Drain to Source Voltage VDS (V)
10
0
1
2
3
4
5
Gate to Source Voltage VGS (V)
0.25
Pulse Test
0.2
0.15
I D= 1 A
0.1
0.5 A
0.05
0.2 A
0
2
4
6
R DS(on) (mΩ)
Drain to Source On State Resistance
Gate to Source Voltage
8
0.15
200
V GS = 5 V
100
ID=1A
0.1
V GS = 10 V
50
20
Pulse Test
10
0.1 0.2
0.5 1
2
5
Drain Current I D (A)
10
0.5 A, 0.2 A
10
5
2
V GS = 10 V
10
20
Forward Transfer Admittance vs.
Drain Current
V DS = 10 V
Pulse Test
Tc = -25°C
1
75°C
0.5
0.05
0
-40
500
VGS (V)
Static Drain to Source on State Resistance
vs. Temperature
0.25
Pulse Test
0.5 A, 0.2 A
ID=1A
0.2
V GS = 5 V
Static Drain to Source Sate Resistance
vs. Drain Current
Forward Transfer Admittance
|yfs| (S)
Drain to Source Saturation Voltage
V DS(on) (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Drain to Source On State Resistance
R DS(on) (mΩ)
HAF2015RJ
25°C
0.2
0
40
80
120
Case Temperature Tc (°C)
160
0.1
0.05 0.1
0.2
0.5
1
2
Drain Current I D (A)
5
5
HAF2015RJ
Body to Drain Diode Reverse
Recovery Time
Switching Time t (µs)
Reverse Recovery Time trr (ns)
V GS = 5 V, V DD •=• 30 V
50 PW = 300 µs, duty ≤ 1 %
200
100
50
20
Switching Characteristics
100
500
di / dt = 50 A / µs
V GS = 0, Ta = 25°C
20
tr
10
t d (on)
5
2
tf
1
10
0.01 0.02 0.05 0.1 0.2
0.5
1
Reverse Drain Current
I DR
2
5
0.01 0.02 0.05 0.1 0.2
Drain Current
(A)
1
2
5
I D (A)
1000
5
Pulse Test
VGS = 5 V
Capacitance Coss (pF)
Reverse Drain Current I DR (A)
0.5
Typical Capacitance vs.
Drain to Source Voltage
Reverse Drain Current vs.
Souece to Drain Voltage
4
3
0V
2
100
1
0
VGS = 0
f = 1 MHz
10
0.4
0.8
1.2
Source to Drain Voltage
6
t d (off)
0.5
1.6
V SD(V)
2.0
0
10
20
30
40
50
Drain to Source Voltage VDS (V)
HAF2015RJ
Gate to Source Voltage vs.
Shutdown Time of Load-Short Test
Shutdown Case Temperature vs.
Gate to Source Voltage
200
V DD= 16 V
Gate to Source Voltage
8
6
4
2
0
0.0001
0.001
0.01
0.1
1
Shutdown Case Temperature Tc (°C)
10
V
GS
(V)
12
180
160
140
120
100
0
Shutdown Time of Load-Short Test
Pw (S)
I D = 0.2 A
2
4
6
Gate to Source Voltage
Switching Time Test Circuit
10
V GS (V)
Waveform
Vout
Monitor
Vin Monitor
8
90%
D.U.T.
RL
Vin
Vin
5V
50W
V DD
= 30 V
Vout
10%
10%
90%
td(on)
tr
10%
90%
td(off)
tf
7
HAF2015RJ
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
Normalized Transient Thermal Impedance γs (t)
10
1
D=1
0.5
0.2
0.1
0.1
0.05
θ ch-f(t) = γ s (t) • θch - f
θ ch-f = 125°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6mm)
0.02
0.01
0.01
e
uls
p
ot
PDM
h
0.001
1s
D=
PW
T
PW
T
0.0001
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
Normalized Transient Thermal Impedance γs (t)
10
1
D=1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
e
uls
0.001
0.0001
10 µ
θ ch-f(t) = γ s (t) • θch - f
θ ch-f = 166 °C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6mm)
PDM
p
ot
D=
h
1s
PW
T
100 µ
1m
10 m
100 m
1
10
Pulse Width PW (S)
8
PW
T
100
1000
10000
HAF2015RJ
Package Dimensions
As of January, 2001
Unit: mm
3.95
4.90
5.3 Max
5
8
*0.22 ± 0.03
0.20 ± 0.03
4
1.75 Max
1
0.75 Max
+ 0.10
6.10 – 0.30
1.08
0.14 – 0.04
*0.42 ± 0.08
0.40 ± 0.06
+ 0.11
0° – 8°
1.27
+ 0.67
0.60 – 0.20
0.15
0.25 M
*Dimension including the plating thickness
Base material dimension
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
FP-8DA
Conforms
—
0.085 g
9
HAF2015RJ
Cautions
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trademark, or other intellectual property rights for information contained in this document. Hitachi bears no
responsibility for problems that may arise with third party’s rights, including intellectual property rights, in
connection with use of the information contained in this document.
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received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact
Hitachi’s sales office before using the product in an application that demands especially high quality and
reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury,
such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment
or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for
maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and
other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed
ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in
semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating
Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the
Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.
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Copyright  Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
Colophon 2.0
10