IRF614 2.0A, 250V, 2.0 Ohm, N-Channel Power MOSFET January 1998 Features Description • 2.0A, 250V • Linear Transfer Characteristics This is an N-Channel enhancement mode silicon gate power field effect transistor. It is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. This power MOSFET is designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. • High Input Impedance Formerly developmental type TA17443. • rDS(ON) = 2.0Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Ordering Information PART NUMBER IRF614 D PACKAGE TO-220AB BRAND IRF614 G NOTE: When ordering, use the entire part number. S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 1 File Number 3273.1 IRF614 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRF614 UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 250 V Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . VDGR 250 V Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2.0 1.3 A A Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 8.0 A Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 20 W 0.16 W/oC Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . EAS 61 mJ Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . .TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . Tpkg 300 260 oC oC Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA, (Figure 10) 250 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V VDS = Rated BVDSS, VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V TJ = 125oC - - 250 µA 2.0 - - A VGS = ±20V - - ±100 nA VGS = 10V, ID = 2.5A, (Figures 8, 9) - 1.6 2.0 A 0.8 1.2 - S - 8.9 13 ns - 12 18 ns - 18 27 ns - 8.9 15 ns - 9.6 14.4 nC - 2.4 3.6 nC - 4.5 6.7 nC - 180 - pF Zero Gate Voltage Drain Current IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) rDS(ON) gfs td(ON) tr td(OFF) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V, (Figure 7) VDS > ID(ON) x rDS(ON)MAX, ID = 2.5A, (Figure 12) VDD = 0.5 x Raterd BVDSS, ID ≈ 2.0A, RL = 61Ω VGS = 10V, (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature tf Qg(TOT) VGS = 10V, ID = 2.0A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS - 53 - pF Reverse Transfer Capacitance CRSS - 14 - pF VDS = 25V, VGS = 0V, f = 1MHz, (Figure 11) 2 IRF614 Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS Internal Drain Inductance LD Measured From the Drain Lead, 6mm (0.25in) From Package to Center of Die Internal Source Inductance LS Measured From the Source Lead, 6mm (0.25in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances MIN TYP MAX UNITS - 4.5 - nH - 7.5 - nH - - 6.4 oC/W - - 62.5 oC/W MIN TYP MAX UNITS - - 2.0 A - - 8.0 A - - 2.0 V 67 - 340 ns 0.24 0.54 1.2 µC D LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA Free Air Operation Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR TJ = 25oC, ISD = 2.0A, VGS = 0V, (Figure 13) TJ = 25oC, ISD = 2.0A, dISD/dt = 100A/µs TJ = 25oC, ISD = 2.0A, dISD/dt = 100A/µs NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 10V, starting TJ = 25oC, L = 6.18mH, RG = 50Ω, peak IAS = 5A. See Figures 15, 16. Typical Performance Curves Unless Otherwise Specified 2.0 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0 1.6 1.2 0.8 0.4 0 0 50 100 150 25 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 50 75 100 125 TC, CASE TEMPERATURE (oC) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 3 150 IRF614 Typical Performance Curves Unless Otherwise Specified (Continued) ZθJC, TRANSIENT THERMAL IMPEDENCE (oC/W) 10 0.5 0.2 0.1 0.05 0.02 0.01 1 0.1 PDM t1 t2 SINGLE PULSE 10-2 10-5 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 10-3 10-4 10-2 10-1 1 10 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 3.0 1µs VGS = 10V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (AMPERES) 10 100µs 1 1ms OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 0.1 10-2 10ms DC TC = 25oC TJ = MAX RATED SINGLE PULSE 1 2.4 VGS = 6.5V 1.8 VGS = 6V 1.2 VGS = 5.5V 0.6 VGS = 5V VGS = 4V 102 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 103 0 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 3.0 80µs PULSE TEST VDS = 2 x VGS 2.4 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 10 VGS = 10V VGS = 6.5V VGS = 6V 1.2 VGS = 5.5V 0.6 20 40 60 80 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. OUTPUT CHARACTERISTICS 80µs PULSE TEST 1.8 80µs PULSE TEST 1 0.1 VGS = 5V VGS = 4V 0 0 4 2 3 1 VDS, DRAIN TO SOURCE VOLTAGE (V) 10-2 5 FIGURE 6. SATURATION CHARACTERISTICS 0 2 4 6 8 VG, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS 4 10 IRF614 Typical Performance Curves Unless Otherwise Specified (Continued) 3.0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON), DRAIN TO SOURCE ON RESISTANCE (Ω) 10 8 6 VGS = 10V 4 VGS = 20V 2 0 2 6 4 ID, DRAIN CURRENT (A) 8 1.8 1.2 0.6 10 40 80 120 160 500 ID = 250mA 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD C, CAPACITANCE (pF) 400 1.05 0.95 0.85 300 CISS 200 COSS 100 CRSS 0.75 -40 0 80 40 120 0 160 1 TJ , JUNCTION TEMPERATURE (oC) 10 VDS = 2 x VGS MAX, PULSE TEST = 80µs 1.6 TJ = 25oC 1.2 TJ = 150oC 0.8 0.4 0 0 0.8 1.6 2.4 100 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE IDR, SOURCE TO DRAIN CURRENT (A) 2.0 10 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE gfs, TRANSCONDUCTANCE (S) 0 FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 1.25 -40 TJ , JUNCTION TEMPERATURE (oC) NOTE: Heating effect of 2.0µs pulse is minimal. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 2.4 0.2 0 VGS = 10V, ID = 2.5A 3.2 1 10-2 4.0 ID , DRAIN CURRENT (A) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT TJ = 150oC 0.1 0 TJ = 25oC 0.4 0.8 1.2 1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 5 2.0 IRF614 Typical Performance Curves Unless Otherwise Specified (Continued) 20 ID = 5A VDS = 50V VDS = 125V VDS =20 200V VGS, GATE TO SOURCE (V) 16 12 8 4 0 0 3 6 9 12 16 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 10% 50% 50% PULSE WIDTH FIGURE 18. RESISTIVE SWITCHING WAVEFORMS 6 IRF614 Test Circuits and Waveforms (Continued) VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 0.2µF VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G IG(REF) 0 S 0 IG CURRENT SAMPLING RESISTOR IG(REF) VDS ID CURRENT SAMPLING RESISTOR 0 FIGURE 20. GATE CHARGE WAVEFORMS FIGURE 19. GATE CHARGE TEST CIRCUIT All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. 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