FDG6317NZ Dual 20v N-Channel PowerTrench® MOSFET

FDG6317NZ
Dual 20v N-Channel PowerTrench MOSFET
General Description
Features
This dual N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized use
in small switching regulators, providing an extremely
low RDS(ON) and gate charge (QG) in a small package.
• 0.7 A, 20 V.
RDS(ON) = 400 mΩ @ VGS = 4.5 V
RDS(ON) = 550 mΩ @ VGS = 2.5 V
• Gate-Source Zener for ESD ruggedness
(1.6kV Human Body Model). (Note 3)
• Low gate charge
Applications
• High performance trench technology for extremely
low RDS(ON)
• DC/DC converter
• Power management
• Compact industry standard SC70-6 surface mount
package
• Load switch
• RoHS Compliant
S
G
D
D
G
Pin 1
S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Absolute Maximum Ratings
Symbol
TA=25oC unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
20
V
VGSS
Gate-Source Voltage
± 12
V
ID
Drain Current
0.7
A
– Continuous
(Note 1)
– Pulsed
2.1
PD
Power Dissipation for Single Operation
TJ, TSTG
Operating and Storage Junction Temperature Range
(Note 1)
0.3
W
–55 to +150
°C
415
°C/W
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
RθJA
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.67
FDG6317NZ
7’’
8mm
3000 units
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
1
www.fairchildsemi.com
FDG6317NZ Dual 20v N-Channel PowerTrench® MOSFET
May 2009
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown
VGS = 0 V,
ID = 250 µA
Voltage
Breakdown Voltage Temperature ID = 250 µA, Referenced to 25°C
Coefficient
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V
1
µA
IGSS
Gate–Body Leakage
VGS = ± 12 V, VDS = 0 V
± 10
µA
IGSS
Gate–Body Leakage
VGS = ± 4.5 V, VDS = 0 V
±1
µA
1.5
V
On Characteristics
20
V
13
mV/°C
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS,
0.6
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = –250 µA, Referenced to 25°C
–2
ID(on)
On–State Drain Current
VGS = 4.5 V,
VGS = 2.5 V,
VGS = 4.5 V,
VGS = 4.5 V,
ID = 0.7 A
ID = 0.6 A
ID = 0.7 A, TJ=125°C
VDS = 5 V
300
450
390
gFS
Forward Transconductance
VDS = 5 V,
ID = 0.7 A
1.8
VDS = 10 V,
f = 1.0 MHz
V GS = 0 V,
66.5
pF
19
pF
ID = 250 µA
1.2
1
mV/°C
400
550
560
mΩ
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
Switching Characteristics
10
pF
VGS = 15 mV, f = 1.0 MHz
5.8
Ω
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6 Ω
5.5
(Note 2)
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
2.5
5
ns
Qg
Total Gate Charge
0.76
1.1
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDS = 10 V,
VGS = 4.5 V
ID = 0.7 A,
11
ns
7
15
ns
7.5
15
ns
0.18
nC
0.20
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
trr
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Qrr
Diode Reverse Recovery Charge
VGS = 0 V,
IS = 0.25 A
IF = 0.7 A,
diF/dt = 100 A/µs
(Note 2)
0.8
0.25
A
1.2
V
8.3
nS
1.2
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. RθJA = 415°C/W when mounted on a minimum pad .
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
2
www.fairchildsemi.com
FDG6317NZ Dual 20v N-Channel PowerTrench® MOSFET
Electrical Characteristics
2
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
2.5V
2.0V
4.5V
1.5
1.7
3.0V
VGS = 10V
1
2.0V
0.5
VGS = 2.5V
1.5
3.0V
1.3
3.5V
4.0V
1.1
4.5V
6.0V
0
0.5
1
1.5
2
0
2.5
0.5
Figure 1. On-Region Characteristics.
1.5
2
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1
1.5
ID = 0.7A
VGS =10V
1.4
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
1.3
1.2
1.1
1
0.9
0.8
0.7
-50
-25
0
25
50
75
100
125
ID = 0.35A
0.8
0.6
TA = 125oC
0.4
TA = 25oC
0.2
150
0
o
2
4
TJ, JUNCTION TEMPERATURE ( C)
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
o
-55oC
TA = 125 C
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
2
ID, DRAIN CURRENT (A)
10V
0.9
0
1.5
25oC
1
0.5
VGS = 0V
1
TA = 125oC
0.1
o
25 C
0.01
-55oC
0.001
0.0001
0
0
1
2
3
0
4
0.4
0.6
0.8
1
1.2
1.4
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
0.2
Figure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature.
3
www.fairchildsemi.com
FDG6317NZ Dual 20v N-Channel PowerTrench® MOSFET
Typical Characteristics
100
ID = 0.7A
15V
VDS = 5V
f = 1MHz
VGS = 0 V
4
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
5
10V
3
2
1
75
Ciss
50
Coss
25
Crss
0
0
0.2
0.4
0.6
0.8
0
1
0
5
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
10
RDS(ON) LIMIT
1
1s
1ms
10ms
100m
100µs
DC
0.1
VGS = 10V
SINGLE PULSE
RθJA = 415oC/W
0.01
o
TA = 25 C
0.001
0.1
1
20
10
SINGLE PULSE
RθJA = 415°C/W
TA = 25°C
8
6
4
2
0
0.0001
100
0.001
0.01
0.1
VDS, DRAIN-SOURCE VOLTAGE (V)
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
15
Figure 8. Capacitance Characteristics.
P(pk), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
10
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t)*RθJA
RθJA = 415°C/W
0.2
0.1
0.1
P(pk)
0.05
0.02
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.01
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1.
Transient thermal response will change depending on the circuit board design.
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
4
www.fairchildsemi.com
FDG6317NZ Dual 20v N-Channel PowerTrench® MOSFET
Typical Characteristics
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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As used herein:
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and (c) whose failure to perform when properly used in accordance with
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expected to result in a significant injury of the user.
2.
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system whose failure to perform can be reasonably expected to cause
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I40
©2009 Fairchild Semiconductor Corporation
FDG6317NZ Rev.B1 (W)
5
www.fairchildsemi.com
FDG6317NZ Dual 20v N-Channel PowerTrench® MOSFET
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intended to be an exhaustive list of all such trademarks.
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