SSM6L12TU TOSHIBA Field Effect Transistor Silicon P/N Channel MOS Type SSM6L12TU High-Speed Switching Applications • Low ON-resistance Q1: RDS(ON) = 180mΩ (max) (@VGS = 2.5 V) Q2: RDS(ON) = 430mΩ (max) (@VGS = -2.5 V) Unit: mm 2.1±0.1 Q1 Absolute Maximum Ratings (Ta = 25°C) Unit Drain-source voltage VDS 30 V Gate-source voltage VGSS ± 12 V DC ID 0.5 Pulse IDP 1.5 A Q2 Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage VDS -20 V Gate-source voltage VGSS ± 12 V DC ID -0.5 Pulse IDP -1.5 Drain current A Absolute Maximum Ratings (Q1,Q2 Common) (Ta = 25°C) Characteristics Power dissipation Symbol Rating Unit PD 500 mW (Note 1) Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C Note: 1 6 2 5 3 4 0.7±0.05 Drain current 0.65 0.65 Rating 2.0±0.1 Symbol 1.3±0.1 Characteristics 1.7±0.1 1.Source1 2.Gate1 3.Drain2 +0.1 0.3-0.05 Optimum for high-density mounting in small packages +0.06 0.16-0.05 • 4.Source2 5.Gate2 6.Drain1 UF6 JEDEC ― JEITA ― TOSHIBA 2-2T1B Weight: 7.0 mg (typ.) Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on FR4 board. (total dissipation) 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm ) Marking 6 Equivalent Circuit (top view) 5 4 6 2 4 Q1 K9 1 5 Q2 3 1 2 1 3 2010-02-15 SSM6L12TU Q1 Electrical Characteristics (Ta = 25°C) Characteristics Symbol Gate leakage current Min Typ. Max Unit VGS = ±12 V, VDS = 0 ⎯ ⎯ ±1 μA V (BR) DSS ID = 1 mA, VGS = 0 30 ⎯ ⎯ V (BR) DSX ID = 1 mA, VGS = −12 V 18 ⎯ ⎯ IGSS Drain-source breakdown voltage Test Condition V VDS = 30 V, VGS = 0 ⎯ ⎯ 1 μA Vth VDS = 3 V, ID = 0.1 mA 0.5 ⎯ 1.1 V Forward transfer admittance ⏐Yfs⏐ VDS = 3 V, ID = 0.25 A (Note 2) 1.0 2.0 ⎯ S Drain-source on-resistance RDS (ON) ID = 0.50 A, VGS = 4.5 V (Note 2) ⎯ 120 145 ID = 0.25 A, VGS = 2.5 V (Note 2) ⎯ 140 180 Drain cut-off current IDSS Gate threshold voltage mΩ Input capacitance Ciss VDS = 10 V, VGS = 0, f = 1 MHz ⎯ 245 ⎯ pF Reverse transfer capacitance Crss VDS = 10 V, VGS = 0, f = 1 MHz ⎯ 33 ⎯ pF Output capacitance Coss VDS = 10 V, VGS = 0, f = 1 MHz ⎯ 41 ⎯ pF Switching time Note 2: Turn-on time ton VDD = 10 V, ID = 0.25 A, ⎯ 9 ⎯ Turn-off time toff VGS = 0 to 2.5 V, RG = 4.7 Ω ⎯ 15 ⎯ ns Pulse test Switching Time Test Circuit (a) Test Circuit (b) VIN 2.5 V OUT 2.5 V 90% IN 0V RG 0 10 μs VDD (c) VOUT VDD = 10 V RG = 4.7 Ω Duty ≤ 1% VIN: tr, tf < 5 ns Common Source Ta = 25°C 10% VDD VDS (ON) 90% 10% tr ton tf toff Precaution Vth can be expressed as the voltage between gate and source when the low operating current value is ID=100 μA for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on)) Please take this into consideration when using the device. 2 2010-02-15 SSM6L12TU Q2 Electrical Characteristics (Ta = 25°C) Characteristics Symbol Min Typ. Max Unit VGS = ± 12V, VDS = 0 ⎯ ⎯ ±1 μA V (BR) DSS ID = -1 mA, VGS = 0 -20 ⎯ ⎯ V (BR) DSX ID = -1 mA, VGS = +12 V -8 ⎯ ⎯ Gate leakage current IGSS Drain-source breakdown voltage Drain cut-off current IDSS Test Condition VDS = -20 V, VGS = 0 ⎯ ⎯ -1 μA -0.5 ⎯ -1.1 V (Note 3) 0.65 1.3 ⎯ S ID = -0.25 A, VGS = -4 V (Note 3) ⎯ 210 260 ID = -0.25 A, VGS = -2.5 V (Note 3) ⎯ 310 430 Vth VDS = -3 V, ID = -0.1 mA Forward transfer admittance ⏐Yfs⏐ VDS = -3 V, ID = -0.25 A Drain-source on-resistance RDS (ON) Gate threshold voltage V mΩ Input capacitance Ciss VDS = -10 V, VGS = 0, f = 1 MHz ⎯ 218 ⎯ pF Reverse transfer capacitance Crss VDS = -10 V, VGS = 0, f = 1 MHz ⎯ 42 ⎯ pF Output capacitance Coss VDS = -10 V, VGS = 0, f = 1 MHz ⎯ 52 ⎯ pF Switching time Note3: Turn-on time ton VDD = -10 V, ID = -0.25 A, ⎯ 16 ⎯ Turn-off time toff VGS = 0 to -2.5 V, RG = 4.7 Ω ⎯ 15 ⎯ ns Pulse test Switching Time Test Circuit (a) Test circuit 0 OUT (b) VIN 0V 90% IN RG −2.5V 10 μs VDD 10% −2.5 V RL (c) VOUT VDD = -10 V RG = 4.7 Ω Duty ≤ 1% VIN: tr, tf < 5 ns Common Source Ta = 25°C VDS (ON) 90% 10% VDD tr ton tf toff Precaution Vth can be expressed as the voltage between gate and source when the low operating current value is ID=-100 μA for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on)) Please take this into consideration when using the device. Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. Thermal resistance Rth (ch-a) and power dissipation PD vary depending on board material, board area, board thickness and pad area. When using this device, please take heat dissipation into consideration 3 2010-02-15 SSM6L12TU Q1(Nch MOS FET) 1.8 10000 1.8 1.6 1.6 1000 1000 1000 Drain current ID (mA) 2.0 2.0 3.0 3.0 4.0 4.0 5.0 1200 1200 VGS=1.4V VGS=1.4V 5.0 800 800 600 600 400 400 Common Source Common Ta=25℃ Common Source Source Ta=25°C Pulse test Ta=25°C 200 200 0 0 100 Ta=100°C 10 25°C 1 -25°C 0.1 0.2 0.4 0.6 0.8 0.2 0.4 0.6 0.8 Drain-Source Drain-Sourcevoltage voltage VDS VDS(V) (V) VDS=3V Common Source VDS=3V Pulse test 11 0 RDS(ON) - ID 200 160 Pulse test 2.5V 140 120 VGS=4.5V 100 80 60 40 RDS(ON) - VGS 350 CommonSource Source Common ID=500mA ID=500mA 300 Pulse test 250 200 25°C 150 100 Ta=100°C -25°C 0 0 0 200 0 400 600 800 1000 1200 1400 1600 Drain current ID (mA) RDS(ON) - Ta 400 1 CommonSource Source Common Pulse test Gate threshold voltage Vth(V) Drain-Source on resistance RDS(ON) (mΩ) 3 50 20 300 250 2.5V,250mA 200 150 100 1 2 Gate-Source voltage VGS (V) 400 Common Source Common Source Ta=25℃ Ta=25°C 180 350 Common Source 0.01 0 0 Drain-Source on resistance RDS(ON) (mΩ) Drain current current ID (mA) Drain 1400 1400 Drain-Source on resistance RDS(ON) (mΩ) ID - VGS ID ID -- VDS VDS 1600 1600 VGS=4.5V,ID=500mA 0.8 1 2 3 4 5 6 7 8 Gate-Source voltage VGS (V) 9 10 Vth - Ta Common Source ID=0.1mA VDS=3V 0.6 0.4 0.2 50 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 Ambient temperature Ta (°C) 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 Ambient temperature Ta (°C) 4 2010-02-15 SSM6L12TU Q1(Nch MOS FET) |Yfs| - ID 25°C -25°C 1 IDR - VDS 1600 Drain reverse current IDR (mA) Forward transfer admittance |Yfs| (S) 10 Ta=100°C Common Source Common Source VDS=3V VDS=3V Pulse test Ta=25°C Common Source Common Source VGS = 0 V VGS=0V Pulse test Ta=25°C 1400 D 1200 D 1000 G IDR G 800 S S 600 400 200 0 0 10 100 1000 10000 0 Drain current ID (mA) C - VDS 1000 -0.2 -0.4 -0.6 -0.8 Drain-Source voltage VDS (V) Switching time t (ns) Ciss 100 -1 t - ID 1000 Common Source VGS=0V f=1MHz Ta=25°C Capacitance C (pF) IDR Common Source Source Common VDD=10V VGS=0~to 2.5V 2.5V Ta=25℃ Ta=25°C 100 toff tf 10 ton Coss Crss tr 10 1 0.1 1 10 Drain-Source voltage VDS (V) 10 100 5 100 1000 Drain current ID (mA) 10000 2010-02-15 SSM6L12TU Q2(Pch MOS FET) ID ID --VDS VDS ID - VGS -10000 -1600 -1600 -5.0 -5.0 -3.0 -3.0 - 1000 -1200 -1200 Drain current ID (mA) Drain Drain current current ID ID (mA) (mA) -1400 -1400 -2.0 -2.0 -1000 -1000 -4.0 -4.0 -800 -800 -1.8 -1.8 -600 -600 -400 -400 VGS=-1.6 VGS=-1.6 -200 -200 Common Source Common Source Common Source Ta=25°C Ta=25°C 00 -0.2 -0.2 -0.4 -0.4 -0.6 -0.6 -0.8 - 10 Ta=100°C -1 25° -25°C - 0.1 Ta=25℃, Pulse test 00 -100 - 0.01 -1 0 Common Source Common Source VDS=-3V VDS=-3V Pulse test -1 -2 Gate-Source voltage VGS (V) Drain-Source Drain-Sourcevoltage voltage VDS VDS(V) (V) -3 - 500 Common CommonSource Source ID=-250mA ID=-250mA 400 Drain-Source on resistance RDS(ON) (mΩ) Drain-Source on resistance RDS(ON) (mΩ) RDS(ON) - VGS RDS(ON) - ID 500 -2.5V 300 200 VGS=-4V Common Source 100 Ta=25℃ Common Source Pulse test Ta=25°C 0 0 -200 -400 -600 -800 400 Pulse test 300 200 Ta=100°C 25°C -25°C 100 0 0 -1000 -1200 -1400 -1600 -1 -2 Drain current ID (mA) RDS(ON) - Ta 400 Common CommonSource Source ID=-250mA ID=-250mA Pulse test -2.5V 300 VGS=-4V 200 100 -0.8 -0.6 -0.4 -0.2 Common Source ID=-0.1mA VDS=-3V 0 -60 -40 -20 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 Ambient temperature Ta (°C) -10 Vth - Ta -1 Gate threshold voltage Vth(V) Drain-Source on resistance RDS(ON) (mΩ) 500 -3 -4 -5 -6 -7 -8 -9 Gate-Source voltage VGS (V) 0 20 40 60 80 100 120 140 160 Ambient temperature Ta (°C) 6 2010-02-15 SSM6L12TU Q2(Pch MOS FET) |Yfs| - ID IDR - VDS 1600 Drain reverse current IDR (mA) Forward transfer admittance |Yfs| (S) 10 25°C -25°C 1 Ta=100°C Common Source 0 -10 VDS=-3V Common Source VDS=-3V Ta=25℃ Ta=25°C Pulse test Common Source Common Source VGS = 0 V VGS=0V Pulse test Ta=25°C D 1400 1200 IDR G 1000 800 S 600 400 200 0 -100 -1000 -10000 0.0 0.2 Drain current ID (mA) C - VDS Ciss 100 Common Source VGS=0V f=1MHz Ta=25°C Coss Crss -1 -10 Drain-Source voltage VDS (V) toff CommonSource Source Common VDD=-10V VDD=-10V VGS=0 to2.5V -2.5V VGS=0~Ta=25℃ Ta=25°C 100 tf 10 ton tr 10 -0 1.0 t - ID 1000 Switching time t (ns) Capacitance C (pF) 1000 0.4 0.6 0.8 Drain-Source voltage VDS (V) 1 -10 -100 7 -100 -1000 Drain current ID (mA) -10000 2010-02-15 SSM6L12TU PD* - Ta 1000 Drain power dissipation PD* (mW) Mounted FR4 board mounted FR4 board t=10s 800 (25.4mm*25.4mm*1.6t (25.4 mm × 25.4mm × 1.6 mm) 2 ) Cu Pad :645mm Cu Pad :645mm 2 600 DC 400 200 0 0 20 *:Total Rating 40 60 80 100 120 140 Ambient temperature Ta( ℃) 160 Transient thermal impedance rth (°C/W ) rth – tw 1000 Single pulse Mounted on FR4 board 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm ) 100 10 1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1000 (s) 8 2010-02-15 SSM6L12TU RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS’ PRODUCT DESIGN OR APPLICATIONS. • Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document. 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Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. • Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2010-02-15