FDMS7700S Dual N-Channel PowerTrench® MOSFET N-Channel: 30 V, 30 A, 7.5 mΩ N-Channel: 30 V, 40 A, 2.4 mΩ Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 12 A dual MLP package.The switch node has been internally Max rDS(on) = 12 mΩ at VGS = 4.5 V, ID = 10 A connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous Q2: N-Channel SyncFET (Q2) have been designed to provide optimal power Max rDS(on) = 2.4 mΩ at VGS = 10 V, ID = 20 A efficiency. Max rDS(on) = 2.9 mΩ at VGS = 4.5 V, ID = 18 A Applications RoHS Compliant Computing Communications General Purpose Point of Load Notebook VCORE S2 S2 S2 G2 S1/D2 D1 D1 D1 D1 Top G1 Bottom Q2 4 D1 S2 5 S2 6 3 D1 S2 7 2 D1 G2 8 1 G1 Q1 Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID Units V V (Note 3) ±20 ±20 TC = 25 °C 30 40 -Continuous (Silicon limited) TC = 25 °C 50 120 -Continuous TA = 25 °C 121a 221b 40 60 TA = 25 °C 2.21a 2.51b TA = 25 °C 1.01c 1.01d -Pulsed TJ, TSTG Q2 30 -Continuous (Package limited) Power Dissipation for Single Operation PD Q1 30 Operating and Storage Junction Temperature Range -55 to +150 A W °C Thermal Characteristics Thermal Resistance, Junction to Ambient 571a 501b RθJA Thermal Resistance, Junction to Ambient 1251c 1201d RθJC Thermal Resistance, Junction to Case 3.5 2 RθJA °C/W Package Marking and Ordering Information Device Marking FDMS7700S Device FDMS7700S ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C Package Power 56 1 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET December 2009 Symbol Parameter Test Conditions Type Min 30 30 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V ID = 1 mA, VGS = 0 V Q1 Q2 ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C ID = 1 mA, referenced to 25 °C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1 Q2 1 500 µA µA IGSS Gate to Source Leakage Current VGS = 20 V, VDS= 0 V Q1 Q2 100 100 nA nA 3 3 V V 15 14 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 µA VGS = VDS, ID = 1 mA Q1 Q2 ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C ID = 1 mA, referenced to 25 °C Q1 Q2 -6 -4 VGS = 10 V, ID = 12 A VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 12 A , TJ = 125 °C Q1 6.0 8.5 8.3 7.5 12 12 VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 18 A VGS = 10 V, ID = 20 A , TJ = 125 °C Q2 1.9 2.2 2.1 2.4 2.9 3.4 VDS = 5 V, ID = 12 A VDS = 5 V, ID = 20 A Q1 Q2 63 160 Q1: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 1315 7240 1750 9630 pF Q1 Q2 445 2690 600 3580 pF Q1 Q2 45 185 70 280 pF Q1 Q2 0.9 0.8 rDS(on) gFS Drain to Source On Resistance Forward Transconductance 1 1 1.8 1.5 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance Q2: VDS = 15 V, VGS = 0 V, f = 1 MHZ Ω Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qg Total Gate Charge Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C Q1: VDD = 15 V, ID = 12 A, RGEN = 6 Ω Q2: VDD = 15 V, ID = 20 A, RGEN = 6 Ω VGS = 0 V to 10 V Q1 VDD = 15 V, VGS = 0 V to 4.5 V ID = 12 A Q2 VDD = 15 V, ID = 20 A Q1 Q2 8.6 21 18 34 ns Q1 Q2 2.5 9.2 10 18 ns Q1 Q2 20 58 32 93 ns Q1 Q2 2.3 6.8 10 14 ns Q1 Q2 20 105 28 147 nC Q1 Q2 9.3 48 13 67 nC Q1 Q2 4.3 19 nC Q1 Q2 2.2 11 nC www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q2 0.8 0.7 1.2 1.2 V Q1 Q2 27 53 43 85 ns Q1 Q2 10 100 18 160 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 12 A VGS = 0 V, IS = 20 A (Note 2) (Note 2) Q1 IF = 12 A, di/dt = 100 A/µs Q2 IF = 20 A, di/dt = 300 A/µs Notes: 1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 57 °C/W when mounted on a 1 in2 pad of 2 oz copper c. 125 °C/W when mounted on a minimum pad of 2 oz copper b. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper d. 120 °C/W when mounted on a minimum pad of 2 oz copper 2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%. 3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied. ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 40 4 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) VGS = 10 V VGS = 6 V 30 VGS = 4.5 V VGS = 4 V 20 10 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX VGS = 3.5 V 0 0.0 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 3 VGS = 3.5 V VGS = 4 V 2 VGS = 4.5 V 1 VGS = 6 V 0 2.0 0 Figure 1. On Region Characteristics 30 40 40 ID = 12 A VGS = 10 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 -75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 10 20 ID, DRAIN CURRENT (A) Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 30 ID = 12 A 20 TJ = 125 oC 10 TJ = 25 oC 0 -50 2 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage 40 40 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) VGS = 10 V 30 VDS = 5 V TJ = 150 oC 20 TJ = 25 oC 10 TJ = -55 oC 0 1.5 2.0 2.5 3.0 3.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C 4.0 VGS = 0 V 10 1 TJ = 150 oC TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Source to Drain Diode Forward Voltage vs Source Current www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE (V) 10 2000 ID = 12 A 1000 Ciss 8 CAPACITANCE (pF) VDD = 10 V 6 VDD = 15 V 4 VDD = 20 V Coss 100 2 Crss f = 1 MHz VGS = 0 V 0 0 5 10 15 10 0.1 20 Figure 7. Gate Charge Characteristics 10 30 Figure 8. Capacitance vs Drain to Source Voltage 60 100 o RθJC = 3.5 C/W 100us ID, DRAIN CURRENT (A) VGS = 10 V ID, DRAIN CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 40 VGS = 4.5 V 20 Limited by Package 10 1 ms 1 0.1 10 ms THIS AREA IS LIMITED BY rDS(on) 100 ms SINGLE PULSE TJ = MAX RATED 1s 10s o RθJA = 125 C/W DC TA = 25 oC 0 25 50 75 100 125 0.01 0.01 150 o TC, CASE TEMPERATURE ( C) 0.1 1 10 100 200 VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Maximum Continuous Drain Current vs Case Temperature Figure 10. Forward Bias Safe Operating Area P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 125 C/W o TA = 25 C 100 10 1 0.5 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (s) Figure 11. Single Pulse Maximum Power Dissipation ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 SINGLE PULSE t2 o NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA RθJA = 125 C/W (Note 1c) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted 60 50 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX VGS = 10 V 40 VGS = 4.5 V VGS = 3.5 V 30 VGS = 3 V 20 10 VGS = 2.5 V 0 0 0.2 0.4 0.6 0.8 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 5 VGS = 2.5 V 4 3 VGS = 3 V 2 1 1.0 0 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 20 30 40 50 60 Figure 14. Normalized on-Resistance vs Drain Current and Gate Voltage 1.6 10 ID = 20 A VGS = 10 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.6 -75 -50 -25 0 25 50 75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V ID, DRAIN CURRENT (A) Figure 13. On-Region Characteristics PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 8 ID = 20 A 6 4 TJ = 125 oC 2 TJ = 25 oC 0 100 125 150 2 TJ, JUNCTION TEMPERATURE (oC) 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 16. On-Resistance vs Gate to Source Voltage Figure 15. Normalized On-Resistance vs Junction Temperature 60 VDS = 5 V 40 TJ = 125 oC 30 TJ = 25 oC 20 10 TJ = -55 oC 0 1.0 IS, REVERSE DRAIN CURRENT (A) 60 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 50 ID, DRAIN CURRENT (A) VGS = 4.5 V VGS = 3.5 V 0 VGS = 0 V 10 TJ = 125 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 1.5 2.0 2.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 17. Transfer Characteristics ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C 3.0 0 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 18. Source to Drain Diode Forward Voltage vs Source Current www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 SyncFET) 30000 ID = 20 A Ciss 10000 8 VDD = 10 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 15 V 4 VDD = 20 V Coss 1000 2 100 0.1 0 0 40 80 120 1 30 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 20. Capacitance vs Drain to Source Voltage Figure 19. Gate Charge Characteristics 150 100 o RθJC = 2 C/W ID, DRAIN CURRENT (A) VGS = 10 V ID, DRAIN CURRENT (A) Crss f = 1 MHz VGS = 0 V 100 VGS = 4.5 V 50 50 1 ms 10 ms 1 0.1 THIS AREA IS LIMITED BY rDS(on) 100 ms 1s SINGLE PULSE TJ = MAX RATED 10 s RθJA = 120 oC/W DC o Limited by Package 0 25 10 TA = 25 C 75 100 125 0.01 0.01 150 o TC, CASE TEMPERATURE ( C) 0.1 1 10 100 VDS, DRAIN to SOURCE VOLTAGE (V) Figure 21. Maximum Continuous Drain Current vs Case Temperature Figure 22. Forward Bias Safe Operating Area P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 120 C/W o TA = 25 C 100 10 1 0.5 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (s) Figure 23. Single Pulse Maximum Power Dissipation ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 SyncFET) 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 120 C/W 0.001 -3 10 (Note 1d) -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (s) Figure 24. Junction-to-Ambient Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 SyncFET) SyncFET Schottky body diode Characteristics Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 25 shows the reverse recovery characteristic of the FDMS7700S. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. -1 CURRENT (A) 9 6 didt = 300 A/µs 3 0 -3 -6 100 150 200 250 TIME (ns) Figure 25. FDMS7700S SyncFET body diode reverse recovery characteristic ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C 300 IDSS, REVERSE LEAKAGE CURRENT (A) 12 10 TJ = 125 oC -2 10 TJ = 100 oC -3 10 -4 10 TJ = 25 oC -5 10 0 5 10 15 20 25 30 VDS, REVERSE VOLTAGE (V) Figure 26. SyncFET body diode reverse leakage versus drain-source voltage www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (continued) FDMS7700S Dual N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I41 ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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