µ PD98433 8-Port 10/100/1000 Mbps EthernetTM Controller Features • 8-port 10/100/1000 Mbps Ethernet MAC compliant with IEEE Std 802.3 1998 Edition • Standard GMII, MII and TBI I/F connected with PHY devices • 6K-byte receive FIFO and 6K-byte transmit FIFO for Each Port • High performance data bus I/F - 128-bit x 125 MHz x 2-port (Rx / Tx independent uni-directional bus) • Full and half duplex for 10/100M operation, full duplex for 1G operation • CPU Bus I/F : 32-bit x 62.5 MHz • Flow control compliant with IEEE Std 802.3 1998 Edition • 8B/10B PCS function with auto negotiation for 1000 BASE-X • Address filtering & error packet discarding • Statistics counters per port (25 counters for Tx, 23 counters for Rx) • VLAN packet detection • JTAG support • 0.25 µm CMOS process • 2.5 V power supply, 3.3 V power supply for physical layer interface • 756-pin ABGA Block Diagram TBI GMII MII x8 PORT #7 PORT #6 PORT #5 ............ PORT #4 PORT #3 PORT #2 PORT #1 PORT #0 FIFO DATA Common Bus Interface Tx FIFO Rx FIFO 10/100/1000 Mbps MAC PCS FIFO DATA Bus Register Set / Statistics Counter CPU Bus CPU Bus Interface MII Serial Management MII Management Interface TEST Port JTAG The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. S14941EJ2V0PF00 (2nd edition) Date Published December 2001 NS CP(K) Printed in Japan 2000 Target Applications • SONET/SDH ADM • Ethernet Switch • Bridge • Router • Ethernet Multiplexer Sample Configuration of Switch/Router System Address Search Line Interface Module (LIM) Optical Module 10/100/1000M Multi-PHY 10/100/1000M Multi-MAC µPD98421 µ PD98433 Forwarding Engine Line Interface Module (LIM) Optical Module 10/100M Multi-PHY Control Module CPU Memory Switch Chip Address Search 10/100M Multi-MAC µPD98421 µ PD98431 Forwarding Engine Switch Chip Switching Module Ethernet is a trademark of XEROX Corporation USA. • The information in this document is current as of December, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. • NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. 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The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. 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(Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4 LIM