REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02 and case outline Y. Make changes to 1.2.1, Table I, figure 1, figure 2, and 6.3. - ro 06-01-18 R. MONNIN B Add footnote 1/ to section 1.2.2 and footnote 3/ to section 6.3. Update boilerplate paragraphs to current requirements. - PHN 11-12-21 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PMIC N/A PREPARED BY RICK OFFICER Original date of drawing YY-MM-DD CHECKED BY TOM HESS 03-04-08 TITLE MICROCIRCUIT, DIGITAL-LINEAR, TRIPLE PROCESSOR SUPERVISORY CIRCUIT, MONOLITHIC SILICON APPROVED BY RAYMOND MONNIN SIZE CODE IDENT. NO. A REV AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DWG NO. V62/03629 16236 B PAGE 1 OF 15 5962-V014-12 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance triple processor supervisory microcircuit, with an operating temperature range of -55°C to +125°C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03629 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 02 Circuit function TPS3307-18-EP TPS3307-33-EP Triple processor supervisory circuit Triple processor supervisory circuit 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins X Y 1/ 8 8 JEDEC PUB 95 Package style MS-012 MO-187 Plastic small outline Plastic small outline with thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other ________ 1/ The manufacture has changed lead frames NiPdAu to NiPdAuAg and location of assembly from their Hana facility to their Shanghai facility. Product with a Lot Trace Code of 1CxxxxH and earlier is a NiPdAu frame from the Hana facility. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 2 1.3 Absolute maximum ratings. 2/ Supply voltage (VDD) ........................................................................ 7 V 3/ All other pins ..................................................................................... -0.3 V to 7 V Maximum low output current (IOL) .................................................... 5 mA 3/ Maximum high output current (IOH) .................................................. -5 mA Input clamp current (IIK), (VI < 0 or VI > VDD) ................................... ±20 mA Output clamp current (IOK), (VO < 0 or VO > VDD) ........................... ±20 mA Storage temperature range (TSTG) .................................................. -65°C to +150°C 4/ Soldering temperature ...................................................................... +260°C Maximum junction temperature (TJ) ................................................. +150°C Package thermal impedance (θJA): Case X .......................................................................................... +126°C/W 5/ Case Y .......................................................................................... +58.4°C/W 5/ 1.4 Recommended operating conditions. 6/ Supply voltage range (VDD) ............................................................. 2 V to 6 V Input voltage (VI) at MR and SENSE 3 pins .................................... 0 V to VDD + 0.3 V Input voltage (VI) at SENSE 1 and SENSE 2 pins ............................ 0 V to (VDD + 0.3 V) VIT / 1.25 V High level input voltage (VIH) at MR ................................................ 0.7 x VDD minimum Low level input voltage (VIL) at MR ................................................. 0.3 x VDD maximum Input transition rise and fall rate (∆t / ∆V) at MR .............................. 50 ns / V maximum Operating free air temperature range (TA) ........................................ -55°C to +125°C 2/ 3/ 4/ 5/ 6/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “ recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for morethan t = 1000 h continuously. Long term, high temperature storage and / or extended use at maximum recommended operating conditions may result in a reduction of overall device life. The thermal impedance, θJA, for the case X package is determined for JEDEC high-K PCB (JESD51-7). The thermal impedance value for case Y package is determined for Texas Instruments recommended assembly for thermal pad packages. See manufacturer briefs SLMA002 and SLMA004 for more information about utilizing the thermally enhanced package. Thermal impedance, θJA, values for the cases X and Y packages using JEDEC low-K PCB (JESD51-3) are 215°C/W and 296°C/W, respectively. Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 3 2. APPLICABLE DOCUMENTS JEDEC PUB 95 – Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http://www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Truth table. The truth table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5 Timing waveforms. The timing waveforms shall be as shown in figure 5. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions Temperature, TA Device type Limits Min Unit Max Electrical characteristics section High level output voltage Low level output voltage VOH VOL Power-up reset voltage Negative going input threshold voltage Hysteresis at VSENSEn input -VIT Vhys VDD = 2 V to 6 V, IOH = -20 µA -55°C to +125°C 01,02 VDD = 3.3 V, IOH = -2 mA VDD – 0.4 V VDD = 6 V, IOH = -3 mA VDD – 0.4 V VDD = 2 V to 6 V, IOL = 20 µA -55°C to +125°C V VDD – 0.2 V 01,02 0.2 VDD = 3.3 V, IOL = 2 mA 0.4 VDD = 6 V, IOL = 3 mA 0.4 VDD ≥ 1.1 V, IOL = 20 µA 2/ -55°C to +125°C 01,02 SENSE3 pin, VDD = 2 V to 6 V 3/ -55°C to +125°C 01,02 V 0.4 V 1.2 1.29 V SENSE1, SENSE2 pins, VSENSE = 1.8 V, VDD = 2 V to 6 V 3/ 1.6 1.73 SENSE1, SENSE2 pins, VSENSE = 3.3 V, VDD = 2 V to 6 V 3/ 2.8 3.02 SENSE1, SENSE2 pins, VSENSE = 5 V, VDD = 2 V to 6 V 3/ 4.4 4.67 2 30 -VIT = 1.68 V 2 40 -VIT = 2.93 V 3 60 -VIT = 4.55 V 3 80 -55°C to +125°C -VIT = 1.25 V 01,02 mV See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 5 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions Temperature, TA Device type Limits Min Unit Max Electrical characteristics section – continued. High level input current IH -55°C to +125°C MR pin = 0.7 x VDD, VDD = 6 V 01,02 VSENSE1 pin = VDD = 6 V 8 VSENSE2 pin = VDD = 6 V 9 -1 VSENSE3 pin = VDD Low level input current IL -55°C to +125°C MR pin = 0 V, VDD = 6 V 01,02 VSENSE1,2,3 pins = 0 V Supply current IDD Input capacitance CI -180 VI = 0 V to VDD +1 -600 -1 µA µA +1 40 µA typical pF -55°C to +125°C 01,02 -55°C to +125°C 01,02 10 +25°C 01,02 6 µs 100 ns Timing requirements section. 4/ Pulse width tW SENSEn pin, VSENSEnL = -VIT - 0.2 V, VSENSEnH = +VIT + 0.2 V MR pin, VIH = 0.7 x VDD, VIL = 0.3 x VDD Switching characteristics section. 4/ Delay time td VI(SENSEn) ≥ +VIT + 0.2 V, +25°C 01,02 +25°C +25°C 140 280 ms 01,02 600 ns 01,02 600 ns MR ≥ 0.7 x VDD, figure 5 Propagation (delay) time, high-to-low output tPHL MR to RESET , VI(SENSEn) ≥ +VIT + 0.2 V, VIH = 0.7 x VDD, VIL = 0.3 x VDD Propagation (delay) time, low-to-high output tPLH MR to RESET, VI(SENSEn) ≥ +VIT + 0.2 V, VIH = 0.7 x VDD, VIL = 0.3 x VDD See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 6 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions Temperature, TA Device type Limits Min Unit Max Switching characteristics section – continued. 4/ Propagation (delay) time, high-to-low output tPHL SENSEn to RESET , +25°C 01,02 5 µs +25°C 01,02 5 µs VIH ≥ +VIT +0.2 V, VIL ≤ -VIT - 0.2 V, MR ≥ 0.7 x VDD Propagation (delay) time, low-to-high output tPLH SENSEn to RESET, VIH ≥ +VIT +0.2 V, VIL ≤ -VIT - 0.2 V, MR ≥ 0.7 x VDD 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ 3/ The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 µs / V. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1 µF) should be placed close to the supply terminals. Unless otherwise specified, VDD = 2 V to 6 V, RL = 1 MΩ, CL = 50 pF. 4/ DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 7 Case X FIGURE 1. Case outlines. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 8 Case X Dimensions Inches Symbol Millimeters Min Max Min Max A --- 0.069 --- 1.75 A1 0.004 0.010 0.10 0.25 b 0.014 0.020 0.35 0.51 c D 0.008 nominal 0.189 e 0.20 nominal 0.197 4.80 0.050 5.00 1.27 E 0.150 0.157 3.81 4.00 E1 0.228 0.244 5.80 6.20 L 0.016 0.044 0.40 1.12 n 8 leads 8 leads NOTE: 1. Controlling dimensions are inches, millimeter dimensions are given for reference only. 2. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.006 inch ( 0.15 mm ). 3. Falls within JEDEC MS-012 variation AA. FIGURE 1. Case outlines. – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 9 Case Y FIGURE 1. Case outlines. – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 10 Case Y Dimensions Inches Symbol Millimeters Min Max Min Max A --- .042 --- 1.07 A1 .001 .005 0.05 0.15 b .009 .014 0.25 0.38 c D e .005 nominal .116 0.15 nominal .120 2.95 .025 nominal 3.05 0.65 nominal E .116 .120 2.95 3.05 E1 .188 .196 4.78 4.98 L .016 .027 0.41 0.69 n 8 leads 8 leads NOTE: 1. Controlling dimensions are millimeter, inch dimensions are given for reference only. 2. Body dimensions do not include mold flash or protrusion. 3. This package is designed to be soldered to a thermal pad on the board. Refer to technical brief, power pad thermally enhanced package, manufacturer’s literature number SLMA002 for information regarding recommended board layout. This document is available at www.ti.com http://www.ti.com. 4. Falls within JEDEC MO-187. FIGURE 1. Case outlines. – continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 11 Device types 01 and 02 Case outlines X and Y Terminal number Terminal symbol 1 SENSE1 2 SENSE2 3 SENSE3 4 GND 5 RESET 6 RESET 7 MR 8 VDD FIGURE 2. Terminal connections. MR SENSE1 > VIT1 SENSE2 > VIT2 SENSE3 > VIT3 RESET RESET L X X X L H H 0 0 0 L H H 0 0 1 L H H 0 1 0 L H H 0 1 1 L H H 1 0 0 L H H 1 0 1 L H H 1 1 0 L H H 1 1 1 H L H = High voltage level L = Low voltage level X = Don’t care FIGURE 3. Truth table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 12 NOTES: 1. R1 and R2 form an internal divider. It determines the threshold on the comparator positive input coming from SENSE 1 pin. 2. R3 and R4 form an internal divider. It determines the threshold on the comparator positive input coming from SENSE 2 pin. FIGURE 4. Logic diagram. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 13 FIGURE 5. Timing waveforms. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 14 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Package V62/03629-01XE 01295 Small outline V62/03629-02YE 01295 Thermal pad µ small outline Vendor part number Top-side marking Tape and reel TPS3307-18MDREP 301718E Tape and reel TPS3307-33MDGNREP 3/ BNP 2/ 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ Due to space limitations, BNP are three characters assigned by manufacturer that specifies the unique product type. 3/ The manufacture has changed lead frames NiPdAu to NiPdAuAg and location of assembly from their Hana facility to their Shanghai facility. Product with a Lot Trace Code of 1CxxxxH and earlier is a NiPdAu frame from the Hana facility. CAGE code 01295 DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Source of supply Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03629 PAGE 15