2SK1579 Silicon N-Channel MOS FET Application High speed power switching Features • Low on-resistance • High speed switching • Suitable for low voltage operation Outline UPAK 3 2 1 4 D 1. Gate 2. Drain 3. Source 4. Drain G S 2SK1579 Absolute Maximum Ratings (Ta = 25°C unless otherwise specified.) Item Symbol Ratings Unit Drain to source voltage VDSS 12 V Gate to source voltage VGSS ±7 V Drain current ID 2 A 4 A 2 A Drain peak current I D(pulse)* Body to drain diode reverse drain current I DR 1 2 Channel power dissipation Pch* 1 W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Notes 1. PW ≤ 100 µs, duty cycle ≤ 10% 2. Value on the almina ceramic board (12.5 × 20 × 0.7 mm) 2 2SK1579 Electrical Characteristics (Ta = 25°C unless otherwise specified.) Item Symbol Min Typ Max Unit Test conditions Drain to source cutoff current I DSS — — 1 µA VDS = 8 V, VGS = 0 Gate to source cutoff current I GSS — — ±5 µA VGS = ±6.5 V, VDS = 0 Gate to source cutoff voltage VGS(off) 0.4 — 1.4 V VDS = 5 V, ID = 100 µA Drain to source on resistance (1) RDS(on)1 — 0.36 0.7 Ω VGS = 2.2 V, ID = 0.5 A Drain to source on resistance (2) RDS(on)2 — 0.25 0.35 Ω VGS = 4 V, ID = 1 A DC forward transfer admittance |yfs| 1 2.5 — S VDS = 5 V, ID = 1 A, ∆VGS = 0.1 V Input capacitance Ciss — 110 — pF VDS = 5 V, VGS = 0, Reverse transfer capacitance Crss — 30 — pF f = 1 MHz Output capacitance Coss — 150 — pF Turn-on time t (on) — 500 — ns I D = 0.2 A, VGS = 0, Turn-off time t (off) — 1500 — ns Vin = 4 V, RL = 51 Ω Note 1. Marking is “DY”. 3 2SK1579 Maximum Safe Operation Area Power vs. Temperature Derating 50 0.5 DS 5 2 1 0.5 0.2 Op PW = 10 ms 1 Shot era tio n( T C =2 5° C) 50 100 Ambient Temperature Ta (°C) 150 Ta = 25°C 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 Drain to Source Voltage VDS (V) Typical Output Characteristics 5 4V Typical Transfer Characteristics 5 3.5 V 3V Ta = 25°C Pulse Test 2.5 V 3 2 2V 1 Drain Current ID (A) 4 Drain Current ID (A) DC 0.1 0 4 0 2 1 2 6 8 4 10 Drain to Source Voltage VDS (V) Ta = –25°C 25°C 75°C 3 VGS = 1.5 V 4 (o n) 10 O is per lim ati ite on d b in y R this 1.0 ar ea 20 Drain Current ID (A) Channel Dissipation Pch (W) 1.5 0 VDS = 5 V Pulse Test 1 3 4 2 Gate to Source Voltage VGS (V) 5 Static Drain to Source on State Resistance RDS (on) (Ω) Drain to Source on State Resistance vs. Gate to Source Voltage 0.5 0.4 ID = 0.1 A 0.2 A 0.3 0.5 A 1 A 0.2 Ta = 25°C Pulse Test 0.1 2 1 3 4 Gate to Source Voltage VGS (V) 0 5 Static Drain to Source on State Resistance vs. Drain Current 5 Pulse Test 0.6 0.4 ID = 1 A 0.5 A VGS = 2 V ID = 0.5 A VGS = 4 V 0.2 1A 0 –25 2A 25 0 50 75 Case Temperature TC (°C) 2V 1 VGS = 3 V 0.5 4V 0.2 0.1 0.05 0.2 0.5 5 2 10 1 Drain Current ID (A) 20 Forward Transfer Admittance vs. Drain Current 1.0 0.8 Ta = 25°C Pulse Test 2 Static Drain to Source on State Resistance vs. Temperature 100 Forward Transfer Admittance yfs (S) Static Drain to Source on State Resistance RDS (on) (Ω) Drain to Source on State Resistance RDS (on) (Ω) 2SK1579 50 VDS = 5 V Pulse Test 20 10 5 Ta = –25°C 25°C 75°C 2 1 0.05 0.2 0.5 2 10 1 5 Drain Current ID (A) 20 5 2SK1579 Reverse Drain Current vs. Sourse to Drain Voltage Typical Capacitance vs. Drain to Source Voltage 500 Coss Pulse Test 4 Capacitance C (pF) Reverse Dratin Current IDR (A) 5 3 2 VGS = 2 V 1 VGS = 0 Ciss 100 Crss 50 20 10 VGS = 0 f = 1 MHz 5 0.1 0 0 200 1.0 2.0 Source to Drain Voltage VSD (V) 0.2 1 5 0.5 2 Drain to Source Voltage VDS (V) Switching Characteristics 5,000 Switching Time t (ns) VGS = 4 V, VDD = 10 V PW = 2 µs, Duty cycle = 1% 2,000 1,000 500 td (off) tf 200 100 50 0.05 0.1 6 tr td (on) 0.5 1 2 0.2 Drain Current ID (A) 5 10 Unit: mm 1.5 1.5 3.0 0.44 Max Hitachi Code JEDEC EIAJ Weight (reference value) (0.2) (2.5) (1.5) (0.4) 0.53 Max 0.48 Max 1.5 ± 0.1 0.44 Max 2.5 ± 0.1 4.25 Max φ1 0.8 Min 1.8 Max 0.4 4.5 ± 0.1 UPAK — Conforms 0.050 g Cautions 1. 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